cortex_a: force cache and tlb bypass when cpu is in debug state

for minimal impact on the hardware state, force all memory accesses to
bypass the caches and tlbs. This may actually be the default, but ARM
recommends in DDI0406C to set proper default values on debug init.

Change-Id: If5ac097b6ee725c047b1e86c2f90eabe16b98c7b
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3079
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: fix-up dcache clean and flush functions inner loop pattern

Other cache functions use an updated pattern for the address range loop.
Bring dcache clean and flush functions in line.

Change-Id: Iccb4a05c49054471033a3403363110cb08245d5b
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3035
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

cortex_a: Update instruction cache after setting a soft breakpoint

Call armv7a_l1_d_cache_flush_virt() before writing the breakpoint,
to make sure the d-cache is clean and invalid at the breakpoint
location down to PoC.

Call armv7a_l1_d_cache_inval_virt() after writing the breakpoint
again, so that d-cache will pick up the modified code.
Call armv7a_l1_i_cache_inval_virt() after writing the breakpoint
to memory to make the change visible to the CPU.

Change-Id: I24fc27058d99cb00d7f6002ccb623cab66b0d234
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3033
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: correctly handle invalidation of inner data caches

D-Cache invalidate is a dangerous operation. It will only work correctly
if full cache lines are invalidated. When partial cache lines are
invalidated, i.e. the target address range does not start and end
at a cache line boundary, cpu data writes outside of the target range
will be dropped. This patch adds special treatment for partial cache
lines by doing a clean & invalidate on the partial lines before
invalidating the rest of the range.

Change-Id: I64099ddb058638e990a7eb0ee911b9cc8f6f8901
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

armv7a: fix debug messages regarding cache on/off state

Cache bits are not level specific, remove "l1" from debug message.
Also, fix data/instruction mixup in armv7a_l1_i_cache_sanity_check()

Change-Id: I259665ffe62c7ada5b4f98d3fd907e93662d4091
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3028
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: rework automatic flush-on-write handling

The following changes are implemented:
- Clean&Invalidate the VA range to PoC *before* the write takes place
- Remove SMP handling since DCCIMVA instruction already maintains SMP
  coherence.
- Remove separate Invalidate step

Change-Id: I19fd3cc226d8ecf2937276fc63258b6a26e369a7
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3027
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: add d-cache virtual address range flush function

This patch adds a function for cleaning & invalidating a virtual
address range from the architecture caches down to the point of
coherence.

Change-Id: I4061ab023a3797fabc967f3a34498034841d52c6
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3026
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: remove indirection for cache info handler

There's only one function left that handles cache info display,
no need any more for a function pointer and runtime initialization.

Change-Id: I90b09577f81607917b11f0ab5600a0e2dce223e2
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3025
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: fix handling of inner caches

ARMv7 architecture allows up to 7 cache levels that are architecturally
visible, as opposed to "system caches", which are outside of the domain
defined by ARMv7 and require separate management. This patch enables
detection and identification of caches at all levels. It also implements
a new "flush-all" function that cleans & invalidates all cache levels to
the "Point of Coherence".

Change-Id: Ib77115d6044d39845907941c6f031e208f6e0aa5
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3024
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: remove special l2x flush-all and cache-info handlers

This patch is on the path to unified handlers for both inner and
outer caches. It removes the special overrides installed when
an outer cache is configured.

Change-Id: I747f2762c6c8c76c700341cbf6cf500ff2a51476
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3022
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

armv7a: rename l2_cache to outer_cache

The outer cache is not necessarily at L2 in a system. Rename functions
to make that clear.

Change-Id: Ia636a4844f50634f2bdf5cdce285febc1a47c11f
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3020
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

armv7a: remove l1 flush all data handler

deprecated by new code.

Change-Id: Ie3db627803a6aae38a5287bd3a748a78ab084b7d
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2801
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

add armv7a_cache handlers

This patch introduces, new command set and handlers for l1 and l2x caches.

Patch set 10 folded the following changes into this one:

Ib1a2a1fc1b929dc49532ac13a78e8eb796ab4415
If8d87a03281d0f4ad402909998e7834eb4837e79
I0749f129fa74e04f4e9c20d143a744f09ef750d8

Change-Id: I849f4d1f20610087885eeddefa81d976f77cf199
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/2800
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

cortex_a: add cortex_a_[read|write]_memory_ahb

Change-Id: I39c457274e1714a8d42233f7fc490fb58f5cb38e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2798
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: add cortex_a_[read|write]_buffer

Change-Id: I82011822d913aa7228f5c6262b540156494bedfe
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2797
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: remove cache handlers from cortex_a_write_phys_memory

This was needed for ahb access

Change-Id: I638f45a276a593c08140b5d9d7480617aa85f096
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2796
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: remove ahb support for phys_memory access

Change-Id: I5b7c21c16e95cc1a3160e356d6e64f1f8c449e6e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2795
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

adi_v5: Fix wrong ap value

Problem
dap->ap_current is register value, not field value.
it restores invalid ap when it calls dap_ap_select(dap, ap_old) later.

* assume the current ap is 1, dap->ap_current value would be (1 << 24).
ap_old = dap->ap_current;   <-- ap_old = 1<<24 = 0x1000000.
...
dap_ap_select(dap, ap_old); <-- select 0x1000000, not 1.
* All AP registers accessing fail afterwards.

One of the reproducible case(s): CORE residents in AP >= 1
  dap_lookup_cs_component() being used to find PE(*).
  In most cases, PE would be found in AP==0, hence the problem is hidden.
  When AP number is 1, dap->ap_current would have the value of 1<<24.
  Anyone get the AP value with dap->ap_current and resotre it later would
  select the wrong AP and all accessing later would fail.

  The ARM Versatile and/or FPGA would have better chance to provide this
  kind of environment that PE residents in AP>=1. As they have an 'umbrella'
  system at AP0, and main system at AP>=1.

  * PE: Processing Element. AKA Core. See ARM Glossary at
    http://infocenter.arm.com/help/topic/com.arm.doc.aeg0014g/ABCDEFGH.html

Fix
Use dap_ap_get_select() to get ap value.
a. Retrieve current ap value by calling dap_ap_get_select();
     src/flash/nor/kinetis.c
     src/target/arm_adi_v5.c

b. The code is correct (dap->ap_current >> 24), but it's better to use
   dap_ap_get_select() so everything could be synchronized.
     src/flash/nor/sim3x.c

Change-Id: I97b5a13a3fc5506cf287e299c6c35699374de74f
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2935
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

jlink: Retrieve maximum speed from device.

If supported, the maximum transport speed is now retrieved from the
device.

Change-Id: I614f405ec91cf199c851781785fd26cbd10c37a6
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2955
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Improve J-Link driver and introduce libjaylink.

This patch uses libjaylink which is a library to access J-Link
devices. As other tools which are not in the scope of OpenOCD also
need to access J-Link devices a library is used. A firmware upgrade
tool and an advanced configuration tool for J-Link devices are under
development.

Further versions of libjaylink will support additional features
OpenOCD could benefit from. This includes TCP/IP as additional
possibility to connect to J-Link devices as well as power tracing and
device internal communication. The latter is used to access
peripherals on some development boards (e.g EFM32 STK and DVK).

Integration of libjaylink is realized with a git submodule like
jimtcl. As libjaylink depends on libusb-1.0 only, no additional
dependency is introduced for OpenOCD.

All low-level JTAG and SWD implementations of the current driver are
left untouched and therefore no incompabilities are to be expected.

Improvements of this patch:

 * Support for more USB Product IDs, including those with the new
   scheme (0x10xx). The corresponding udev rules are also updated.
 * Device selection with serial number and USB address.
 * Adaptive clocking is now correctly implemented and only usable for
   devices with the corresponding capability.
 * The target power supply can now be switched without the need for
   changing configuration and power cycling the device.
 * Device configuration is more restrictive and only allowed if the
   required capabilities are available.
 * Device configuration now shows the changes between the current
   configuration of the device and the values that will be applied.
 * Device configuration is verified after it is written to the device
   exactly as the vendor software does.
 * Connection registration is now handled properly and checks if the
   maximum number of connections on a device is reached. This is also
   necessary for devices which are attached via USB to OpenOCD as
   some device models also support connections on TCP/IP.
 * Serial Wire Output (SWO) can now be captured. This feature is not
   documented by SEGGER however it is completely supported by
   libjaylink.

This patch and libjaylink were tested on Ubuntu 14.04 (i386),
Debian 7 (amd64), FreeBSD 10.0 (amd64) and Windows XP SP3 (32-bit)
with the following device and target configurations:

 * JTAG: J-Link v8.0, v9.0 and v9.3 with AT91SAM7S256
 * SWD: SiLabs EFM32 STK 3700 (EFM32GG990F1024)
 * SWD: J-Link v8.0, v9.0 and v9.3 with EFM32GG990F1024
 * SWD: XMC 2Go (XMC1100)
 * SWD: XMC1100 Boot Kit (XMC1100)
 * SWD: IAR Systems / Olimex Eval Board (LPC1343F)
 * SWD: Nordic Semiconductor nRF51 Dongle (nRF51422)
 * SWD: SiLabs EZR32 WSTK 6220A (EZR32WG330FG60G)

Except for Windows XP all builds are tested with Clang in addition to
GCC. This patch and libjaylink are not tested on OSX yet.

Change-Id: I8476c57d37c6091c4b892b183da682c548ca1786
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2598
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

flash/nor/lpc2000: add alternative part ID for LPC1343

http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip
> Note that once you have recovered debug access to your MCU, then in most cases you should then modify your Debug Configuration to turn vector catch off again. If this is not done, then this can cause problems in some circumstances with some versions of the Code Red IDE. For example with NXP LPC13xx parts, connecting more than once to the MCU with vector catch enabled can lead to the part ID being incorrectly read - which can again cause debug connections to fail
This patch adds an alternative part ID for LPC1343. With this patch "program" command works fine for flashing.

Change-Id: I8632e898a4c33102455925d25715b4f4edfa1d97
Signed-off-by: Jakub Kubiak <jakub@kubiak.es>
Reviewed-on: http://openocd.zylin.com/2782
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

niietcm4: support for NIIET's Cortex-M4 microcontrollers

This adds docs, example config, flash driver.
Driver is only supports K1921VK01T model for now.

Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Reviewed-on: http://openocd.zylin.com/3011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

efm32: remove duplicate part name decoding.

The probe and info methods had duplicate sections decoding family names
to generate a human friendly part name.  Extract this to a common
helper.

Change-Id: I4c6309d83c601e154b7c14ad9c15c53854ee1e98
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/2932
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

efm32: basic Happy Gecko target support

Basic basic support to get running, magic numbers taken from revision
0.90 of the reference manual.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Change-Id: Iff6ab94d30698f056ef09f7a856b7285fed8f441
Reviewed-on: http://openocd.zylin.com/2931
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

jtag: commands: save a pointer to list tail

By saving a pointer to the tail of the list,
we don't need to traverse the entire command
queue before we're able to append an item to
it.

With this patch, I see a 10% improvement when
using the embedded XDS100v2 on AM437x IDK board
to load a 4MiB binary (linux zImage) to DDR
with load_image.

IOW, we went from ~305kB/sec to ~336kb/sec.

Change-Id: Idb55d49f0d0106043374ab520b2f3b6b32f2c50f
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2709
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Daniele Emancipato <daniele12457@hotmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

svf: fix progress reporting switch behaviour

The svf_progress_enabled variable is global, hence its lifetime is not
limited and it retains the value from the previous run. Fix this by
explicit assignment.

Change-Id: Id6f4fa88f39521606342a37f6876a0948ac5406e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3111
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

svf: fix off-by-one error in line numbers as output to user

This makes SVF error output match actual line numbers in the file
processed.

Change-Id: I1fa4b9d0891e4358b7beada516945d5331ebe182
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2945
Tested-by: jenkins

Kinetis: suppress false alarms "MCU is secured"

Kinetis driver checks MDM STAT register to detect secured state of MCU.
An unsecured clean device typically triggered a huge fat alarm message.
Now when driver detects secured state it tries to halt MCU and then
re-reads status register.

Command "mdm mass_erase" used to deassert reset when finished
and MCU started looping in hard fault - WDOG reset cycle.
Now "reset halt" is issued. Clean flash is not run after mass_erase.

Change-Id: I23f393509fbd8751d44ffc744ff2d67f1074f74e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3010
Tested-by: jenkins
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/target: Add Nordic nRF52 config

Base config without flash support for now.

Change-Id: I96a5b6ad35e00dc706177ea9dbdffc384ae7f62b
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3110
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/board: Remove pflash.0 bank from twr-k60n512.cfg

The pflash.0 bank should not be present as it overlaps with
the flash bank created by target/kx.cfg, triggering an error.
This is also in line with the existing twr-k60f120m.cfg.

Change-Id: I5f620e01319d967f12e029fb6865ccdd031713b3
Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-on: http://openocd.zylin.com/3108
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

flash: at91samd: flash write code cleaning

SAMD driver suffered from following problems:

1) Flash was erased as an integral part of flash write.
It was not documented so with usual workflow it resulted
in erasing flash twice (and reducing flash lifespan)
and in almost double flashing time.

2) Sector erase was silently skipped if "is_erased" flag was set.
"is_erased" logic was not reliable, e.g. when a row write
was aborted after successful write of some pages, sector was
still considered as erased. "is_erased" flag could not
cope with flash writes from a user program.

3) Writing of a block with start address unaligned to a flash page
resulted in failed assert and OpenOCD abort.

4) Disabling cache in bit 18 of 16-bit halfword never worked.
MCU implements cache invalidate in hardware so there is no need
to take care about. This bug was reported by Tony DiCola.

New code does not erase flash in write operation.
Instead it traditionally relies on erasing flash beforehand.
"is_erased" logic and cache disabling is completely removed.
It simplifies write procedure a lot and flash write is now faster.

The change partly solves ticket #109 SAMD/SAM4L driver doubles flash erase.

Change-Id: I582b497d01a351575533a1f8c9810a4413be0216
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3045
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

flash: at91samd: Add SAML21 variant B device support and fix SAMC20/SAMC21

This adds support for the Atmel SAML21 variant B parts.
There is minimal change between the two variants, but in
variant B the automatic page write which the at91samd flash
driver relies on to be enabled is disabled by default.
With this patch the write row function will now issue a page write
command after each of the four pages in the row if the MANW (manual
write) bit is set. This also fixes flash write for the SAMC20/SAMC21
devices which have the MANW bit set by default as well.

I have also moved the device ID (DID) register bitfield extraction
from the find_part into helper macros. These can be used in the future
if there are more workarounds for specific devices.

Tested (programming) on:
ATSAML21-XPRO
ATSAML21-XPRO-B
SAMC21 Xplained Pro
SAMD21 Xplained Pro
SAMD20 Xplained Pro

Change-Id: I401a8aa1efd64730840c0d62cf49a1e880ea5900
Signed-off-by: Andreas Loehre <alohre@gmail.com>
Reviewed-on: http://openocd.zylin.com/2903
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

jtag: cmsis-dap: Issue disconnect before reconnecting

cmsis-dap protocol has both DAP_Connect and DAP_Disconnect commands.
Logically if cmsis_dap_swd_switch_seq() calls DAP_Connect in connected
state it should call DAP_Disconnect first.

Doing so surprisingly solves problems on Atmel EDBG with target SAMD/R/L/C.
Without this change SWD communication breaks after reset run/halt
in config "reset_config srst_only" and reconnect trials repeatedly
fail with "SWD ack not OK: 0 JUNK"

Change-Id: Ie951098d5e0c83f388e2df414608aaabec2135c9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3098
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

at91samd: handle reset run/halt in DSU

Atmel introduced a "Device Service Unit" (DSU) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Function is similar to SMAP in ATSAM4L, see http://openocd.zylin.com/2604

Atmel's EDBG adapter handles DSU reset correctly without this change.

An ordinary SWD adapter leaves TCK in its default state, low.
So without this change any use of sysresetreq or srst
locks the chip in reset state until power is cycled.

A new function dsu_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and DSU reset is released then.

Additionally SWD clock comment is fixed in at91samdXX.cfg and clock is
lowered a bit to ensure a margin for RC oscillator frequency deviation.
adapter_nsrst_delay 100 is commented out because is no more necessary after
http://openocd.zylin.com/2601

Change-Id: I42e99b1b245f766616c0a0d939f60612c29bd16c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2778
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/interface/ftdi: add 100ask's OpenJTAG config

Schematics provided by Matthias Bock.

Change-Id: I3d00453fece3b4df58a53bee21fff646a8b71a34
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2718
Tested-by: jenkins

board: ti_am437x_idk: default to 1000kHz

16000kHz is only safe after PLLs have been locked
properly. Until that's done (with reset init), we
can only safely run at 1000kHz.

Change-Id: I4e0a17e88aa9919cd6c34d44da68e23115c0d3a3
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/3015
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

topic: Interface config file for FTDI UM232H module

Added interface config file for the FTDI FT232H based UM232H module.
This should work with UM232H-B too, an even cheaper module, but
that has not been tested.

Change-Id: Ifc312d6741da0b7862fe07d854023190d7afe251
Signed-off-by: Ragnar Sundblad <raggesu@gmail.com>
Reviewed-on: http://openocd.zylin.com/3031
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

target: cortex_a: add deinit_target handler to free memory

Tested with Valgrind accesing a Pandaboard.

Change-Id: I51bba044974ecfc4d418998816d44a8563264123
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3101
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

stm32l4: Add cpu and stm32l4discovery board configuration.

Change-Id: I20d3fcee04516eb3b9bb22933e7e366eed0c0b2e
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2942
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl: Add default hooks for STM32F0x

Keep clocks running in low power modes. Stop watchdogs from interfering
with the debug session. Set up PLL and increase clock at reset init.

Change-Id: I232d769d893d54e4ea9411c46c56b19587b69919
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2707
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl: Add default hooks for STM32F4x

Set up PLL and increase clock at reset init.

Change-Id: I611bc6fb7c0c5afd8ed3f4ad8e64f3c7b981d31c
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2609
Tested-by: jenkins
Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

stm32xxx.cfg: Only touch IWDG and WWDG in DBGMCU_APB1_FZ.

Change-Id: Ie0298c8e73bebeccc9346534d63aab4cae49e4f7
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3104
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

Add config files for STM32F7-DISCO and STM327[4|5]6G-EVAL.

Change-Id: I0803939f0ab1de97e544ca0f1257daac11fb50de
Signed-off-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2754
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

flash/nor/xmc4xxx: Loosen checks for XMC4500

According to Infineon, XMC4500 EES AA13 with date codes before GE212 -
as seen on an XMC4500 General App Kit - had a zero SCU_IDCHIP register.

Handle this by extending our checks to not error out on zero SCU_IDCHIP
and by printing a useful info string in that case.

Change-Id: Ic2d641a314627dd5a1ff775a0113999191b95e3d
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2751
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>

flash: New driver for XMC4xxx microcontroller family

This is a complete flash driver for the Infineon XMC4xxx family of
microcontrollers, based on the TMS570 driver by Andrey Yurovsky.
The driver attempts to discover the particular variant of MCU via a
combination of the SCU register (to determine if this is indeed an
XMC4xxx part) and the FLASH0_ID register (to determine the variant).
If this fails, the driver will not load.
The driver has been added to the README and documentation.

Tests:
* Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise)
* SWD + JTAG
* Binary: 144k, 1M

Note:
* Flash protect only partly tested. These parts only allow the flash
  protection registers (UCB) to be written 4 times total, and my devkits
  have run out of uses (more on the way)

Future Work:
* User 1/2(permalock) locking support via custom command
* In-memory flash loader bootstrap (flashing is rather slow...)

Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f
Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2488
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

flash: driver for Atmel SAMV, SAMS, and SAME

This is a driver for the Atmel Cortex-M7 SAMV, SAMS, and SAME.
I started with the at91sam4.c driver and then restructured it
significantly to try to simplify it and limit the functionality
to just a flash driver, as well as to comply with the style guide.

Change-Id: I5340bf61f067265b8ebabd3adad45be45324b707
Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/2952
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

tcl/board: add Atmel SAM V71 Xplained Ultra

Tested with cmsis-dap using the EDBG chip on the board.

Change-Id: I3d398685c81e4701a9f6c1a66e60f7a87f839daa
Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/3092
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/target: add config for Atmel SAMV / SAMS / SAME

Change-Id: Ia90a533fe3d07f9a67ce2da815146c612d80dd1b
Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/3091
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

cfi: Fix fallback to memory writes

Change-Id: I2d09139b95ff62c62a0b071584e85a87494ed313
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3095
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

target: cortex_a: do not create new register cache every reset

Commit 68101e67ac16bdead3bd6d48cbe0a2bfd63aac02 introduced a
regression which resulted for ever-growing registers list (as output
by "reg" command), its contents were doubled every reset (actually,
every examination).

Change-Id: Ie3409c795160a2fc840a5e8a892928df0bcc0c57
Reported-by: Daniele Emancipato <daniele12457@hotmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3100
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

Cortex A/R : Allow interrupt disable during single-step

Example usage:
cortex_a maskisr on
cortex_a maskisr off
cortex_r maskisr on
cortex_r maskisr off

Change-Id: I799288d9b848a06f561ba29ec1eb8e5eeace5685
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2876
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

Documentation : Add missing commands for ARM-v7A & R

Change-Id: I520fed122385d4d666bf91b754b1ac196b51d471
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2875
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins

flash/nor/spi: Add GigaDevice gd25q16c/32c/128c flash support

Change-Id: I44052fd3467d7e0bbdc038b815204e39fa499684
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Reviewed-on: http://openocd.zylin.com/3029
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

armv7a: correct calculation of ttbr0_mask

This patch brings the calculation of the address ranges handled by
ttbr0 and ttbr1 registers in line with ARM DDI 0406C, Table B3-1

Change-Id: Ib807c4b1cb328a6f661e1a0898e744e60d3eccac
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3006
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

armv7a: re-read ttb information if ttbcr changes

If ttbcr is changed after the debugger has examined a target for the
first time, address translations may fail. This problem does not show up
with Linux because it doesn't use ttbr1, but it shows with other OS that
use this feature. If the debugger connects to the target while it's in
u-boot, all address translations will fail after the OS has booted and
the target can not be debugged.

This patch reads the ttbcr in armv7a_mmu_translate_va() and compares it
a cached value. If a difference is detected, armv7a_read_ttbcr() is called
to re-parse the ttb configuration and update the cache.

Change-Id: I1c3adf53ea9d748a0e1e3091d9581e5c43ed64e8
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3005
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/target: Add configuration for NXP LPC4370 processor

New configuration for NXP LPC4370 which consists of a Cortex-M4
and two Cortex-M0 cores.

Change-Id: I9918e3ff33218a14a99e4bbab9dce2e7b45b4d96
Signed-off-by: Jim Norris <u17263@att.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/board: Add LPC-Link2 config

Tested with Olimex ARM-USB-TINY-H adapter (both JTAG and SWD).

Change-Id: Idc8a030e9692eec761d1e2485cbf9897660c0ca0
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3082
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

Kinetis: properly pad flash section writes

kinetis_write() with byte count not divisible by prog_section_chunk_bytes
computed wrong wc and therefore paded section chunk by some
random data instead of 0xff

Change-Id: Ic7c66d8a3ceacda9e611e98b9fbf943b8001774b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2994
Tested-by: jenkins
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

Kinetis: Disable watchdog on Kx devices when programming.

Kx devices with FTFA flash need the watchdog disabled when programming.
I tried to keep overhead as small as possible and re-use registers that
were already inquired (e.g. sim_sdid).

Change-Id: Ibc29a26ec34102d78a6c3920dd16f63e134a8f6f
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2986
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

Revert "board: don't hardcode interface for ti_beaglebone"

This reverts commit 7d7a43fd36a61e55e087a474fe41e3dae6375453.

The change concerns the "Black" variant of the TI BeagleBone, while the
configuration file is for the original BeagleBone board, which actually
embeds a debug interface on the PCB.

Change-Id: I2232af210deb698f8b3c0a547f26cd0a0a8f89d0
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3094
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

helper/options: Use OPENOCD_SCRIPTS dir if set.

This makes it easier to relocate the install tree of OpenOCD from where
it was originally built (for example, if put onto a different machine),
without having to change scripts or add something to the command line
every time.

Change-Id: Ia5edf0eba166f7a999f267bd6a92402dab9b399e
Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-on: http://openocd.zylin.com/3004
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/target|board: add config Atheros ar2315

Add configs for Atheros ar2313 MIPS based WiSoC and
board based on this chip: La Fonera FON2200

Change-Id: Ibfdbfc9c2beca6cf436c9ee5e493b08bfb55ac85
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2839
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/target|board: add config Atheros ar2313

Add configs for Atheros ar2313 MIPS based WiSoC and
board based on this chip: Netgear WP102

Change-Id: Id93957b5d5851a272f15be35f9f448a9ce6d8a08
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2835
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

helper/options: Cleanup #includes.

Change-Id: I1c05cf6bb68049176cdd1b3bcff4dcb8b9ae963e
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2995
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

helper/log: Cleanup #includes.

Change-Id: Ie343524dd843d518086a86866391b5a34556082b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2996
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

helper/ioutil: Rename MixedCaps function.

Change-Id: I10075d4d5f45a7105d5a007631510236dbb9b08b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2957
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

helper/fileio: Fix memory leak.

The memory leak occurs when opening a file fails. It can be
reproduced by using the "flash verify_bank" command with a filename
that does not exist.

Change-Id: I60b7b545c18793d750ff75d08124fde3f0aa6f64
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2998
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

helper/fileio: Use size_t for file size.

Change-Id: Ie116b44ba15e8ae41ca9ed4a354a82b2c4a92233
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2997
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

target: tell which target state is meant

If we work on smp system, the output of step command will depend
on Id of default target.
This patch adds additional information to help find what on which
core is happening.

Example of LOG after this patch.
imx6.cpu.1: target state: halted
^^^^^^^^^^
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x60000093 pc: 0x80076c0c
MMU: enabled, D-Cache: enabled, I-Cache: enabled
imx6.cpu.0: target state: halted
^^^^^^^^^^
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x20000193 pc: 0x802ccb6c
MMU: enabled, D-Cache: enabled, I-Cache: enabled

Change-Id: I536a2cce33b5ab10af9de2a43b9960320c17729f
Signed-off-by: Oleksij Rempel <external.Oleksij.Rempel@de.bosch.com>
Reviewed-on: http://openocd.zylin.com/2691
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

cortex_m: dwt_num_comp should be set to zero in cortex_m_dwt_free()

A segmentation fault in cortex_m_endreset_event() is sometimes raised
with very broken target like Kinetis Kx with erased flash and active WDOG.
Debugging revealed that cortex_m->dwt_num_comp is 4 and
dwt_list is NULL at cortex_m:290

Change-Id: I229c59d6da13d816df513d1dbb19968e4b5951e2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2989
Reviewed-by: Thomas Schmid <thomas@rfranging.com>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

lpc4350_spifi_generic: Clean up work area size

Since 2cbbe9a it was actually decreasing the configured work area size.

We could now do "set WORKAREASIZE 0x2000" before sourcing lpc4350.cfg,
but there seems no point in doing so. Simply drop the configuration here.

Change-Id: I25b9dbbc007ba652b66099832198b7c329929858
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3086
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

rtos/mqx: Fix uninitialized parts of symbol table

Memory for the symbol table was allocated by malloc but not initialized other
than with the symbol name. Therefore `address` and `optional` members were
having arbitrary values leading to every symbol being optional most of the
time which messes up RTOS auto-detection. Memory will now be zero-initialized
as in other RTOS implementations.

Change-Id: I6c6e31ec1ef7e043061adf8c695b2139620e005d
Signed-off-by: Daniel Krebs <github@daniel-krebs.net>
Reviewed-on: http://openocd.zylin.com/3017
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

lpc8xx: Allow CHIPNAME override

Default to lpc8xx as before, but allow setting the actual CHIPNAME.

Change-Id: I5a48fa75c640440a0d4c3f2858653e94bed846d2
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3084
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

Change from sys/poll.h to standard poll.h location

According to "man 2 poll" the correct header to include is poll.h, not
sys/poll.h. Reported by a build against musl.

Change-Id: I5298b49dc947d1a368e423104c0c0c7b9bdd1a10
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2947
Tested-by: jenkins

tcl: add STM32F469 discovery board config

Change-Id: Iad7ee06330b3259ea0ce0d174dfdade6785913eb
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Reviewed-on: http://openocd.zylin.com/3043
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

flash/nor/stm32f2x: Add STM32F469 part

Change-Id: I4e13ceb0ba954dc2fea059ddeef10109be938c9c
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Reviewed-on: http://openocd.zylin.com/3042
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

board: don't hardcode interface for ti_beaglebone

Board files should not select the interface. The BeagleBone Black is not
limited to just one JTAG interface.

Change-Id: I71ccc3dd9e2ca331a436701fab04e548b0abf829
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3083
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

rtos: handle STKALIGN adjustments on cortex m

In the case that the STKALIGN bit is set on Cortex M processors, on
entry to an exception - the processor can store an additional 4 bytes
of padding before regular stacking to achieve 8-byte alignment on
exception entry.  In the case that this padding is present, the
processor will set bit (1 << 9) in the stacked xPSR register.  Use the
new calculate_process_stack callback to take into account the xPSR
register and use it on the standard Cortex_M3 stacking.

Note: Change #2301 had some misinformation regarding the padding.  On
Cortex-M the padding is stored BEFORE stacking so xPSR is always
available at a fixed offset.

Tested on a Cortex-M0+ (Atmel SAMR21) board which has STKALIGN fixed
to a '1' such that this alignment always occurs on non-aligned stacks.

Behavior of xPSR verified via the (bad-sorry) assembly program below by
setting a breakpoint on the SVC_Handler symbol.  The first time
SVC_Handler is triggered the stack was 0x20000ff8, the second time
SVC_Handler is triggered the stack was 0x20000ffc.  Note that in both
cases the interrupt handler gets 0x20000fd8 for a stack pointer.

GDB exerpt:

Breakpoint 1, 0x000040b6 in Reset_Handler ()
(gdb) hbreak SVC_Handler
Hardware assisted breakpoint 2 at 0x40f8
(gdb) cont
Continuing.

Breakpoint 2, 0x000040f8 in SVC_Handler ()
(gdb) print $msp
$3 = (void *) 0x20000fd8
(gdb) x/9w $msp
0x20000fd8:     0x1     0x2     0x3     0x4
0x20000fe8:     0x88160082      0xa53   0x40ce  0x21000000
0x20000ff8:     0x0
(gdb) cont
Continuing.

Breakpoint 2, 0x000040f8 in SVC_Handler ()
(gdb) print $msp
$4 = (void *) 0x20000fd8
(gdb) x/9w $msp
0x20000fd8:     0x1     0x2     0x3     0x4
0x20000fe8:     0x88160082      0xa53   0x40e8  0x21000200
0x20000ff8:     0x0

Assembly program:

.cpu cortex-m0plus
.fpu softvfp
.thumb
.syntax unified

.section .vectors
@ pvStack:
.word 0x20001000
@ pfnReset_Handler:
.word Reset_Handler + 1
@ pfnNMI_Handler:
.word 0
@ pfnHardFault_Handler:
.word 0
@ pfnReservedM12:
.word 0
@ pfnReservedM11:
.word 0
@ pfnReservedM10:
.word 0
@ pfnReservedM9:
.word 0
@ pfnReservedM8:
.word 0
@ pfnReservedM7:
.word 0
@ pfnReservedM6:
.word 0
@ pfnSVC_Handler:
.word SVC_Handler + 1

.section .text
.global Reset_Handler
Reset_Handler:
    cpsie i
    ldr r0, .stack_start
    ldr r2, .stack_last
    eors r1, r1
.loop_clear:
    str r1, [r0]
    adds r0, r0, #4
    cmp r0, r2
    bne .loop_clear
    subs r2, r2, #4
    mov sp, r2
    movs r0, #1
    movs r1, #2
    movs r2, #3
    movs r3, #4
    svc #0
    ldr r0, .stack_start
    ldr r2, .stack_last
    eors r1, r1
.loop_clear2:
    str r1, [r0]
    adds r0, r0, #4
    cmp r0, r2
    bne .loop_clear2
    mov sp, r2
    movs r0, #1
    movs r1, #2
    movs r2, #3
    movs r3, #4
    svc #0
.loop:
b .loop
.align 4
.stack_start:
    .word 0x20000f00
.stack_last:
    .word 0x20000ffc

@ first call - 0x2000fff8 -- should already be aligned
@ second call - 0x2000fffc -- should hit the alignment code
.global SVC_Handler
SVC_Handler:
    bx lr

Change-Id: Id0940e6bbd6a59adee1378c0e86fe86830f0c8fc
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Paul Fertser <fercerpav@gmail.com>
Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Cc: Evan Hunter <evanhunter920@gmail.com>
Cc: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/3003
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

rtos: turn stack alignment into a function pointer

Some targets (Cortex M) require more complicated calculations for
turning the stored stack pointer back into a process stack pointer.
For example, the Cortex M stores a bit in the auto-stacked xPSR
indicating that alignment had to be performed and an additional 4
byte padding is present before the exception stacking.  This change
only sets up the framework for Cortex-M unstacking and does not
add Cortex-M support.

Note: this also fixes the alignment calculation nearly addressed by
change #2301 entitled rtos/rtos.c: fix stack alignment calculation.
Updated calculation is in rtos_generic_stack_align.

Change-Id: I0f662cad0df81cbe5866219ad0fef980dcb3e44f
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Paul Fertser <fercerpav@gmail.com>
Cc: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Cc: Evan Hunter <evanhunter920@gmail.com>
Cc: Jon Burgess <jburgess777@gmail.com>
Reviewed-on: http://openocd.zylin.com/3002
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins

Add handling for STM32L4.

Option handling not yet implemented.
Change-Id: I5a11ef3221896cb02babe4e6e71073c43aa8740b
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2941
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

stm32f2x: Add memory barrier needed for STM32F7 flashing.

Change-Id: I44fca55c46fc8f960ba46a0604692ce98909face
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2939
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

stm32f2x.c: Add STM32F74x handling.

Change-Id: I2e7a8e9f855fc99a3f2535e2af6c0921329a5013
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2940
Tested-by: jenkins
Reviewed-by: Rémi PRUD'HOMME <prudhomme.remi@gmail.com>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

stm32f2x.c: Handle STM32F42x/43x 1 MiByte devices with DB1M option set.

Change-Id: Ic51d34a9abe9693fd21e9b3247523821b6fb1fe3
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2938
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

quark: updating license to GPLv2+

Intel is relicensing our contributions to OpenOCD under GPL
version 2 or any later version. We previously contributed code
under GPL version 2 only. It was not our intention to differ
from the standard OpenOCD license. We're correcting that here.
This also applies retroactively to previous versions of our
contributions to OpenOCD.

Change-Id: I5e831ed95d03d2044d8e5a8375b21c6e52c933d7
Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/3044
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

tcl/board: Add Diolan LPC4357-DB1 config

Adapted from diolan_lpc4350-db1.cfg. Both boards are identical except
for the SoC, so keep them in sync.

Change-Id: If892d8e953b0e3a9209a95b3b23a547357c10b7a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3038
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/target: Add LPC4357 config

Reuse the flashless LPC4350 as base and amend it as necessary.
The LPC43x7 have 2x 512 KB of flash.

Change-Id: Ia7ffbc7101023479971984b839f171ed4be6b089
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3037
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

docs: added note for increasing gdb remotetimeout when using the "gdb_port pipe" command.

Change-Id: I9c9514a193fd65454890571a17373b9c64d84757
Signed-off-by: fenugrec <fenugrec@users.sourceforge.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3040
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

doc: Fix sort order of flash drivers

fm3, nrf51, mdr, sim3x were at the end of the section rather than
inserted alphabetically. Fix this before adding further drivers.

Change-Id: Id23e04749cdd3b25d7503ec00fac554742d48c77
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3019
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/board: Add Spansion SK-FM4-U120-9B560 config

Change-Id: I01464b2a999890d50b95d0fb98ff46d8a04a2c57
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3009
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

Cortex-M: Detect Flash Patch Revision and implement Rev. 2 handling.

E.g. STM32F7 implements Rev.2.
Supercedes abandoned patch 2755 that doesn't evaluate Flash patch revision.

Change-Id: I48756b0451c7359475066969c900978a536bc328
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2868
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

fm4: Add JTAG support

Add support for the JTAG TAPID found on SK-FM4-U120-9B560-MEM V1.1.0 board.

Change-Id: Idbfe28927e0c549f0c89c29904d23971281927c9
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3039
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/target: Prepare FM4 MB9BFxxx family

It is found on the SK-FM4-U120-9B560-MEM V1.1.0 among others.

Change-Id: I4c708c9391e954cbbc8d0860a2a2dbd264aea865
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3008
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

fm4: Split out S6E2CC family config

Its memory layout is different from MB9BFxxx.

Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/board: Add Arndale config

Tested with Olimex ARM-USB-OCD-H adapter.

Change-Id: I1bf68176f9c155f8803df5a10a7fbe03116c6309
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3081
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/target: Add Exynos5250 config

Change-Id: Ia673d3f16b2238d5af8fbeff2d57c6cf27dcffb1
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3080
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

tcl/board: Add config for XMOS xCORE-XA Core Module ARM debugging

The xCORE-XA Core Module board has an XS1-XAU8A-10 SoC with 8 xCORE cores
and one ARM core. This config is for the ARM Cortex-M3, via J-Link OB.

Tested with "J-Link OB-STM32F103 V1 compiled Feb  5 2014 13:48:52".

Change-Id: Id7fadf8f323b45d5cfc0cae1054bd7b916771d6a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2763
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

tcl/target: Add config for XMOS XS1-XAU8A-10's ARM core

The XS1-XAU8A-10 has 8 xCORE cores and one ARM core.
This config represents the ARM Cortex-M3 core, which is apparently
Silicon Labs EFM32 Giant Gecko IP.

Change-Id: I998360f096c759d2e274d96c1ca2e0450ba61146
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2762
Tested-by: jenkins
Reviewed-by: Oleksij Rempel
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

tcl/board: Add Digilent Analog Discovery config

Change-Id: Idf2cb8d8578e650fda4082f6bbf272518762ebf0
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/2752
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>

tcl: Support for reading "Device DNA" from Spartan 6 devices.

Most Xilinx FPGA devices contain an embedded, unique device identifier
called the "Device DNA". The identifier is nonvolatile, permanently
programmed into the FPGA, and is unchangeable providing a great serial
/ tracking number.

Debugging was done in https://github.com/timvideos/HDMI2USB/issues/36

Change-Id: Iad03eafb40887f0321a4dc22858a7c3bf37a12b3
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2960
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

tcl: Adding the Numato Opsis board.

Another board supported by the ixo-usb-jtag project.

Change-Id: I676197c64e208886bc03d1bafcc964ef1fc2160b
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2963
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

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