openocd.git
4 years agojtag: drivers: xlnx-pcie-xvc: fix build after merge 02/5402/2
Antonio Borneo [Fri, 17 Jan 2020 15:44:00 +0000 (16:44 +0100)]
jtag: drivers: xlnx-pcie-xvc: fix build after merge

Commit [1] was submitted in gerrit well before the conflicting
commit [2] get merged in master branch. While it was fine
committing in master branch [1] alone, it should not be
committed "as is" after [2].
Unfortunately gerrit did not complained committing [1] after [2].
The result is that master branch does not build anymore when the
driver xlnx-pcie-xvc is enabled at configure time by the optional
flag --enable-xlnx-pcie-xvc.

Apply to the driver the required changes as in [2].
While there, remove the duplicated struct xlnx_pcie_xvc_transports
and the struct field already implicitly initialized to zero.

[1] ff6d0704ecd6 ("jtag: drivers: xlnx-pcie-xvc: Add support for
    Xilinx XVC/PCIe")
[2] efd1d642220a ("adapter: switch from struct jtag_interface to
    adapter_driver")

Change-Id: I5498479b802a231afbee1b845ae9775e1da7c728
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5402
Reviewed-by: Moritz Fischer <moritzf@google.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
4 years agoflash/nor/sh_qspi: Add SH QSPI driver 43/5143/17
Marek Vasut [Tue, 2 Apr 2019 14:44:18 +0000 (16:44 +0200)]
flash/nor/sh_qspi: Add SH QSPI driver

Add driver for the SH QSPI controller. This SPI controller is often
connected to the boot SPI NOR flash on R-Car Gen2 platforms.

Add the following two lines to board TCL file to bind the driver on
R-Car Gen2 SoC and make SRAM work area available:

  flash bank flash0 sh_qspi 0xe6b10000 0 0 0 ${_TARGETNAME}0 cs0
  ${_TARGETNAME}0 configure -work-area-phys 0xe6300000 -work-area-virt 0xe6300000 -work-area-size 0x10000 -work-area-backup 0

To install mainline U-Boot on the board, use the following procedure:

  proc update_uboot {} {
    # SPL
    flash erase_sector 0 0x0 0x0
    flash write_bank 0 /u-boot/spl/u-boot-spl.bin 0x0
    # U-Boot
    flash erase_sector 0 0x5 0x6
    flash write_bank 0 /u-boot/u-boot.img 0x140000
  }

Change-Id: Ief22f61e93bcabae37f6e371156dece6c4be3459
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
---
V2: - Add Makefile and linker script for the SH QSPI IO algorithm
    - Include the algorithm code instead of hard-coding it
Reviewed-on: http://openocd.zylin.com/5143
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agojtag_libusb_bulk_read|write: return error code instead of size 90/4590/21
Oleksij Rempel [Thu, 5 Jul 2018 11:42:14 +0000 (13:42 +0200)]
jtag_libusb_bulk_read|write: return error code instead of size

A USB bulk write/read operation may fail with different errors:
 LIBUSB_ERROR_TIMEOUT if the transfer timed out (and populates transferred)
 LIBUSB_ERROR_PIPE if the endpoint halted
 LIBUSB_ERROR_OVERFLOW if the device offered more data, see Packets and overflows
 LIBUSB_ERROR_NO_DEVICE if the device has been disconnected
 another LIBUSB_ERROR code on other failures

Current OpenOCD code is using the transfer size based error detection.
Which may not always work. For example for LIBUSB_ERROR_OVERFLOW as libusb
documentation says:
"Problems may occur if the device attempts to send more data than can fit in
the buffer. libusb reports LIBUSB_TRANSFER_OVERFLOW for this condition but
other behaviour is largely undefined: actual_length may or may not be accurate,
the chunk of data that can fit in the buffer (before overflow) may or may not
have been transferred."

This patch is refactoring code to use actual error return value for
error detection instead of size.

Change-Id: Iec0798438ca7b5c76e2e2912af21d9aa76ee0217
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4590
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agomips_ejtag: there is no DCR.MIPS64 bit 28/4628/6
Jiri Kastner [Wed, 1 Aug 2018 13:17:43 +0000 (15:17 +0200)]
mips_ejtag: there is no DCR.MIPS64 bit

available revisions (2.60, 3.10, 5.06 and 6.10) of
MD00047 (EJTAG specification), have only in IMPCODE
MIPS32/MIPS64 bit/flag.

Change-Id: If9191b6ced760c59bb7551bb041cd72b0a060bb1
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4628
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
4 years agojtag: drivers: xlnx-pcie-xvc: Add support for Xilinx XVC/PCIe 14/5314/15
Moritz Fischer [Fri, 4 Oct 2019 03:25:26 +0000 (20:25 -0700)]
jtag: drivers: xlnx-pcie-xvc: Add support for Xilinx XVC/PCIe

Add support for Xilinx Virtual Cable over PCIe JTAG controller.
It is commonly used in Xilinx based PCI Express designs with JTAG IP
in the FPGA fabric.

Access to the JTAG registers happens via the PCI Express extended
configuration space.

This can be used to debug soft-cores instantiated in the FPGA fabric.

The clang static checker doesn't find any new problems with this change.

Change-Id: Ib12ede0d1f26dacfda808d5e05b947b640c5bde7
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5314
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Marex
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoflash/nor: Rename flash_address() to cfi_flash_address() 91/5391/7
Marek Vasut [Sun, 5 Jan 2020 21:34:42 +0000 (22:34 +0100)]
flash/nor: Rename flash_address() to cfi_flash_address()

This is a preparatory change, align the function name with the rest
of the API, no functional change.

Change-Id: I6a810d2a54edcd13ad9a87d24a7334802c41623b
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5391
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: Rename get_cfi_info() to cfi_get_info() 90/5390/7
Marek Vasut [Sun, 5 Jan 2020 21:33:29 +0000 (22:33 +0100)]
flash/nor: Rename get_cfi_info() to cfi_get_info()

This is a preparatory change, align the function name with the rest
of the API, no functional change.

Change-Id: Ib967520f027b03eb1792b36ede52335df8e23941
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5390
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: Allow CFI memory read/write functions be overriden 47/5147/17
Marek Vasut [Sat, 13 Apr 2019 20:44:45 +0000 (22:44 +0200)]
flash/nor: Allow CFI memory read/write functions be overriden

Add possibility to supply custom CFI memory accessors via cfi_info
and override the default memory-mapped ones.

Change-Id: I1b6bc1db69fc33e8cdef96c41742c40e6d8917e9
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5147
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: Drop size argument of cfi_target_{read,write}_memory() 89/5389/6
Marek Vasut [Sun, 5 Jan 2020 16:26:18 +0000 (17:26 +0100)]
flash/nor: Drop size argument of cfi_target_{read,write}_memory()

The size argument is always set to bank->bus_width and bank pointer
is now passed into cfi_target_{read,write}_memory(), so the size
can be accessed through the bank pointer inside the function instead
of being explicitly passed in.

Change-Id: I0abc1cc3bf513281c10cb5de7a21cb0e75cb7676
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5389
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: Pass flash_bank to memory accessors 46/5146/16
Marek Vasut [Sun, 21 Apr 2019 14:28:10 +0000 (16:28 +0200)]
flash/nor: Pass flash_bank to memory accessors

Replace passing in struct target with passing in struct flash_bank,
so that the later can contain function pointers to custom per-driver
memory accessor functions.

Change-Id: Id2573a6d5f1a73ed9c4f73c53592a9a335a11c99
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5146
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget/xscale: remove duplicated command 82/5382/2
Tomas Vanek [Fri, 20 Dec 2019 22:54:29 +0000 (23:54 +0100)]
target/xscale: remove duplicated command

Reported by clang static analyzer.

Change-Id: I893af10852af4885507ed62d024008159a80dd56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5382
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/etm: add check for calloc error 81/5381/2
Tomas Vanek [Fri, 20 Dec 2019 22:50:26 +0000 (23:50 +0100)]
target/etm: add check for calloc error

and fix one more clang static analyzer warning.

Change-Id: I17f03e318e1cf7617e7f753e7ca960552be547e5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5381
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/semihosting_common: fix minor memory leak 80/5380/2
Tomas Vanek [Fri, 20 Dec 2019 22:48:46 +0000 (23:48 +0100)]
target/semihosting_common: fix minor memory leak

Reported by clang static analyzer.

Change-Id: Ie663f49d92588c0d8b502cfdd8fc34004b308066
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5380
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/target: fix clang static analyzer warnings 79/5379/2
Tomas Vanek [Fri, 20 Dec 2019 22:48:13 +0000 (23:48 +0100)]
target/target: fix clang static analyzer warnings

Change-Id: I23e6586be60915f21a7179a994a1ec93fb9b2c36
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5379
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/avr32_jtag: fix error returns 78/5378/3
Tomas Vanek [Fri, 20 Dec 2019 22:46:46 +0000 (23:46 +0100)]
target/avr32_jtag: fix error returns

Fixed only 2 error returns discovered by clang static analyzer.
There are obviously many more missing error tests in avr32_jtag.c
These was not fixed to keep this change minimal.
Not tested with hw.

Change-Id: I6c79f6248db774990ddb42c0dacdb621651ed69e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5378
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/arm_dpm: add missing error returns 77/5377/2
Tomas Vanek [Fri, 20 Dec 2019 22:45:20 +0000 (23:45 +0100)]
target/arm_dpm: add missing error returns

Discoverd by clang static analyzer.

Change-Id: I93d5de0a36216e62b170fe8cc870431226a7777f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5377
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/arm946e: add missing error detection 76/5376/2
Tomas Vanek [Fri, 20 Dec 2019 22:43:55 +0000 (23:43 +0100)]
target/arm946e: add missing error detection

Discoverd by clang static analyzer.
While on it remove useless type casts from arm946e_read_cp15() parameter.

Change-Id: I549e19685b431400243800ee0f7d1bbe6cdb14b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5376
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoserver/server: fix clang static analyzer warning 73/5373/2
Tomas Vanek [Fri, 20 Dec 2019 22:40:07 +0000 (23:40 +0100)]
server/server: fix clang static analyzer warning

Change-Id: I317e189b62540e3688a20d88a95f551280317f14
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5373
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoxsvf: fix memory leak 72/5372/2
Tomas Vanek [Fri, 20 Dec 2019 22:38:42 +0000 (23:38 +0100)]
xsvf: fix memory leak

Discovered by clang static analyzer.

Change-Id: I2980586aea5ee43226adb1f4cf72e7ba1dfddd83
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5372
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoflash/nor/stm32l4x: add support of STM32L4P5/L4Q5x devices 92/5392/2
Tarek BOCHKATI [Mon, 6 Jan 2020 17:33:42 +0000 (18:33 +0100)]
flash/nor/stm32l4x: add support of STM32L4P5/L4Q5x devices

STM32L4P/Q devices have:
 - similar flash layout as STM32L4R/S devices
 - 1024K of flash memory (some parts have 512K only)

tested on NUCLEO-L4P5ZG using board/st_nucleo_l4.cfg

Change-Id: I77047351bc7dcd7c76d0f31a77be73005104a06f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5392
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: add support of STM32WB on top STM32L4 flash driver 33/4933/6
Tarek BOCHKATI [Mon, 6 Jan 2020 16:19:31 +0000 (17:19 +0100)]
flash/nor: add support of STM32WB on top STM32L4 flash driver

Change-Id: I9fb6700085d817d35a691f6484193f67939a4e0f
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4933
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: add support of STM32L41/L42xx 34/4934/6
Tarek BOCHKATI [Mon, 6 Jan 2020 14:47:09 +0000 (15:47 +0100)]
flash/nor: add support of STM32L41/L42xx

tested using STM32L412KB

Change-Id: I1e2ae93d8c740db219f0fb579940de7f2fffac15
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4934
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/stm32l4x : add structure containers to hold devices' information 32/4932/13
Tarek BOCHKATI [Sun, 5 Jan 2020 22:19:41 +0000 (23:19 +0100)]
flash/nor/stm32l4x : add structure containers to hold devices' information

This rework is inspired from the 'flash/nor/stm32h7x.c'
This rework will ease the support of new devices on top of this driver:
  for example: STM32WB have different flash base and size addresses

Notes:
 - stm32l4_probe modified in order to charge the correct part_info from
   the defined stm32l4_parts according to the device id
 - stm32l4_flash_bank.bank2_start is replaced by .part_info->bank1_sectors
 - STM32_FLASH_BASE is removed , part_info->flash_regs_base will be used instead
   based on that flash register addresses are changed to offsets,
   >> stm32l4_get_flash_reg was modified accordingly
 - stm32l4_read_option and stm32l4_write_option was modified to accept an
   offset instead of an absolute address, luckily this is the commands'
   argument by default
 - stm32l4_mass_erase modifications :
     - use MER2 only on top of dual bank devices
     - wait for BUSY bit before starting the mass erase

Change-Id: Ib35bfc3cbadc76bbeaaaba9005b82077b9e1e744
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4932
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
4 years agotarget/target: parse value as proper type 19/5219/3
Christopher Head [Thu, 6 Jun 2019 18:40:12 +0000 (11:40 -0700)]
target/target: parse value as proper type

The `value` variable is passed into `target_fill_mem` as its
second-to-last parameter. That parameter is of type `uint64_t`. It is
appropriate to parse the value as that type, since otherwise a target
with a 32-bit address space but 64-bit data write capabilities would not
be able to exercise those capabilities.

Change-Id: Ib336d47d42c27cd2b5ba1206b04e8f740f167dba
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5219
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
4 years agostlink: fix handling of DPv1 and DPv2 banked registers 78/4978/6
Antonio Borneo [Thu, 28 Feb 2019 09:28:26 +0000 (10:28 +0100)]
stlink: fix handling of DPv1 and DPv2 banked registers

Arm DPv1 and DPv2 support banked registers by setting the bank in
field DPBANKSEL of register DP_SELECT.
Old ST-Link firmware don't support banked registers and setting a
bank other than bank zero on DPv1 or DPv2 cause issues in the
firmware because it cannot set back bank zero to read CTRL/STAT.
New ST-Link firmware mask away DPBANKSEL bits while writing in
DP_SELECT but support banked register using the same packed method
used by OpenOCD:
#define BANK_REG(bank, reg) (((bank) << 4) | (reg))

Add a new macro STLINK_F_HAS_DPBANKSEL for firmware that support
arm DPv1 and DPv2, plus trigger an error if banked registers are
requested on old firmware.
Prevent changing DPBANKSEL on old firmware.
Log a debug message when changing DPBANKSEL will be ignored.

Change-Id: Iaa592517831d63f8da2290db54f6b32504e3081b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4978
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agostlink: add DAP direct driver 04/4904/9
Antonio Borneo [Mon, 28 Jan 2019 17:53:53 +0000 (18:53 +0100)]
stlink: add DAP direct driver

STLINK-V3 and the new firmware V2J24 for ST-LINK/V2 provide API
to directly access the DAP registers.
This mode permits to use the native target in cortex_m.c, with no
need to override it with the target in hla_target.c.
Other advantages wrt HLA are: support for Cortex-A cores, support
for SoC multi-core and/or multi AP, support for OpenOCD commands
"dap" thus including control of CSW.
This obsoletes the existing HLA driver for ST-Link, that should
anyway be kept for those cases where it's not possible to update
the ST-Link firmware.

This commit introduces the minimal implementation for direct DAP
access. The implementation is much slower than the HLA because
every memory transfer requires several USB packets. Further
commits will close the performance gap.
The whole ST-Link driver is compiled under BUILD_HLADAPTER, to
remove the need to split the driver between the two modes. This
has to be reworked, but it's quite invasive!
A new interface file stlink-dap.cfg is added and should be used
in place of stlink.cfg to enable the DAP mode.
Documentation is updated and reports limitation on the maximum AP
number that can be accessed by ST-Link for some firmware already
tested.

Change-Id: I932ffe16bc81d00b1fe489e2944fda13470cce9b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4904
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoadi_v5_dapdirect: add support for adapter drivers that provide DAP API 03/4903/8
Antonio Borneo [Wed, 23 Jan 2019 09:52:28 +0000 (10:52 +0100)]
adi_v5_dapdirect: add support for adapter drivers that provide DAP API

Some high level adapters, like STLINK-V3 and new firmware for
ST-Link/V2, provide API to directly access the DAP registers
hiding the details of the physical transport JTAG or SWD.
OpenOCD has already the intermediate API in struct dap_ops that
are suitable for such adapters, but are not exposed to the
adapter drivers.

Add in struct adapter_driver two independent struct dap_ops for
the cases of physical JTAG and SWD transport.
Add new transport names "dapdirect_jtag" and "dapdirect_swd", to
be used by the drivers that provide one or both DAP API.
Add the necessarily glue in target/adi_v5_dapdirect.c

Change-Id: I2bb8e3a80fba750f2c218d877cfa5888428e3c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4903
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoTODO: add restructuring of JTAG/adapter layer 01/4901/8
Antonio Borneo [Tue, 22 Jan 2019 17:23:38 +0000 (18:23 +0100)]
TODO: add restructuring of JTAG/adapter layer

SWD is already implemented, so remove the item.
Rename the section JTAG as Adapter, including the subsections.
Add an initial list of pending activities after the restructure
of the JTAG layer.

Change-Id: I540777344c62a746df8347538fe8b29e4d72e1c7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4901
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoadapter: switch from struct jtag_interface to adapter_driver 00/4900/8
Antonio Borneo [Tue, 22 Jan 2019 15:31:18 +0000 (16:31 +0100)]
adapter: switch from struct jtag_interface to adapter_driver

To reorganize the adapters code, introduce an adapter_driver
struct that contains all the adapter generic part, while
keeping in two separate struct the specific API jtag_ops and
swd_ops.
Move the allocation of *adapter_driver from the JTAG-specific
file core.c to the more adapter-specific file adapter.c
While splitting the old jtag_interface for every driver, put
the fields in the same order as in the struct declaration so
we keep a consistent code across all the drivers.

While other transport specific API could/would be added as
separate ops, nothing is done here for HLA.

Change-Id: I2d60f97ac514c0dd2d93a6ec9be66fd9d388dad5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4900
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agodrivers/kitprog: remove unused JTAG execute_queue method 99/4899/8
Antonio Borneo [Tue, 22 Jan 2019 00:31:42 +0000 (01:31 +0100)]
drivers/kitprog: remove unused JTAG execute_queue method

kitprog is SWD only and we do not rely on JTAG queue anymore.
Remove the remaining JTAG heritage.

Change-Id: Ic586278368301eb669bc6e4e641f683a81cb171d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4899
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agohla: remove empty JTAG execute_queue method 98/4898/8
Antonio Borneo [Mon, 14 Jan 2019 21:52:42 +0000 (22:52 +0100)]
hla: remove empty JTAG execute_queue method

We do not rely on JTAG queue anymore.
Remove the remaining JTAG heritage.

Change-Id: I6c87d9ffebaa383c998cf273188b3e7f28b3fe95
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4898
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agojtag: print an errmsg on using jtag API for non jtag transport 97/4897/8
Antonio Borneo [Tue, 28 Aug 2018 12:49:10 +0000 (14:49 +0200)]
jtag: print an errmsg on using jtag API for non jtag transport

After the cleanup of swd and hla, there should be no more calls
to jtag_execute_queue() or to queue jtag commands if current
transport is not jtag. Thus we can start removing the jtag
specific code from adapters that do not support jtag.

To prevent some remaining call to jtag_execute_queue() to crash
openocd, verify the transport, print an error message if the
transport is not jtag, call the adapter's jtag_execute_queue()
only if it exist.
To identify code that still add commands in the jtag queue even
if transport is not jtag, print an error message in the function
jtag_queue_command(). For the moment, still queue the message,
even if will cause a memory leak if there is no following call
to jtag_execute_queue(); the target is to identify the issue and
cleanup the code, thus solving also the leak.

Change-Id: I8fc85f754aa057aad1df05ff0448c8619897da23
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4897
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agohla: use the new system_reset API 96/4896/7
Antonio Borneo [Fri, 6 Sep 2019 09:00:19 +0000 (11:00 +0200)]
hla: use the new system_reset API

HLA uses its own internal driver's API to control the adapter's
system reset, but at the same time it calls jtag_add_reset() to
avoid breaking the internal logic of OpenOCD. This implicitly
forces HLA to rely on jtag queue mechanism, even if HLA has no
link with JTAG state machine. It requires HLA to implement an
empty execute_queue() to comply with the JTAG queue.

Modify the HLA framework and the HLA targets to use the new
adapter API for system_reset and decouple HLA from JTAG queue.
Rename the HLA static functions adapter_assert_reset() and
adapter_deassert_reset() to avoid overlap with the global
functions with same name.
While there, fix a minor typo in a comment s/incase/in case/.

Do not remove from HLA the JTAG specific API execute_queue(),
even if not required anymore, because OpenOCD code still has
calls to jtag_execute_queue() in case of non JTAG transport.

Change-Id: I0e65e3e557bd665bd3d3aeaa84ea609b55a05e48
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4896
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agobitbang: jtag-only drivers: switch to new reset API 00/5300/3
Antonio Borneo [Wed, 4 Sep 2019 14:47:24 +0000 (16:47 +0200)]
bitbang: jtag-only drivers: switch to new reset API

Remove the JTAG_RESET command from the bitbang execute queue now
that all bitbang drivers have moved away from old reset method.
Remove also the internal reset API in struct bitbang_interface.

Tested parport only.

Change-Id: I12b157ef442f4c9912406b19b7a4d32ba6ec0b53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5300
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoswd: get rid of jtag queue to assert/deassert srst 95/4895/7
Antonio Borneo [Sat, 31 Aug 2019 09:08:16 +0000 (11:08 +0200)]
swd: get rid of jtag queue to assert/deassert srst

The transport SWD uses the JTAG queue to assert/deassert the
system reset srst. This is the major inconsistency that has to be
removed to properly split JTAG and SWD.

Introduce a new driver API, reset(), to controls both the signals
trst and srst in the driver, skipping the JTAG queue. Put the new
API in struct jtag_interface, even if in this patch it's used for
SWD only; the goal is to get it reused by the other transports.

Add the implementation of the API in all the drivers that
implement SWD. Such implementation is almost the same of the old
code in JTAG queue.

Create a wrapper adapter_system_reset() to use the new API and
remove the SWD specific swd_add_reset(). In the wrapper replace
jtag_add_sleep() with jtag_sleep(), because the former uses the
JTAG queue too.
Rename the old jtag_add_reset() as legacy_jtag_add_reset() with
the target to remove it when all drivers would be ported to the
new reset API. Create a new jtag_add_reset() that calls the
legacy function for drivers still on the old reset API.

Use the new API also on JTAG transport for the drivers that can
support both SWD and JTAG.

For the moment, do not modify the implementation of JTAG-only
drivers, which will continue using the usual method. This should
be cleaned-up in future commits.

Change-Id: I32331c88313f6059b25e12c6bb0156aebc1c074f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4895
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor: Factor out CFI memory read/write functions 45/5145/11
Marek Vasut [Sun, 21 Apr 2019 13:54:38 +0000 (15:54 +0200)]
flash/nor: Factor out CFI memory read/write functions

Create separate memory read/write functions which facilitate access
to the CFI NOR, so that they can be replaced by controller-specific
functions if necessary. This would become necessary when implementing
support for e.g. HyperFlash controllers, which do not directly map
the HyperFlash into the address space.

Change-Id: I1bba1edfd397cb37bfedb43efe2dd03feb26a375
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5145
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agoflash/nor: Factor out cfi_spansion_unlock_seq() 44/5144/11
Marek Vasut [Fri, 19 Apr 2019 18:34:36 +0000 (20:34 +0200)]
flash/nor: Factor out cfi_spansion_unlock_seq()

Factor out the spansion unlock sequence to deduplicate the code.

Change-Id: Id78522e9a2f0e701870ef816772289d08257476a
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5144
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agoflash/nor/stm32f2x: Support value line chips with trimmed flash 26/4926/12
Keir Fraser [Tue, 3 Dec 2019 08:17:56 +0000 (08:17 +0000)]
flash/nor/stm32f2x: Support value line chips with trimmed flash

The current code assumes an STM32's flash bank is laid-out in either of
two configurations:
- 4 x 16kB + 1 x 64kB + n x 128kB
- 4 x 32kB + 1 x 128kB + n x 256kB

This is quite ad-hoc but works fine in practice, as long as there are at
least 5 sectors (if n=0). Unfortunately, some newer STM32s are shipping
with only 64 kB of flash (4 x 16kB sectors).

This patch still assumes the same sector layout, but only keeps adding
sectors to the bank if the bank's capacity has not been reached. This
prevents openocd from crashing on some newer STM32s.

Change-Id: If00e5d7a328d11b399babc0bb2111e3ad8a3217e
Signed-off-by: Romain Goyet <romain.goyet@numworks.com>
Signed-off-by: Keir Fraser <keir.xen@gmail.com>
Reviewed-on: http://openocd.zylin.com/4926
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoarm_adi_v5: add API send_sequence() and use it 02/4902/7
Antonio Borneo [Wed, 23 Jan 2019 15:46:31 +0000 (16:46 +0100)]
arm_adi_v5: add API send_sequence() and use it

The method to send an arbitrary sequence to DAP depends on the
transport and is thus different on JTAG and SWD. This is already
coded in dap_to_jtag() and dap_to_swd().

Add a new API send_sequence() in struct dap_ops.
Add the implementations of send_sequence() in adi_v5_jtag.c and
adi_v5_swd.c
Rewrite dap_to_jtag() and dap_to_swd() using the new API.
Move the enum swd_special_seq in arm_adi_v5.h to solve a circular
dependencies among swd.h and arm_adi_v5.h

Change-Id: I9db13a00f129761eab283783c094cfff2dd92610
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4902
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotcl: update scripts after "jtag_reset" got deprecated 87/5287/3
Antonio Borneo [Wed, 14 Aug 2019 12:53:24 +0000 (14:53 +0200)]
tcl: update scripts after "jtag_reset" got deprecated

Avoid annoying "deprecated" messages in the scripts
distributed with OpenOCD code.

Change-Id: I82d27cd420db30f0653efbd286a627ef56a8c1fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5287
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agojtag: replace command "jtag_reset" with "adapter [de]assert" 86/5286/3
Antonio Borneo [Wed, 14 Aug 2019 12:51:06 +0000 (14:51 +0200)]
jtag: replace command "jtag_reset" with "adapter [de]assert"

Replace the JTAG transport specific command with a more generic
one. Deprecate "jtag_reset" and update the documentation.
While there, fix an error in the documentation, where the command
"jtag_reset" was used in place of command "reset_config".

Change-Id: I41a988d37ce69f7b35a960cbaf5306aab0299b99
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5286
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoadapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]" 77/5277/5
Antonio Borneo [Thu, 10 Jan 2019 09:58:15 +0000 (10:58 +0100)]
adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"

Inspired from http://openocd.zylin.com/#/c/3720/1

Add commands to control the adapter's signals srst and trst.
Add macros for the flag's values assert/deassert to make clear what
they mean and to propose a uniform set of values across the code.

Change-Id: Ia8b13f4ded892942916cad7bda49540a896e7218
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5277
Tested-by: jenkins
4 years agojtag_vpi: multiple improvements 77/5177/11
Jan Matyas [Mon, 21 Oct 2019 06:44:08 +0000 (08:44 +0200)]
jtag_vpi: multiple improvements

- Fix: Proper handling of read_socket() and write_socket()
in case of "partial" read/write.

- Added low-level JTAG IO debug capability (_DEBUG_JTAG_IO_)

- Zero-fill packet buffers, avoid sending pieces of uninitialized
memory over the network (memset struct vpi_cmd)

- Use close_socket() instead of close() - needed for Win32

- Fixed usage messages of jtag_vpi_command_handlers

Change-Id: I8bd19bc5c9512fe8e798600212e8a95213f50f5b
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5177
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/stm32f1x: fix options reading from locked chip 40/4940/3
Oleksandr Redchuk [Sat, 23 Feb 2019 21:03:13 +0000 (23:03 +0200)]
flash/nor/stm32f1x: fix options reading from locked chip

In commit cea40152f82f52bfc718c7bda9fa4a9d70bf9cfd option bytes
reading was changed to direct access to option bytes area.
While there are no problems with stm32f0xx and stm32f3xx chips,
option block (0x1ffff800..0x1ffff80F) is unreadable from locked
stm32f10x chips.
As a result, stm32f1x unlock command writes dirty values to user
options, user data and write protection bits.

Option bytes reading reverted from direct access to option bytes area
to reading currently loaded bytes from  FLASH_OBR/FLASH_WRPR registers.

Tested on stm32f100, stm32f103, stm32f107 as well as on stm32f030 and
stm32f303.

Change-Id: Iad476351ffdaca5ace12e02272dacea7f3d08f52
Signed-off-by: Oleksandr Redchuk <real@real.kiev.ua>
Reviewed-on: http://openocd.zylin.com/4940
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agocontrib/rpc_examples: Add (dis)connect methods 89/5189/2
Marc Schink [Mon, 20 May 2019 16:14:46 +0000 (18:14 +0200)]
contrib/rpc_examples: Add (dis)connect methods

Add these methods such that the OpenOcd class can also be used outside
of a 'with' statement.

Change-Id: I927c93fff2dc05cc74daa56360a7262e736a639f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5189
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agortos/FreeRTOS: Fix FreeRTOS thread list reading 73/5273/2
Rahul Masurkar [Tue, 6 Aug 2019 12:49:07 +0000 (18:19 +0530)]
rtos/FreeRTOS: Fix FreeRTOS thread list reading

Change-Id: I749ae94ec7279907b1905c02ecc1e9661f43ef70
Signed-off-by: Rahul Masurkar <rahulgm@marvell.com>
Reviewed-on: http://openocd.zylin.com/5273
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/kinetis: fix clang static analyzer warnings 57/5357/2
Tomas Vanek [Tue, 10 Dec 2019 19:12:58 +0000 (20:12 +0100)]
flash/nor/kinetis: fix clang static analyzer warnings

Use assert to remove "Dereference of null pointer" warnings.

Change-Id: Ie204c234a71758e6470351e1d9f22da3dd887f56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5357
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotarget/arm_cti: add new 'ack' and 'channel' commands 15/5315/4
Tarek BOCHKATI [Mon, 16 Dec 2019 15:05:17 +0000 (16:05 +0100)]
target/arm_cti: add new 'ack' and 'channel' commands

these commands have been introduced to ease the manipulation of CTI trough
script files, these commands are:
 - $cti_name ack $event : to acknowledge a CTI event
 - $cti_name channel $channel_number $operation: to perform an operation
    on a specific channel, the possible operations are:
    gate, ungate, set, clear and pulse

Change-Id: I35463867a3c85072f3776c3aeb1e5788953ec435
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5315
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
4 years agoflash/nor/stm32h7: (minor) use proper variable names and enhance logging 62/5362/4
Tarek BOCHKATI [Mon, 16 Dec 2019 14:21:33 +0000 (15:21 +0100)]
flash/nor/stm32h7: (minor) use proper variable names and enhance logging

-fsize_base should be fsize_addr as it is the address of FLASH_SIZE register
-flash_base should be flash_regs_base to avoid confusion with flash block start
-add LOG_ERROR to functions stm32x_[read|write]_flash_reg(...)

Change-Id: I86f035314bcd616fc0bdf445692d945a85c15481
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5362
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotcl/target: swm050: fix to allow to use with ST-Link 97/5297/2
Icenowy Zheng [Mon, 9 Sep 2019 19:32:36 +0000 (03:32 +0800)]
tcl/target: swm050: fix to allow to use with ST-Link

Currently the code assumes the adapter uses raw SWD, and the expected ID
code of the CPU is even wrong. An adapter speed is also not specified.
All these prevents the config file to be used with ST-Link.

Fix the config file, to allow it to be used with ST-Link.

Change-Id: I1244320fabfe8ee23da5a56a592dbeddc72cc8d5
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-on: http://openocd.zylin.com/5297
Tested-by: jenkins
Reviewed-by: Caleb Szalacinski <contact@skiboy.net>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget/armv7m_trace: Improve SWO frequency auto-detection 03/3903/5
Marc Schink [Fri, 2 Dec 2016 14:39:23 +0000 (15:39 +0100)]
target/armv7m_trace: Improve SWO frequency auto-detection

The SWO frequency auto-detection with J-Link adapters does not work
properly in the current implementation. This is because the trace layer
has only information about the highest possible SWO frequency supported
by the adapter. With that the trace layer calculates the SWO prescaler
which usually leads to a frequency deviation greater than what is
permitted by J-Link adapters.

Move the calculation of the SWO prescaler from the trace layer into the
trace configuration of the adapter to overcome this problem.
The adapter has the necessary information to choose a suitable SWO
frequency and calculate the corresponding prescaler that complies with
the maximum allowed frequency deviation.

Tested with:
  - STM32L152RC Discovery Kit (ST-Link)
  - EFM32GG-STK3700 (J-Link)

Change-Id: I38ff2b89d32f0a92c597989b590afe5c75cf4902
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3903
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agohelper/command: remove unused field in struct command_registration 25/5225/2
Antonio Borneo [Fri, 7 Jun 2019 13:31:06 +0000 (15:31 +0200)]
helper/command: remove unused field in struct command_registration

The field jim_handler_data in struct command_registration is never
assigned, thus has always value NULL. It was added in commit
17a9dea53a71 ("add jim_handler to command_registration") on Nov 23
2009, together with the homonym field jim_handler_data in struct
command, but never used since then.
Only the field jim_handler_data in struct command is used.

Remove the field from struct command_registration and use NULL
where it was referenced (or remove the assignment if the recipient
is already zero, e.g. allocated with calloc()).

Removing the field decreases the total size of OpenOCD binary by
only 4944 byte on a 64 bit x86. Not a significant improvement from
this point of view.

Change-Id: I9f1d281e3de6b2eb398e2d883c5e9ff92628aecd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5225
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget/armv4_5: use c99 array designator to init arm_core_regs[] 56/5256/2
Antonio Borneo [Mon, 24 Jun 2019 21:44:00 +0000 (23:44 +0200)]
target/armv4_5: use c99 array designator to init arm_core_regs[]

During code analysis and development, counting again and again the
lines to find the index of the register is a boring error-prone
brain-damaging activity.
Use the c99 syntax and add once forever the array designators to
specify the index values.
The code behavior is not changed.

Change-Id: I2c70f70794475679efb91a8dfadc00f50715bd3f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5256
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agosysfsgpio: give time to udev to change gpio permission 02/5302/3
Antonio Borneo [Thu, 5 Sep 2019 08:48:12 +0000 (10:48 +0200)]
sysfsgpio: give time to udev to change gpio permission

When a gpio is exported by writing in /sys/class/gpio/export, the
corresponding gpio control files appear immediately in sysfs but
with default access permission for root user only. The daemon udev
requires some time to get notified of the new files before it can
change the permissions to allow access to unprivileged users.
Due to this race condition, sysfsgpio can fail with EACCES error
if OpenOCD is executed by any unprivileged user.

Give 0.5 seconds to udev to identify the new files and change the
permission.

Tested with udev rules:
SUBSYSTEM=="gpio*", PROGRAM="/bin/sh -c 'find -L /sys/class/gpio/ -maxdepth 2 -exec chown root:uucp {} \; -exec chmod g=u {} \; || true'"

Change-Id: I1316c66ff103ffe23e5e4720f33372dc272a3766
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5302
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agogdb_server: fix extended_protocol for multi-target 10/5310/2
Antonio Borneo [Fri, 27 Sep 2019 10:27:01 +0000 (12:27 +0200)]
gdb_server: fix extended_protocol for multi-target

The flag extended_protocol is currently a single static variable
thus, in case of multiple targets, it is shared among all the gdb
connections. This is an issue if the gdb connections are not all
using extended protocol, but also when one connection get closed
because the code sets the flag to zero impacting the other
connections still open.

Move the flag extended_protocol in the per-connection struct
gdb_connection.

Change-Id: I19d565f925df6a31767fd8d392242f60867109f2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5310
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agogdb_server: fix string length with semihosting_fileio 22/5322/3
Antonio Borneo [Thu, 17 Oct 2019 16:02:38 +0000 (18:02 +0200)]
gdb_server: fix string length with semihosting_fileio

The GDB file-I/O remote protocol extension, used for implementing
the semihosting file I/O, requires the length of strings to
include the trailing zero character, as explicitly stated inside a
comment in GDB source code [1]:
/* 1. Parameter: Ptr to pathname / length incl. trailing zero.  */

ARM specification for semihosting [2] requires the string length
to not include the trailing zero character, e.g. in SYS_OPEN
specifications:
"field 3: An integer that gives the length of the string
 pointed to by field 1. The length does not include the
 terminating null character that must be present."

The mismatch above requires OpenOCD to add "one" to the string
length before passing it to GDB. Such conversion is missing
either in the generic semihosting provider of the data, the
function semihosting_common(), and in the consumer of the data,
the gdb_server function gdb_fileio_reply().
The conversion is already implemented in the target specific
function nds32_get_gdb_fileio_info(), but it's not the preferred
place for such GDB specific requirement.

This issue affects the semihosting calls "open", "unlink",
"rename" and "system".

Remove the "+1" conversion from nds32_get_gdb_fileio_info().
Add the "+1" conversion in gdb_fileio_reply().

[1] http://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;f=gdb/remote-fileio.c;h=11c141e42c4d#l381
[2] "Semihosting for AArch32 and AArch64, Release 2.0"
    https://static.docs.arm.com/100863/0200/semihosting.pdf

Change-Id: I35461bcb30f734fe2d51f7f0d418e3d04b4af506
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5322
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/stm32f2x: fix clang static analyzer warning 56/5356/2
Tomas Vanek [Tue, 10 Dec 2019 18:49:01 +0000 (19:49 +0100)]
flash/nor/stm32f2x: fix clang static analyzer warning

Using a signed variable as a parameter of FLASH_SNB() macro
generated "warning: The result of the left shift is undefined
because the left operand is negative"

Change-Id: I8b3fe840f9308962460906097df6ddd848c07b25
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5356
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agojtag_vpi: ensured constant packet size & endianness 52/5152/8
Jan Matyas [Thu, 2 May 2019 09:53:15 +0000 (11:53 +0200)]
jtag_vpi: ensured constant packet size & endianness

Made sure that size and endianness of jtag_vpi structures sent
over the network is the same, regardless of the platform.

Little endian chosen to maintain as much compatibility
with existing OpenOCD builds as possible.

Matching change in the original jtag_vpi server:
https://github.com/fjullien/jtag_vpi/pull/4

Change-Id: Ib839fea9bb2d5190b5643c970b89333b286dce71
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5152
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
4 years agoflash/nor/nrf5: remove check for protected sector 48/5348/2
Tomas Vanek [Thu, 9 May 2019 14:38:47 +0000 (16:38 +0200)]
flash/nor/nrf5: remove check for protected sector

The new "Access control list" flash protection scheme used in nRF52840
is not yet supported. Do not prevent sector erase if protection
state is unknown.

Change-Id: Iae9a869a54ffbdc888fb3ec478dafb5c942d9ea0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5348
Tested-by: jenkins
4 years agoserver/tcl_server.c: Fix buffer overrun 52/5352/2
Jimmy [Thu, 5 Dec 2019 06:45:17 +0000 (14:45 +0800)]
server/tcl_server.c: Fix buffer overrun

The input buffer size is checked only after writing past its end.

Change-Id: I6a9651c5b7d82efe338468d67bf6caca41004b01
Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: http://openocd.zylin.com/5352
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoserver: gdb_server: fix memory map generation on a 32-bit BE host 42/5342/2
Paul Fertser [Wed, 6 Nov 2019 16:04:57 +0000 (19:04 +0300)]
server: gdb_server: fix memory map generation on a 32-bit BE host

Due to lack of printf format check wrong specifier was used and it
actually broke operation on a 32-bit BE host.

So fix this and add the necessary function attributes so that the bugs
like that can be uncovered automaticaly.

Reported and pinpointed by Karl Palsson on IRC.

Change-Id: I254ec28fcd9bb30594d607f74a6dba5456c2c7a1
Tested-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5342
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotarget/stm32h7x: add support of dual core variant of STM32H7 30/5130/11
Tarek BOCHKATI [Wed, 27 Nov 2019 18:10:34 +0000 (19:10 +0100)]
target/stm32h7x: add support of dual core variant of STM32H7

STM32H7x7 and STM32H7x5 devices contains two cores : CM7 + CM4
The second core creation is only done when
  * DUAL_CORE variable is set to true
  * non HLA interface is used

A second check for the second core existence is done in cpu1 examine-end
Once the second core is detected it gets examined.

Furthermore, the script provides a configurable CTI usage in order to halt
the cores simultaneously.

Tested on Rev X and V devices.

PS: the indentation was a mix of spaces and tabs, all changed to tabs.

Change-Id: Iad9c30826965ddb9be5dee628bc2e63f953bbcb8
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5130
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agomips64: Add generic mips64 target support 22/2322/31
Peter Mamonov [Tue, 23 Sep 2014 08:51:05 +0000 (12:51 +0400)]
mips64: Add generic mips64 target support

Change-Id: I2bdd2573f23e65652686d18031698f423eec77c0
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2322
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agomips: Add MIPS64 support 21/2321/28
Peter Mamonov [Tue, 23 Sep 2014 08:46:02 +0000 (12:46 +0400)]
mips: Add MIPS64 support

The patch adds support for processors implementing MIPS64 instruction set.

Change-Id: I79a983dfdead81553457a0f3e9e739a9785afaac
Signed-off-by: Konstantin Kostyukhin <kost@niisi.msk.ru>
Signed-off-by: Andrey Sidorov <anysidorov@gmail.com>
Signed-off-by: Aleksey Kuleshov <rndfax@yandex.ru>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
CC: Dongxue Zhang <elta.era@gmail.com>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2321
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agotarget/stm32h7x: Use AP2 to access DBGMCU when non HLA adapter is used 42/4742/7
Christopher Head [Sun, 28 Oct 2018 22:27:59 +0000 (15:27 -0700)]
target/stm32h7x: Use AP2 to access DBGMCU when non HLA adapter is used

The STM32H7 has three access ports. The DBGMCU component is available
through AP0 at 0x5C001000 and through AP2 at 0xE00E1000. Using the
latter is preferable for early configuration because it works in all
power states and while SRST is asserted, whereas the former does not.

Change-Id: Iaf8f01d769efb6655040060a8e1e951e1f7e50ab
Signed-off-by: Christopher Head <chead@zaber.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/4742
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/stm32h7x: remove options cache and some driver enhancements 93/5293/6
Tarek BOCHKATI [Mon, 9 Sep 2019 18:38:10 +0000 (20:38 +0200)]
flash/nor/stm32h7x: remove options cache and some driver enhancements

functions managing option bytes cache (stm32x_read/write_options)
have bee removed, and a new functions to modify a single option byte
have been introduced (stm32x_write/modify_option).

by the way, some helpers have been introduced to access flash registers:
  - stm32x_read_flash_reg(bank, offset, *value): int
  - stm32x_write_flash_reg(bank, offset, value): int

and a new commands to read and write a single flash option register:
  - stm32h7x option_read <bank> <option_reg offset>
  - stm32h7x option_write <bank> <option_reg offset> <value> [mask]

also lock and unlock handlers' have been reduced by using the same routine
(stm32x_set_rdp) and have been optimized to not write options unless
there is a change in RDP level.

finally, several functions have been fixed to lock flash / options in case
of failure.

Change-Id: I75057949ab9f5b4e0f602bafb76f9f80d53a522b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5293
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/stm32h7x: fix option bytes handling to work with both banks 91/5291/4
Tarek BOCHKATI [Thu, 29 Aug 2019 13:58:39 +0000 (15:58 +0200)]
flash/nor/stm32h7x: fix option bytes handling to work with both banks

To achieve that we need to avoid using FLASH_REG_BASE_B0, and use
bank registers instead:
   For dual bank devices, each option register is mapped in 2 addresses
   at the same offset from flash_bank_reg_base.
   This is true for OPTCR, OPTKEYR, OPTSR_CUR/PRG, OPTCCR according to
   RM0433 Rev6 (refer to section 3.9: FLASH registers)

In stm32x_write_options, according to RM0433 Rev6, after OBL launch we
should wait for OPTSR_CUR.BSY bit instead of FLASH_SR.QW

Change-Id: Ie24a91f069d03c9233797390fc2e925c737dad90
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5291
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/stm32h7x: remove stm32x_options.protection2 90/5290/3
Tarek BOCHKATI [Thu, 29 Aug 2019 15:03:19 +0000 (17:03 +0200)]
flash/nor/stm32h7x: remove stm32x_options.protection2

Each bank had to store its options only, there is no need for bank1
to sneak into bank2 options.
Furthermore, some variants do not have a second bank.

Change-Id: I9229eb8ab4b5860ba2b0c5dbe626a54a84bca4d6
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5290
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/nor/nrf5: fix allocation of driver_priv and sector array 10/4910/3
Tomas Vanek [Wed, 23 Jan 2019 19:36:46 +0000 (20:36 +0100)]
flash/nor/nrf5: fix allocation of driver_priv and sector array

Drop static pointer to allocated struct nrf5_info, iterate over
the flash bank list to find previously allocated nrf5 instances.
nrf5 is swd only device, so static allocation makes no harm,
but we should avoid copying the wrong code to other flash drivers.

Free sector array before allocating it to avoid memory leak on
re-probing device.

Change-Id: I781d8f4418a91c043f2393e5ecc5278fc6df3566
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4910
Tested-by: jenkins
4 years agoflash/nor/nrf5: show RAM size on old nRF51 devices (rev 1, 2) 68/4868/3
Tomas Vanek [Mon, 21 Jan 2019 15:25:07 +0000 (16:25 +0100)]
flash/nor/nrf5: show RAM size on old nRF51 devices (rev 1, 2)

Change-Id: I2452c084b9bd9e401bd49e15791428a53df1cd1d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4868
Tested-by: jenkins
4 years agoflash/nor/nrf5: do not check FICR PPFC on nRF52 67/4867/3
Tomas Vanek [Mon, 21 Jan 2019 13:44:45 +0000 (14:44 +0100)]
flash/nor/nrf5: do not check FICR PPFC on nRF52

Change-Id: I6beee9b85a542040f2495513b5ba51bd8e1389db
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4867
Tested-by: jenkins
4 years agoflash/nor/nrf5: rename registers by nRF series 66/4866/3
Tomas Vanek [Mon, 21 Jan 2019 13:43:21 +0000 (14:43 +0100)]
flash/nor/nrf5: rename registers by nRF series

Change-Id: I70af671c52665b27a28508e06e7d3e5e40a621f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4866
Tested-by: jenkins
4 years agoflash/nor/nrf5: refactor sector allocation to use alloc_block_array() 65/4865/4
Tomas Vanek [Sun, 20 Jan 2019 22:58:51 +0000 (23:58 +0100)]
flash/nor/nrf5: refactor sector allocation to use alloc_block_array()

Change-Id: Ied8ea917cec492fc6bb8836a92d8c4ceaf3b499b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4865
Tested-by: jenkins
4 years agoflash/nor/nrf5: implement BPROT protection check for nRF52810,832 64/4864/4
Tomas Vanek [Sun, 20 Jan 2019 22:56:46 +0000 (23:56 +0100)]
flash/nor/nrf5: implement BPROT protection check for nRF52810,832

Also refuse 'flash protect' on any nRF52.
Fail protection check on nRF52840 until ACL protection is implemented.

Change-Id: I84fcf117427e4894147c3ad92e2a3597566b4fcf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4864
Tested-by: jenkins
4 years agoflash/nor/nrf5: detect newer devices without HWID table 48/4848/3
Tomas Vanek [Sun, 13 Jan 2019 08:31:03 +0000 (09:31 +0100)]
flash/nor/nrf5: detect newer devices without HWID table

nrf5 flash driver detected devices by looking up the HWID in the table
of known devices. Unfortunately chips are produced with many different
HWIDs for each type.

All nRF52 devices have FICR INFO field suitable for device identification
without need of HWID lookup.
Some newer nRF51 devices have FICR INFO too although undocumented.
Use this information to identify the device.

nrf5_info() is reworked to show just concise info.
Decoding FICR and UICR registers was moved from nrf5_info()
to a new command 'nrf5 info' without functional changes.

The flash bank for UICR page has the same size as program flash sector.

Change-Id: I900095b9ae23ee995f8e2bef8539b75d00300da5
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4848
Tested-by: jenkins
4 years agoflash/nor/nrf5: remove useless page padding and UICR autoerase 19/4819/3
Tomas Vanek [Sat, 22 Dec 2018 23:39:34 +0000 (00:39 +0100)]
flash/nor/nrf5: remove useless page padding and UICR autoerase

nRF5 flash controller can write a word at a time. Ask flash
infrastructure to handle alignment and padding.

Fix mixing of offset and address in nrf5_ll_flash_write()
- the original code worked just because NRF5_FLASH_BASE is 0

Change-Id: Ibe8bdf899a1764cf4117b2deda1a4618eeb16697
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4819
Tested-by: jenkins
4 years agohelper: skip including sys/sysctl.h on Linux 17/5317/2
Antonio Borneo [Tue, 8 Oct 2019 09:17:09 +0000 (11:17 +0200)]
helper: skip including sys/sysctl.h on Linux

Starting from glibc 2.30, the header file sys/sysctl.h gets
deprecated on Linux, after the commit 744e82963716 ("Linux:
Deprecate <sys/sysctl.h> and sysctl")
https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=744e82963716

The associated NEWS reports
The Linux-specific <sys/sysctl.h> header and the sysctl
function have been deprecated and will be removed from a
future version of glibc.

Latest automake 1.16.1 still does not handle this case.
Current OpenOCD build fails with warning and requires configure
with "--disable-werror" to build.

Prevent including sys/sysctl.h on Linux build.

Change-Id: I5310976573352a96e5aef123352f73475f0c35fe
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5317
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritz.fischer.private@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agoCVE-2018-5704: Prevent some forms of Cross Protocol Scripting attacks 35/4335/3
Andreas Fritiofson [Sat, 13 Jan 2018 20:00:47 +0000 (21:00 +0100)]
CVE-2018-5704: Prevent some forms of Cross Protocol Scripting attacks

OpenOCD can be targeted by a Cross Protocol Scripting attack from
a web browser running malicious code, such as the following PoC:

var x = new XMLHttpRequest();
x.open("POST", "http://127.0.0.1:4444", true);
x.send("exec xcalc\r\n");

This mitigation should provide some protection from browser-based
attacks and is based on the corresponding fix in Redis:

https://github.com/antirez/redis/blob/8075572207b5aebb1385c4f233f5302544439325/src/networking.c#L1758

Change-Id: Ia96ebe19b74b5805dc228bf7364c7971a90a4581
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reported-by: Josef Gajdusek <atx@atx.name>
Reviewed-on: http://openocd.zylin.com/4335
Tested-by: jenkins
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
4 years agoSTM8 Target relicensing to GPLv2 and later 31/5331/3
Ake Rehnman [Sun, 27 Oct 2019 18:48:25 +0000 (19:48 +0100)]
STM8 Target relicensing to GPLv2 and later

Change-Id: I21126945c0475399aaf12239b8972fde5fddd845
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5331
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agojtag: usb_blaster: Add missing 'default' to switch statement 33/5333/2
Alexandru Gagniuc [Sun, 27 Oct 2019 16:59:47 +0000 (11:59 -0500)]
jtag: usb_blaster: Add missing 'default' to switch statement

If a new JTAG command is added, then GCC will complain that
enumeration value not handled in switch. This is the only driver not
to have a default case, so add it.

Change-Id: Icb838087bb7525d057a911bd256300e256da1668
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/5333
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agojtag: jtag_vpi: Add missing 'default' to switch statement 40/5340/2
Alexandru Gagniuc [Wed, 30 Oct 2019 03:14:46 +0000 (22:14 -0500)]
jtag: jtag_vpi: Add missing 'default' to switch statement

If a new JTAG command is added, then GCC will complain that
enumeration value not handled in switch. Make this consistent with
other drivers, and add a 'default' case.

Change-Id: I66d6d0db3fcae93ea246f2d4882ffff5dec14693
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/5340
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agolibjaylink: Update to latest Git version 09/5309/2
Marc Schink [Sat, 28 Sep 2019 16:13:37 +0000 (18:13 +0200)]
libjaylink: Update to latest Git version

This version adds two new USB PIDs and fixes a build issue under MSYS2.

Change-Id: I753fab827783ea64e55e59d833742c9f70a28a2b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/5309
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
4 years agonrf5: update links to compatibility matrixes for nrf5x variants 43/4843/4
Mirko Vogt [Fri, 11 Jan 2019 13:40:55 +0000 (14:40 +0100)]
nrf5: update links to compatibility matrixes for nrf5x variants

Change-Id: If51aa992ccbb8c9a2e502b74827a36a62010546d
Signed-off-by: Mirko Vogt <mirko.vogt@sensorberg.com>
Reviewed-on: http://openocd.zylin.com/4843
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget/cortex_a: Extract code to read/write from/to register to/from DCC 27/5227/3
Florian Fainelli [Tue, 11 Jun 2019 18:55:23 +0000 (11:55 -0700)]
target/cortex_a: Extract code to read/write from/to register to/from DCC

In preparation for supporting the ARM MCRR and MRRC commands which will
require using two 32-bit registers to read/write a 64-bit internal
register, extract the common logic to read/write from/to a register
to/from DCC and make that parameterized such that we can do this through
not just r0.

Change-Id: Iadb73f5cde8cf5961b5a18ddd198bf39d791e610
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/5227
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
4 years agodrivers/gw16012: remove useless cast on gw16012_port 95/5195/3
Antonio Borneo [Mon, 6 May 2019 13:19:30 +0000 (15:19 +0200)]
drivers/gw16012: remove useless cast on gw16012_port

The variable gw16012_port is of type uint16_t.
There is no need for a cast to print it.

Change the format modifier to PRIx16

Change-Id: I16fe688b9d235bae46525635d07849a00fba9548
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5195
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
4 years agogdb_server: Support vRun packet, allow setting cmdline from GDB 86/5186/3
Andreas Fritiofson [Mon, 20 Aug 2018 13:34:19 +0000 (15:34 +0200)]
gdb_server: Support vRun packet, allow setting cmdline from GDB

GDB uses the vRun packet if available to restart a running process in
extended remote mode. Support this like the R packet and set the
semihosting command-line to allow it to be specified from GDB.

Change-Id: I9cb812b22170630f782113c9927e46e0cd5b1f0f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5186
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
4 years agogdb-server: Create arch-specific structure type for every feature 79/5179/3
Alexey Brodkin [Fri, 17 May 2019 19:18:45 +0000 (22:18 +0300)]
gdb-server: Create arch-specific structure type for every feature

As it is mentioned here [1] type's ID is unique name within containing feature.

That said if regs of the same type located in different features it's required
to insert type definition at least in each feature.

See more details in discussion here [2].

[1] https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Types
[2] https://github.com/foss-for-synopsys-dwc-arc-processors/openocd/commit/2a5f5125ac8fa0e1359b6be03b209f9f5d1ade82#r33460077

Change-Id: Id92b061cfbf47d5c032a02c2c406b28affd0b02a
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5179
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
4 years agotarget/cortex_a: use aligned accesses for read/write cpu memory slow 38/5138/2
Antonio Borneo [Sat, 27 Apr 2019 13:52:52 +0000 (15:52 +0200)]
target/cortex_a: use aligned accesses for read/write cpu memory slow

Armv7a is able to read and write memory at un-aligned address, but
only when bit SCTLR.A (Alignment check enable) is zero and the
address belongs to a memory space with attribute "Normal" (see [1]
chapter A3.2.1 "Unaligned data access"). In all the other cases
the memory access will trigger an alignment fault data abort
exception.
Memory attributes are explained in [1] chapter A3.5 "Memory types
and attributes and the memory order model".

Disabling the MMU cause a change in memory attribute, as explained
in [1] chapter B3.2 "The effects of disabling MMUs on VMSA
behavior".
This can cause several issues. e.g. a SW breakpoint on un-aligned
4-byte Thumb instruction, set when MMU is on, can be impossible to
remove when MMU turns off.

While is possible to check all the possible conditions before an
un-aligned memory access, it's clearly more maintainable to skip
such complexity and only perform aligned accesses.

Check the alignment and eventually modify the data size before
calling the functions cortex_a_{read,write}_cpu_memory_slow().
Change the comment in the two functions above to comply with the
new behaviour.

[1] ARM DDI 0406C.d - "ARM Architecture Reference Manual, ARMv7-A
    and ARMv7-R edition"

Change-Id: I57b4c11e7fa7e78aaaaee4406a5734b48db740ae
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5138
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
4 years agoadi_v5_jtag: avoid RAM exhaustion by limiting jtag queue size 48/4948/3
Bohdan Tymkiv [Tue, 26 Feb 2019 09:45:40 +0000 (11:45 +0200)]
adi_v5_jtag: avoid RAM exhaustion by limiting jtag queue size

Issue has been found when I tried to read 64 MiB QSPI flash bank.
Bank is memory mapped, default_flash_read() is used for 'flash read_bank'
command. OpenOCD consumed as much as 6.8 GiB of RAM during this
process. Investigation showed that this happens because JTAG queue
is not limited in any way. OpenOCD queues 16 millions of AP reads
allocating all corresponding data structures.

Most of this memory is allocated in:
cmd_queue_alloc (commands.c) - 4.2 GiB
dap_cmd_new (adi_v5_jtag.c) - 2.25GiB

This patch implements a pool of "struct dap_cmd" objects using
linked list. Objects are taken from a pool in "dap_cmd_new()" and
returned to the pool when they are not needed. Size of the pool
is limited to 64K of objects, JTAG queue is forcibly executed
when this limit is reached.

Checked with Valgrind and Clang analyzer - no new warnings.

Change-Id: I5aaaecce5ed71414f7965a2598f49742f6a6b2b5
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4948
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
4 years agoFix wrong end-of-region calculation 98/4798/2
Piotr Kasprzyk [Sat, 8 Dec 2018 02:27:51 +0000 (03:27 +0100)]
Fix wrong end-of-region calculation

Correct check for end-of-region is:
$BASE + $LEN > $ADDRESS

And it is currently (wrongly) calculated as:
$ADDRESS > $BASE - $LEN

Change-Id: If10bfee19b0c7dbc085731ac1eda943f5d8a36a3
Signed-off-by: Piotr Kasprzyk <ciri@ciri.pl>
Reviewed-on: http://openocd.zylin.com/4798
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
4 years agonrf5: Fix misuse of flash bank number 75/4775/3
Andreas Fritiofson [Wed, 21 Nov 2018 13:09:39 +0000 (14:09 +0100)]
nrf5: Fix misuse of flash bank number

Make driver_priv point directly into the corresponding chip bank structure
and add a pointer to it to get back to its chip when it's needed. This
removes the need to keep track of any bank number, either global or chip-
local.

In addition, it simplifies the cases where the chip structure was just used
to access the chip bank fields; now they are directly accessible.

Change-Id: Iaa353cd4fa7d8ff94c2ef69028c7cb32fade0420
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/4775
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotcl/target: Add Infineon TLE987x 39/4339/3
Andreas Färber [Sun, 14 Jan 2018 22:48:37 +0000 (23:48 +0100)]
tcl/target: Add Infineon TLE987x

Prepare a config for Infineon TLE9879.

Change-Id: Ic667ae822fd514cac365993bc3f39b4185f1a118
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/4339
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
4 years agostm32l0|l1: don't corrupt RCC registers 01/3601/3
Felipe Balbi [Thu, 14 Jul 2016 13:32:10 +0000 (16:32 +0300)]
stm32l0|l1: don't corrupt RCC registers

instead of overwriting Reset settings, let's
read-modify-write RCC registers.

Change-Id: I21b7e26e6007d3c3d73803c681c980c6947f5910
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Reviewed-on: http://openocd.zylin.com/3601
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
4 years agotarget: Switch to target_read_buffer() in verify_image fallback 17/3217/4
Andreas Fritiofson [Wed, 13 Jan 2016 19:39:28 +0000 (20:39 +0100)]
target: Switch to target_read_buffer() in verify_image fallback

The current code checks the count to determine whether to read bytes or
words. However it fails to consider whether the base address is suitably
aligned.

Instead use the target_read_buffer() function which is for exactly this
purpose and generates optimal accesses with natural alignment.

Change-Id: I32ab5417890ee2219902df1529bc220fe353b4c7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3217
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoUpdate FTDI C232HM cfg, and add two new cfgs from cable modem research 07/5307/5
Al Dyrius [Thu, 26 Sep 2019 05:39:05 +0000 (23:39 -0600)]
Update FTDI C232HM cfg, and add two new cfgs from cable modem research

Change-Id: Idbeffcd5ff4380b1e7c9fd5ef6ba3ca77cc22d99
Signed-off-by: Al Dyrius <aldyrius42@gmail.com>
Reviewed-on: http://openocd.zylin.com/5307
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
4 years agosrc/flash/startup.tcl: Add preverify to program command 92/5292/4
Moritz 'Morty' Strübe [Thu, 29 Aug 2019 07:07:06 +0000 (09:07 +0200)]
src/flash/startup.tcl: Add preverify to program command

The preverify option allows to check whether flashing is necessary.
If the target is flashed often/automatically this can save time and
preserve the flash. This is expecially helpful in CI environments.

Change-Id: Iead0a269e1a772b751d4dd9e8b53b2fecc874624
Signed-off-by: Moritz 'Morty' Strübe <moritz.struebe@redheads.de>
Reviewed-on: http://openocd.zylin.com/5292
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agodoc: emphasize the role of 'reset init' before flash commands 04/5304/2
Tomas Vanek [Fri, 20 Sep 2019 11:49:17 +0000 (13:49 +0200)]
doc: emphasize the role of 'reset init' before flash commands

Change-Id: I4a4061ad0fa6e5dfb1e33f01d62145ca9bf12148
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5304
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agoAdd complete JTAG debug logging. 51/4451/7
Tim Newsome [Tue, 6 Mar 2018 21:13:35 +0000 (13:13 -0800)]
Add complete JTAG debug logging.

Sample output, with default_interface_jtag_execute_queue replaced by
dijeq to satisfy commit message line length check:
Debug: 646 18 core.c:847 dijeq(): JTAG IR SCAN to RUN/IDLE
Debug: 647 18 core.c:852 dijeq():   5b out: 11
Debug: 648 18 core.c:847 dijeq(): JTAG DR SCAN to RUN/IDLE
Debug: 649 18 core.c:852 dijeq():   40b out: 4400000001
Debug: 650 18 core.c:857 dijeq():   40b in: 4400000000

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I014e9e3a77755413b36edfcede2ab8f6aa08061b
Reviewed-on: http://openocd.zylin.com/4451
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoAdd wall clock timeout warning to mpsse_flush() 67/4767/4
Tim Newsome [Wed, 14 Nov 2018 19:55:09 +0000 (11:55 -0800)]
Add wall clock timeout warning to mpsse_flush()

I think that libusb_handle_events_timeout_completed is supposed to make
progress or time out, but sometimes we hit a case where it makes no
progress, and mpsse_flush() loops forever. This wall clock timeout
notifies the user that this is going on.

When I wrote this code, this bug would reproduce every hour or two, but
right now it's not happening for me.

Change-Id: I7eb66f43462298e263a48048aa0c8769095661eb
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4767
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
4 years agoefm32: use device-specific MSC base for EFM32TG11B 63/5263/2
Christian Meusel [Mon, 15 Jul 2019 16:01:38 +0000 (18:01 +0200)]
efm32: use device-specific MSC base for EFM32TG11B

According to the reference manual it should be 0x40000000. Flashing (and
booting) a firmware with this MSC base was successful.

Change-Id: I739e67d36555b8170a3b8e26f54cf1c09ce8424b
Signed-off-by: Christian Meusel <christian.meusel@posteo.de>
Reviewed-on: http://openocd.zylin.com/5263
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

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