openocd.git
3 years agojtag: remove unused function adapter_driver_modules_load() 01/5601/2
Antonio Borneo [Wed, 22 Apr 2020 20:39:07 +0000 (22:39 +0200)]
jtag: remove unused function adapter_driver_modules_load()

Commit c2cecc74b0ac ("Move JTAG interface list to new files.")
merged in mid 2009 introduces an unused and empty function that
the developer expects to use for loading adapter drivers from
shared libraries. This have never happened and the function is
still empty and unused.

Remove it.

Change-Id: I7c88dbf8a9747e96e5ca4e6e7038ac0f232604fd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5601
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
3 years agoserver: set tcp port and bind address before init 95/5595/2
Antonio Borneo [Mon, 20 Apr 2020 21:54:38 +0000 (23:54 +0200)]
server: set tcp port and bind address before init

All the servers open the listening socket during openocd "init";
it's not possible to change the tcp port or the bind address
after "init".

In current code, the call order during "init" permits to change
the port and bind address of tcl and telnet server if the related
command is issued after "init" in the same script or on openocd
command line. This is not guaranteed to work if the call order
during "init" changes, so it's incorrect.

Change the commands "bindto" and "*_port" to COMMAND_CONFIG.

Change-Id: Id88f225a67a872b4bcaf3b799466bddedc248015
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Christopher Head <chead@zaber.com>
Fixes: https://sourceforge.net/p/openocd/tickets/264/
Reviewed-on: http://openocd.zylin.com/5595
Reviewed-by: Christopher Head <chead@zaber.com>
Tested-by: jenkins
3 years agocoding style: contrib: remove empty lines at end of text files 73/5173/6
Antonio Borneo [Sun, 12 May 2019 10:57:49 +0000 (12:57 +0200)]
coding style: contrib: remove empty lines at end of text files

Empty lines at end of text files are useless.
Remove them.

Change-Id: I4efbd9af5be7e16213dcc7cb95de936ecde2fcef
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5173
Tested-by: jenkins
3 years agocoding style: src: remove empty lines at end of text files 72/5172/6
Antonio Borneo [Sun, 12 May 2019 10:55:18 +0000 (12:55 +0200)]
coding style: src: remove empty lines at end of text files

Empty lines at end of text files are useless.
Remove them.

Change-Id: Ibac9b36682d58f81e34ca2b51e6260e7d472fb0e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5172
Tested-by: jenkins
3 years agocoding style: tcl: remove empty lines at end of text files 71/5171/6
Antonio Borneo [Sun, 12 May 2019 10:53:56 +0000 (12:53 +0200)]
coding style: tcl: remove empty lines at end of text files

Empty lines at end of text files are useless.
Remove them.

Change-Id: I503cb0a96c7ccb132f4486c206a48831121d7abd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5171
Tested-by: jenkins
3 years agobitbang: Fix FTBFS with GCC 10 92/5592/2
Andreas Fritiofson [Fri, 17 Apr 2020 11:49:28 +0000 (13:49 +0200)]
bitbang: Fix FTBFS with GCC 10

GCC 10 defaults to -fno-common which breaks the sharing of bitbang_swd
struct between bitbang drivers due to a missing extern.

Change-Id: I2b4122f7939cec91a72284006748f99a23548324
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/5592
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
3 years agoflash/nor/stm32l4x: cast wrpxxr_mask to uint16_to to print 90/5590/2
Ilya Kharin [Wed, 15 Apr 2020 23:21:30 +0000 (03:21 +0400)]
flash/nor/stm32l4x: cast wrpxxr_mask to uint16_to to print

Fix build error on Mac OS X Catalina (10.15.4) caused by formatting
stm32l4_info->wrpxxr_mask, which is uint32_t, as uint16_t in the debug
log message. Adding casting to uint16_t before substitution because only
lower 16 bits are significant for debug purposes.

Change-Id: Iddb87cd156dfc84ab1f91cd15a1ddee6b646d412
Signed-off-by: Ilya Kharin <akscram@gmail.com>
Reviewed-on: http://openocd.zylin.com/5590
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
3 years agoftdi: Report an error if no ftdi_vid_pid is specified 40/5440/2
Leonard Crestez [Thu, 6 Feb 2020 14:13:25 +0000 (16:13 +0200)]
ftdi: Report an error if no ftdi_vid_pid is specified

By default the list of VID/PID is empty so if ftdi_vid_pid is not called
then no matches are attempted. The only message is at -d3:

Command 'init' failed with error code -100"

Check for this condition explicitly to make life easier for people
configuring adapters.

Change-Id: If0f93370c9e9ddc9700aae7c346c1c6dd319152e
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5440
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
3 years agotarget/armv8: Add ARM target name on halt status 71/5571/2
Kevin Burke [Mon, 4 Nov 2019 20:11:06 +0000 (20:11 +0000)]
target/armv8: Add ARM target name on halt status

The CPU target name is added to the HALT status message so the user
can see which target halted at the designated program counter.

Tested on an Ampere eMAG8180 and Quicksilver silicon

Change-Id: I51e6f21296c85a822df28c5b7c4068e8ff66f29e
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5571
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
3 years agotarget/armv7m: minor fixes of target algo exit point check 29/5329/2
Tomas Vanek [Sun, 20 Oct 2019 13:03:44 +0000 (15:03 +0200)]
target/armv7m: minor fixes of target algo exit point check

Introduce a new ERROR_TARGET_ALGO_EXIT as currently used
ERROR_TARGET_TIMEOUT should be reserved for the timeout only.

Do not load PC directly from CPU HW as the register value
has already been cached.

Change-Id: I0d3630da41fd021676789dc12b52545cc0432ba8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5329
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
3 years agoflash/nor: add flash mdw/h/b commands 76/4776/5
Tomas Vanek [Thu, 22 Nov 2018 18:05:04 +0000 (19:05 +0100)]
flash/nor: add flash mdw/h/b commands

Some flash banks are not mapped in the target memory
(e.g. SPI flash, some special pages).

Add flash version of mdw/h/b which reads data using
the flash driver.

Change-Id: I66910e0a69cf523fe5ca1ed6ce7b9e8e176aef4a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4776
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
3 years agotcl/target/nrf52.cfg: detect AP lock and add command to recover 84/4984/3
Tomas Vanek [Fri, 1 Mar 2019 12:35:31 +0000 (13:35 +0100)]
tcl/target/nrf52.cfg: detect AP lock and add command to recover

Change-Id: I8d2e29ed88a957d412473255e42b022a00dfb9cb
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4984
Tested-by: jenkins
3 years agonrf5: Comment the flash loader 72/5272/3
Aurélien Martin [Tue, 6 Aug 2019 20:08:18 +0000 (22:08 +0200)]
nrf5: Comment the flash loader

Change-Id: Ia84b5b8ede53f59299a02dc6163d6bbaa31e0fbd
Signed-off-by: Aurélien Martin <martaurel@gmail.com>
Reviewed-on: http://openocd.zylin.com/5272
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agonrf5: Refresh the watchdog while flashing 66/5266/7
Aurélien Martin [Mon, 22 Jul 2019 21:13:29 +0000 (23:13 +0200)]
nrf5: Refresh the watchdog while flashing

If watchdog is enabled, there's no way we can disable it while the flashing firmware
is running. (Halt disables it, but software reset doesn't.) So let's have the flashing
firmware refresh the watchdog regularly, in case it has been enabled by previously
running software. Failure to do so could lead to a watchdog reset in the middle of
the chip bieng programmed.

Change-Id: I79d41593948aae0080480e891552e1c2ee3ccbd0
Signed-off-by: Aurélien Martin <martaurel@gmail.com>
Reviewed-on: http://openocd.zylin.com/5266
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agonrf5: Include generated loader code 67/5267/5
Aurélien Martin [Tue, 23 Jul 2019 19:21:39 +0000 (21:21 +0200)]
nrf5: Include generated loader code

Dump legacy hexadecimal machine code

Change-Id: I336efa461058bccc3894131cb22473785b68479c
Signed-off-by: Aurélien Martin <martaurel@gmail.com>
Reviewed-on: http://openocd.zylin.com/5267
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agoRemove BUILD_TARGET64 40/5240/4
Florian Fainelli [Mon, 17 Jun 2019 22:46:11 +0000 (15:46 -0700)]
Remove BUILD_TARGET64

BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.

Rebased by Antonio Borneo after commit 1fbe8450a9dd ("mips: Add
MIPS64 support")

Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
3 years agojtag/drivers/rshim: Disable the driver by default 63/5563/5
Liming Sun [Sat, 4 Apr 2020 02:51:13 +0000 (22:51 -0400)]
jtag/drivers/rshim: Disable the driver by default

This is a follow-up change of commit 6d6a69d5 to disable it by
default. The driver was introduced in 6d6a69d5 and enabled by
default in order to run the jenkins build.

Signed-off-by: Liming Sun <lsun@mellanox.com>
Change-Id: I5c5fc6711b971b65dd5846a6163025879044ec40
Reviewed-on: http://openocd.zylin.com/5563
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
3 years agojtag/drivers: add debugging support for Mellanox BlueField SoC 57/5457/7
Liming Sun [Fri, 10 May 2019 15:02:31 +0000 (11:02 -0400)]
jtag/drivers: add debugging support for Mellanox BlueField SoC

This commits adds debugging support for the Mellanox BlueField
SoC via rshim, which is an interface accessible from external USB
or PCIe (for SmartNIC case) via the rshim driver. It implements
the arm dap interfaces based on the existing dapdirect framework.

Change-Id: I18eb1c54293ec2c581f853e0e55b3f96d7978b56
Signed-off-by: Liming Sun <lsun@mellanox.com>
Reviewed-on: http://openocd.zylin.com/5457
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
3 years agotools/checkpatch.sh: remove flag --no-tree 10/5110/2
Antonio Borneo [Wed, 10 Apr 2019 10:46:54 +0000 (12:46 +0200)]
tools/checkpatch.sh: remove flag --no-tree

Commit c5d89883165e02ea4f318e3cb0ba40d1fb6f04d1 ("checkpatch.pl:
check for openocd tree, not for kernel tree") has already fixed
the check for OpenOCD tree, thus we do not need to skip it in the
shell wrapper.

Remove flag --no-tree from the shell wrapper.

Change-Id: I8be497258624d89bde7742fee141a8f56bf9188e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5110
Tested-by: jenkins
3 years agotcl/target: Drop reference to renesas_gen2_common.cfg 64/5564/2
Marek Vasut [Sat, 4 Apr 2020 11:20:56 +0000 (13:20 +0200)]
tcl/target: Drop reference to renesas_gen2_common.cfg

Drop bogus reference to board/renesas_gen2_common.cfg , which is a
non-existing file.

Fixes: a01474bb4c4c ("tcl/target: Switch Renesas R-Car Gen2 boards to new config")
Change-Id: Icb22d8456b7ac94d3a9a4ed354b246ee1332b122
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5564
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agotcl: stm32mp15x: add target and board config files 54/5454/4
Antonio Borneo [Fri, 14 Feb 2020 15:49:45 +0000 (16:49 +0100)]
tcl: stm32mp15x: add target and board config files

The stm32mp15x has one or two Cortex-A7 (depending on the P/N) and
one Cortex-M4.
The second core is automatically detected by the target script.
In "engineering boot" all the cores are accessible.
In "production boot" the Cortex-M4 is kept in reset state after
power-on or NRST.

The board DK2 includes a ST-Link/V2, but only SWD is connected.

Change-Id: Ib6ebefcc696b1716e0f98694cadf0b04fd7d11d6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5454
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agojtag/drivers/ulink: fix clang static analyzer warnings 70/5370/3
Tomas Vanek [Fri, 13 Mar 2020 14:34:47 +0000 (15:34 +0100)]
jtag/drivers/ulink: fix clang static analyzer warnings

scan-build-9:
Description: Potential leak of memory pointed to by 'cmd'
File: /home/vanekt/openocd/scanbuild9/../src/jtag/drivers/ulink.c
Line: 1075

Description: Potential leak of memory pointed to by 'cmd'
File: /home/vanekt/openocd/scanbuild9/../src/jtag/drivers/ulink.c
Line: 1275

ulink_append_xxx_cmd() functions allocate memory for cmd
and then call ulink_allocate_payload(), which allocates cmd->payload_out
or cmd->payload_in.

ulink_append_queue() checks the size of queue and if the new payload
does not fit, calls ulink_execute_queued_commands() and then
ulink_post_process_queue(). If any of these two fails, an error is
returned, allocated cmd struct leaks and the queue is left in an undefined
state.

Change ulink_append_queue() flow to proceed to appending cmd to the queue
even in the case of fail in previous ulink_execute_queued_commands()
or ulink_post_process_queue(). In case of fail then clear the queue
including the last appended cmd.

Change-Id: I967c07af19e9020c93bcb4ef403cf1f557dd1db1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5370
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agojtag/drivers/ulink: fix clang static analyzer warning 20/5520/2
Tomas Vanek [Fri, 13 Mar 2020 14:13:21 +0000 (15:13 +0100)]
jtag/drivers/ulink: fix clang static analyzer warning

scan-build-9:
Description: Access to field 'payload_in' results in a dereference
 of a null pointer (loaded from field 'queue_start')
File: src/jtag/drivers/ulink.c
Line: 2216

Set input/output_signals conditionally if ulink_append_get_signals_cmd()
and ulink_execute_queued_commands() returns no error.
Do not fail driver initialisation as the signals are only printed.

Change-Id: I6c842f0e9a604712abf7444a2fa95ba5810de1ff
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5520
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agojtag/drivers/ulink: fix clang static analyzer warning 19/5519/2
Tomas Vanek [Fri, 20 Dec 2019 22:34:19 +0000 (23:34 +0100)]
jtag/drivers/ulink: fix clang static analyzer warning

scan-build-9:
Description: Potential leak of memory pointed to by 'tdo_buffer'
File: src/jtag/drivers/ulink.c
Line: 1629

Free the buffer before error return.

Change-Id: Ic47651a5ae78c7a47ae4fcbad225f329b14c45cb
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5519
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agoflash/nand/core: fix clang static analyzer warning 18/5518/2
Tomas Vanek [Fri, 13 Mar 2020 11:10:50 +0000 (12:10 +0100)]
flash/nand/core: fix clang static analyzer warning

core.c:446:
The left operand of '>>' is a garbage value

There are many places where an error code returned from nand->controller
operations are ignored. To keep the change minimal, the error checks are
added only to reading of extended nand info as it was suspected
to be the cause of the warning.

Addition of the error checks did not fix the warning.
scan-build-9 report was inspected and IMHO the warning is bogus:
the term (nand->device->erase_size == 0) cannot give false at line 395
and then evaluate true at line 462. Fixed by zeroing id_buff.

Change-Id: I97ed7ce0fdf1aa23d746d5fb898bacd050e20ae8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5518
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agotarget/arc: remove saving context during reset 24/5524/3
Evgeniy Didin [Tue, 17 Mar 2020 11:06:24 +0000 (14:06 +0300)]
target/arc: remove saving context during reset

In arc_poll() function we handle the cases, when jtag indicates, that
processor is halted, but target->state is not TARGET_HALTED.
In case, when processor was halted and target->state was TARGET_RUNNING,
we should save context. At the same time if target->state was TARGET_RESET
we do not need to save context.

Changes: 16.04:
Fix - Move setting target->state = TARGET_HALT after
"target->state == TARGET_RUNNIG" check, otherwise
this check makes no sense

Change-Id: I92ab6ec71cf58273bb8401d14a562035de3deab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5524
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agoAdd documentation section for ARCv2 51/5351/6
Evgeniy Didin [Thu, 28 Nov 2019 05:34:46 +0000 (08:34 +0300)]
Add documentation section for ARCv2

Changes since v1:
-Moved from http://openocd.zylin.com/#/c/5332/4
 into separate commit.

28.02.2020:
-Removed multiple cpu configuration section, currently
 only ARC EM is supported.

17.03.2020:
-Some cleanup
-For "arc set-reg-exists" command limitize the number of
 arguments (50 maximum).

17.03.2020(v2):
-Revert limitation for "arc set-reg-exist" command

Change-Id: I4b06f89df95f2773bfde6e1bd2ae2b6b880bfaa8
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5351
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
3 years agoIntroduce ARCv2 tcl config files 50/5350/6
Evgeniy Didin [Thu, 28 Nov 2019 05:34:01 +0000 (08:34 +0300)]
Introduce ARCv2 tcl config files

With this commit we add tcl files which describes
ARCv2 architecture features and configure files
for ARCv2 EMSK board.

Changes since v1:
-Moved from http://openocd.zylin.com/#/c/5332/4
 into separate commit.

Changes:
22.01.2020:
-Removed "actionpoints" handling code in
 tcl/cpu/arc/v2.tcl because this capability
 is not supported yet.

Changes:
17.03.2020:
-Update Licence headers
-Cleanup indents
-Removed "reset halt" in boards .tcl
-Updated adapter frequency commands

Changes:
15.03.2020:
-Removed "init" in the of boards .tcl

Change-Id: I51bf620abe7b8e046e1dccc861a7d963965d3a42
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5350
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoRevert "rtos/FreeRTOS: Fix FreeRTOS thread list reading" 77/5577/3
Tomas Vanek [Sun, 5 Apr 2020 15:34:14 +0000 (17:34 +0200)]
Revert "rtos/FreeRTOS: Fix FreeRTOS thread list reading"

This reverts commit 6568d29cc1d0d94daafec5bdb73de7d4f17da257.
The reverted change caused some tasks were missing in thread list.

While on it add a comment explaining the relation of uxTopUsedPriority
and configMAX_PRIORITIES, introduce config_max_priorities and
change types to unsigned.

Change-Id: I4371c8882470d13ee7360ef21b132c56ecb95af8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5577
Tested-by: jenkins
4 years agoflash/nor/efm32: Chip support extension (EFM32GG12B Giant) 67/5567/2
tscn92 [Mon, 6 Apr 2020 13:51:23 +0000 (15:51 +0200)]
flash/nor/efm32: Chip support extension (EFM32GG12B Giant)

For flash/nor/efm32 the EFM32GG12B Giant chip has been added to the
efm32_family along with its respective series and msc_rebase.
Testen on EFM32GG12B390F board

Change-Id: Idd7dfa93f26ac22566aed1be28f30db678cc0a25
Signed-off-by: tscn92 <tscn@kamstrup.com>
Reviewed-on: http://openocd.zylin.com/5567
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
4 years agoserver: set connection::input_pending type to bool 65/5565/3
Tarek BOCHKATI [Mon, 6 Apr 2020 12:41:36 +0000 (13:41 +0100)]
server: set connection::input_pending type to bool

Change-Id: Ifae8ac2761a7a8fa12732b71c2de456e7558bd2b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5565
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
4 years agoserver/gdb_server: set gdb_connection::ctrl_c type to bool 66/5566/2
Tarek BOCHKATI [Mon, 6 Apr 2020 12:49:17 +0000 (13:49 +0100)]
server/gdb_server: set gdb_connection::ctrl_c type to bool

Change-Id: I828b83b181f7a222ee2e6cb67eb337c6cd8712ac
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5566
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
4 years agoEntering SWIM mode on ST-LINK does not update swim status word. 47/5547/4
Ake Rehnman [Sun, 29 Mar 2020 10:13:18 +0000 (12:13 +0200)]
Entering SWIM mode on ST-LINK does not update swim status word.

As a consequence of a previous failed SWIM command any
subsequent attempts to enter SWIM mode fails. Change
stlink_usb_mode_enter to use stlink_usb_xfer_noerrcheck
instead.

Change-Id: I5c6a1a8e68d3dc77ec37264880383366fa6a75d9
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5547
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agostlink: always use a valid endpoint 55/5455/4
Tarek BOCHKATI [Mon, 30 Mar 2020 11:06:18 +0000 (13:06 +0200)]
stlink: always use a valid endpoint

In order to extend the driver to support stlink-server over TCP,
we should always use a valid endpoint, as stlink-server is not permissive
and do not accept the invalid STLINK_NULL_EP.

STLINK_NULL_EP value was used for commands without an expected reply,
this value could be replaced with a valid endpoint without any impact
when the size is set to zero.

Change-Id: I003ad364e03d3a10bc036772db86310d996cbe81
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5455
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agojtag: flush queue after reset for drivers using old reset model 30/5430/2
Antonio Borneo [Mon, 3 Feb 2020 09:02:54 +0000 (10:02 +0100)]
jtag: flush queue after reset for drivers using old reset model

Not all the jtag drivers have been migrated to the new reset model
and for those only we need to flush the jtag queue to make the
reset working with command 'adapter [de]assert ...'.

Add a queue flush and a FIXME comment to remove both when all the
drivers would be migrated.

Change-Id: Ib6667f987b1be2bce492841040302e742dd1cad1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5430
Tested-by: jenkins
4 years agogdb_server: print the target associated to the gdb port 25/5525/2
Antonio Borneo [Mon, 16 Mar 2020 13:53:18 +0000 (14:53 +0100)]
gdb_server: print the target associated to the gdb port

While running OpenOCD on multi-target SoC, it's not immediate to
detect which target is associated to each GDB port. The log only
reports:
Info : Listening on port 3333 for gdb connections
and a verbose debug log is required to get such info.

Promote to LOG_INFO() the existing debug message that already
reports the association, obtaining for each port:
Info : starting gdb server for stm32mp15x.cpu0 on 3333
Info : Listening on port 3333 for gdb connections

Change-Id: I1bd75655a3449222c959e6e82f5e0f8f5acd908a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5525
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agocortex_m: remove deprecation for soft_reset_halt 14/5514/2
Antonio Borneo [Tue, 10 Mar 2020 22:07:42 +0000 (23:07 +0100)]
cortex_m: remove deprecation for soft_reset_halt

The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe32956d ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
It also get useful to handle the reset on some problematic chip,
as in http://openocd.zylin.com/5489

Replace the warning about deprecation with a more light debug
message.

Change-Id: I52de6359475ba31014ae77e596a87fe88b252177
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5514
Tested-by: jenkins
Reviewed-by: Edward Fewell <efewell@ti.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agocortex_a: don't wait for target halted in deassert_reset() 72/5472/2
Antonio Borneo [Wed, 12 Feb 2020 21:26:51 +0000 (22:26 +0100)]
cortex_a: don't wait for target halted in deassert_reset()

The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.

Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.

The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().

Change-Id: Ic661c3791a29ba7d520e31f85a61f939a646feb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5472
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agostlink: remove only instance of useconds_t 44/5544/3
Antonio Borneo [Thu, 26 Mar 2020 14:16:52 +0000 (15:16 +0100)]
stlink: remove only instance of useconds_t

The usleep() function, and its associated useconds_t type
specifier, has been obsoleted by POSIX.1-2008.

OpenOCD has 28 call to usleep(), that should be migrated to the
replacement nanosleep(), but due to the different prototype
int nanosleep(const struct timespec *req, struct timespec *rem);
this can take some effort.

The type useconds_t is used in only one case, where it's used both
as parameter of usleep() and as value passed to LOG_DEBUG(). Due
to different implementation of useconds_t, there are cases that
trigger a compile warning in LOG_DEBUG() when useconds_t is more
than 32 bit.
E.g. with unistd.h in MinGW 4.x, useconds_t is defined as unsigned
long, thus being 32 or 64 bits depending on the target.

Replace the only instance of useconds_t.

Change-Id: I21724f8b06780abdb003a57222ff1d6840ff5419
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5544
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
4 years agoflash/nor/nrf5: pass unsigned char to isalnum() 45/5545/4
Antonio Borneo [Thu, 26 Mar 2020 22:35:08 +0000 (23:35 +0100)]
flash/nor/nrf5: pass unsigned char to isalnum()

In newlib, the argument of isalnum() and the similar functions in
ctype.h is checked to be either an int or an unsigned char.
Using a normal (signed) char triggers a compile time warning
warning: array subscript has type ‘char’ [-Wchar-subscripts]

Rewrite the function to separate the internal unsigned char
operations from the (signed) char parameter.

Change-Id: I5f19115f0b2de2b5b35dc07ef4b58a96161268ee
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Åke Rehnman <ake.rehnman@gmail.com>
Fixes: 5da746fa09 ("flash/nor/nrf5: detect newer devices without HWID table")
Reviewed-on: http://openocd.zylin.com/5545
Tested-by: jenkins
Reviewed-by: Ake Rehnman <ake.rehnman@gmail.com>
4 years agosysfsgpio: minor fix for bool types 52/5552/2
Antonio Borneo [Sun, 29 Mar 2020 21:19:29 +0000 (23:19 +0200)]
sysfsgpio: minor fix for bool types

Return bool value in functions that return bool.
Change return type to bool to function is_gpio_valid().

Change-Id: Ic2e62be737772b22e69881c034956549f659370b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5552
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
4 years agotravis: Add .travis.yml 14/5414/11
Marek Vasut [Fri, 10 Jan 2020 01:06:45 +0000 (02:06 +0100)]
travis: Add .travis.yml

Add basic Travis-CI .travis.yml, to let Travis CI run automated build tests.

Change-Id: Iceae442c13f30b57842b300c0920108b614c75f7
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5414
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget: added events TARGET_EVENT_STEP_START and _END 51/5551/3
Jan Matyas [Wed, 1 Apr 2020 09:58:20 +0000 (11:58 +0200)]
target: added events TARGET_EVENT_STEP_START and _END

Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
have been added - analogous to already existing events
TARGET_EVENT_RESUME_*.

This is an example of a concrete use case where having
these events is important:

In RISC-V processors without Debug Program Buffer, OpenOCD
cannot execute fence/fence.i when resuming or single-
stepping. With these events implemented, the user can
instead provide custom operations to achieve that same
effect prior to resuming the processor.

Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5551
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
4 years agoflash/stm32h7x: Use proper flash regs base for bank 1 34/5534/11
Sasha Kozaruk [Fri, 20 Mar 2020 01:53:24 +0000 (18:53 -0700)]
flash/stm32h7x: Use proper flash regs base for bank 1

On stm32h747 writing/erasing bank 1 didn't work. It was because the
flash register base was always set for bank 0.
Tested on STM32H747I-DISCO board.

Change-Id: I7e8c43ecdda9dc70b114905f5ec6a6753ca29d82
Signed-off-by: Sasha Kozaruk <alkhozar@gmail.com>
Reviewed-on: http://openocd.zylin.com/5534
Reviewed-by: Christopher Head <chead@zaber.com>
Tested-by: jenkins
4 years agotcl/target: Use vectreset for CC13xx/CC26xx targets. 11/5511/3
Edward Fewell [Tue, 10 Mar 2020 20:11:43 +0000 (15:11 -0500)]
tcl/target: Use vectreset for CC13xx/CC26xx targets.

nSRST and sysreqreset are both broken for these targets. Upon a
hard reset, the target disables the TDO/TDI pins and the
ICEPick router will remove the target's TAP from the scan
chain. The scripts to do these tasks are run, but then
OpenOCD throws the reset again breaking the debug connection.

Until that issue can be resolved, vectreset is the only
reset that works without breaking the debug connection.

Update: original patch didn't have the correct reset command.

Change-Id: If7c985b703c87399a13364609d370d6222f4a66c
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5511
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agostlink: remove 18 MHz jtag freq for stlink v2 65/5465/2
Laurent LEMELE [Fri, 14 Feb 2020 16:01:04 +0000 (17:01 +0100)]
stlink: remove 18 MHz jtag freq for stlink v2

While stlink v2 allows setting the jtag clock frequency till a max
of 18 MHz, the firmware seams unstable and not properly working.

Remove the entry for 18 MHz, at least until a fix get available.

Change-Id: I503e1b6a5709b5fbf1f1147fd3b5f34a0c5ee98c
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5465
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agostlink: fix speed setting in dap mode 64/5464/2
Laurent LEMELE [Wed, 12 Feb 2020 21:22:54 +0000 (22:22 +0100)]
stlink: fix speed setting in dap mode

stlink accepts a set of values for "adapter speed".
Fix the api khz() to return one of the allowed speed values.

Change-Id: Iac640b6f76935891ca25ac168cab3809707f19d9
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5464
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agoarmv8: log the register name which we failed to read or write 16/5516/2
Tarek BOCHKATI [Fri, 13 Mar 2020 10:49:25 +0000 (11:49 +0100)]
armv8: log the register name which we failed to read or write

when openocd fails to read armv8 register, the user is not informed
which register has caused the error.

for example, in AArch32 state ESR_EL3 read/write is not supported,
thus armv8_dpm_read_current_registers is always failing without mentioning
which register has caused the error.

Change-Id: I24c5abbda9fac24fb77a01777ed15261aeaaf800
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5516
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agoflash/nor/cfi: Minor code cleanups 63/5463/3
Marc Schink [Fri, 21 Feb 2020 14:26:10 +0000 (15:26 +0100)]
flash/nor/cfi: Minor code cleanups

Change-Id: I2d45fcc5b9d232db66218aab5fef3add5830bcd7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5463
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agoflash/stm32f1x: fix maximum flash size for some devices 44/5444/2
Tarek BOCHKATI [Fri, 7 Feb 2020 19:13:10 +0000 (20:13 +0100)]
flash/stm32f1x: fix maximum flash size for some devices

For STM32F0xxx, according to RM0360 Rev 4 and RM0091 Rev 9,
the accurate flash sizes are in RM0360, Table 4 and 5

  DEV_ID=0x440 => F030x8 => 64K (64 * 1K)
                  F05xxx => idem
  DEV_ID=0x442 => F030xC => 256K (128 * 2K)
                  F09xxx => idem
  DEV_ID=0x444 => F030x4 => 16K (16 * 1K)
                  F030x6 => 32K (32 * 1K)
  DEV_ID=0x445 => F070x6 => 32K (32 * 1K)
                  F04xxx => idem
  DEV_ID=0x448 => F070xB => 128K (64 * 2K)

For STM32 F100xx HD VL (0x428), max_flash_size_kb is 512 (was 128)
  refer to RM0041 Rev5: Table 5. Flash module organization (high-density
  value line devices) => (256 page of 2 Kbytes each)

Change-Id: I4ead13093f8f4b8ec900482ee049a6fc83dcc664
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5444
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agocmsis_dap_usb: Light up the leds while connected 85/5385/3
Roman Elshin [Sun, 22 Mar 2020 09:37:00 +0000 (12:37 +0300)]
cmsis_dap_usb: Light up the leds while connected

Tested with Keil ULINK2 CMSIS-DAP.

Change-Id: I331224d23412bed8b2dea25abacbf9096ddd18b1
Signed-off-by: Roman Elshin <roxmail@list.ru>
Reviewed-on: http://openocd.zylin.com/5385
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agoflash/nor: Change missing protect_check message from WARN to Info. 39/5539/2
Edward Fewell [Tue, 24 Mar 2020 21:46:59 +0000 (16:46 -0500)]
flash/nor: Change missing protect_check message from WARN to Info.

Change the current message when a flash driver does not implement
the protect_check function to LOG_INFO() from LOG_WARNING(). The
user is still notified that the procedure isn't available, but
changes the tone to indicate this is expected with this flash
driver and not something that necessarily is a problem to fix.

Change-Id: If8a2e86a23c852d562346ca36734e5d02df4a851
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5539
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agodoc: add missing target types 87/5487/3
Tarek BOCHKATI [Mon, 2 Mar 2020 14:28:04 +0000 (15:28 +0100)]
doc: add missing target types

missing target types are arm946e, avr32_ap7k, cortex_r4, dsp5680xx,
hla_target, mips_mips64, nds32_v2, nds32_v3, nds32_v3m, quark_d20xx,
quark_x10xx, riscv, stm8 and testee

Change-Id: I38f6ed78ee88c09add4b779cd409ebb1e219304f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5487
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@casualhacker.net>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agodoc: enhance target types description 86/5486/2
Tarek BOCHKATI [Mon, 2 Mar 2020 13:20:27 +0000 (14:20 +0100)]
doc: enhance target types description

target types are sorted alphabetically
minor changes for some precision:
 - cortex_a : it's an ARMv7-A core
 - cortex_m : besides the ARMv7-M it support the v6-M and v8-M cores

Change-Id: I37ade2392fe3948fba4156a2831bbd8739fa9993
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5486
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agodoc: fix OpenRISC target documentation 85/5485/2
Tarek BOCHKATI [Mon, 2 Mar 2020 12:58:07 +0000 (13:58 +0100)]
doc: fix OpenRISC target documentation

OpenRISC correct target name is 'or1k' not 'openrisc'
http://openocd.zylin.com/3096 introduced a conflict between 'openrisc'
and 'ls1_sap' documentations

Change-Id: Iedebbf9809300e1272334c5b63d0b31a41062282
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5485
Tested-by: jenkins
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget/arc_cmd: Improve argument checks for commands 23/5523/4
Evgeniy Didin [Thu, 12 Mar 2020 16:05:37 +0000 (19:05 +0300)]
target/arc_cmd: Improve argument checks for commands

Add more argument check for "add-reg" command.

Changes since first revision:
-Removed arguments limitation(50 maximum) for "arc_set_reg_exists".

Changes:
25.03:
Removed inconsistency in "add-reg" function. Actually
"-type" option is optional and if it is not set,
register type is "int".

Change-Id: Ia21e6baf4fbda162f7811cd0fe305fc86ddafcfd
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5523
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agotarget: Add possibility to remove all breakpoints 16/4916/3
Marc Schink [Thu, 14 Feb 2019 15:12:22 +0000 (16:12 +0100)]
target: Add possibility to remove all breakpoints

Change-Id: I46acd57956846d66bef974e0538452462b197cd0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget: Add function to remove all breakpoints 15/4915/3
Marc Schink [Thu, 14 Feb 2019 15:11:44 +0000 (16:11 +0100)]
target: Add function to remove all breakpoints

Change-Id: I4718926844a2c8bcfd78d7a8792f6ded293548ef
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4915
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoavrf.c: Add ATmega256RFR2 to known flash list 04/5504/4
Lars Poeschel [Tue, 5 Nov 2019 15:39:48 +0000 (16:39 +0100)]
avrf.c: Add ATmega256RFR2 to known flash list

This adds the ATmega256RFR2 to the list of know devices for flashing.

Change-Id: Ib24a508762aaa84ba08ba37409db2ae674b46288
Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5504
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoavrf.c: Use extended addressing for flash > 0x20000 02/5502/2
Lars Poeschel [Tue, 5 Nov 2019 15:37:43 +0000 (16:37 +0100)]
avrf.c: Use extended addressing for flash > 0x20000

The current method used for flash addressing uses 16 bit. Every access
to flash is 16 bit wide. With 16 address bits one can address 0x10000
unique locations á 16 bits thats 0x20000 bytes.
For flashes bigger than that avrs have an extended addressing with more
than 16 address bits. This is now implemented and used for flashs larger
than 0x20000 bytes.

Change-Id: Id8b6337dde3830fb3c56b9042872e040bb67c12d
Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5502
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agojtag: fix command "adapter [de]assert" with dap direct 15/5515/2
Antonio Borneo [Fri, 6 Mar 2020 09:30:25 +0000 (10:30 +0100)]
jtag: fix command "adapter [de]assert" with dap direct

The commit fafe6dfc9cd8 ("adapter: add command "adapter [de]assert
srst|trst [[de]assert srst|trst]"") was proposed in gerrit well
before commit a61ec3c1d73d ("adi_v5_dapdirect: add support for
adapter drivers that provide DAP API") get merged, so it didn't
include a complete support for dap direct.
The merge upstream of the two commits lacks the support by command
"adapter [de]assert" for dap direct

Let command command "adapter [de]assert" handle dap direct.

Change-Id: I1a69f8ee877c8fd57598ed4ad9d71da61d15457c
Fixes: commit fafe6dfc9cd8 ("adapter: add command "adapter [de]assert srst|trst [[de]assert srst|trst]"")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5515
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agodoc: fix texinfo files attributes on Windows 99/5499/2
Antonio Borneo [Sun, 8 Mar 2020 15:40:05 +0000 (16:40 +0100)]
doc: fix texinfo files attributes on Windows

While installing git on Windows, the user is prompted by a dialog
"Configuring the line ending conversions" to select the value for
the git property "core.autocrlf". The default choice proposed by
the installer is "Checkout Windows-style, commit Unix-style line
endings", that corresponds to "core.autocrlf=true".
Even if the dialog provides technical explanation of the different
choices, most users will blindly accept the default proposal.

With "core.autocrlf=true" git will convert to DOS mode all the
text files during "clone" (so can be edited by any crap Windows
tool) and convert back to UNIX mode during "push" operation.
While this is safe enough for C and TCL files, it breaks the
texinfo files.
The trailing '@' character used for command continuation in
https://www.gnu.org/software/texinfo/manual/texinfo/html_node/Def-Cmd-Continuation-Lines.html
does not accept being followed by CR+LF (DOS mode), generating a
build error. Same error can be replicated on Linux by passing the
file doc/openocd.texi through "unix2dos" command.
Tentative to fix this has already been proposed in
http://openocd.zylin.com/5294
http://openocd.zylin.com/5413
by breaking the command continuation syntax, which is a no go.
The correct fix would require to force/suggest all the Windows
users to get rid of the crap DOS mode, but this could have side
effects.

To workaround the issue, add a .gitattributes file in the doc
folder, specifying a local conversion attribute for the files .txt
and .texi in the doc folder and overriding the eventual incorrect
global value of "core.autocrlf" selected during installation.
The local attribute "text eol=lf" is equivalent to the global one
"core.autocrlf=input".

Change-Id: I468a8f8125b6bc4628fce6c66eb082824ba3413f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5499
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotcl/target: Enable using vectreset for CC3320SF targets 89/5489/4
Edward Fewell [Mon, 2 Mar 2020 20:04:24 +0000 (14:04 -0600)]
tcl/target: Enable using vectreset for CC3320SF targets

On CC32xx family of devices, sysrequest is disabled, and
vectreset is blocked by the boot loader (stops in a while(1)
statement). srst reset can leave the target in a state
that prevents debug.

This change enables using vectreset on SF variants by
moving the PC to the start of the user application in
internal flash. This allows for a more reliable reset,
but with two caveats:

1) This only works for the SF variant with internal
   flash.

2) This only resets the CPU and not any peripherals.

Tested on CC3220SF rev B Launchpad in both SWD and
JTAG modes. Confirmed proper behavior of reset,
reset init, reset halt, and reset run commands.

Update: reworked per comment in code review. Re-tested
with CC3220SF Launchpad as both CC3220SF and as
CC32xx board to confirm reset behavior as expected.

Update: Added adapter srst delay 1100 line to the
CC3200 LaunchXL configuration file.

Change-Id: Ibc042d785c846c2223ae55b8f2410b75ed2df354
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5489
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agodrivers: xds110: Add support of alternate XDS110 configurations 94/5494/3
Edward Fewell [Wed, 4 Mar 2020 21:14:48 +0000 (15:14 -0600)]
drivers: xds110: Add support of alternate XDS110 configurations

The XDS110 supports alternate configurations, each of which has
a unique vid/pid:

0451/bef3 -- Standard (legacy) configuration
0451/bef4 -- Drag-n-Drop configuration
1cbe/02a5 -- CMSIS-DAP 2.0 on BULK interface configuration

It's not important to OpenOCD what the differences are except
that OpenOCD needs to know how to connect using the different
vid/pids and, in the case of the last one, use a different
interface for the debug connection.

Updated the XDS110 source to search for all possible
configurations, and updated the udev rules file to enable
user access to the alternate configuraitons.

For the curious, you can download the latest XDS emupack from
software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds_software_package_download.html
Install to an empty directory, and documentation for the
XDS110 is located in the .../ccs_base/common/uscif/xds110
of the installation.

Updated for comments in code review. Changed const variable
names to lower case. Reworked interface/endpoint setting
to use arrays suggestion.

Change-Id: Icc9d11c6618f43d87ae8171c78ebf238800d3ac2
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5494
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agodrivers: xds110: Clean up command syntax and documentation 95/5495/3
Edward Fewell [Wed, 4 Mar 2020 23:24:33 +0000 (17:24 -0600)]
drivers: xds110: Clean up command syntax and documentation

Arrange all commands under a top level xds110 command. Fix
documentation to properly reflect the current functionality.

Also updated the links in the document to the new permanent
links for the XDS110 only support.

Patch updated for comments from code review. Return
ERROR_COMMAND_SYNTAX_ERROR for wrong number of args in
commands. Added deprecated commands to src/jtag/startup.tcl.

Change-Id: Ica45f65e1fdf7fa72866f4e28c4f6bce428d8ac9
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5495
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotcl/target: Use sysresetreq for MSP432 targets 88/5488/2
Edward Fewell [Mon, 2 Mar 2020 18:22:12 +0000 (12:22 -0600)]
tcl/target: Use sysresetreq for MSP432 targets

Confirmed that sysresetreq is supported and works better
for MSP432P4 and MSP432E4 targets than srst that was
previously being used.

Tested on MSP432P4111, MSP432P401R, and MSP432E401Y
Launchpads.

Change-Id: I1454c3379b9300bc133f82a766daeaefb98dbaac
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5488
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agodrivers: xds110: Add support TCK changes in firmware update 93/5493/2
Edward Fewell [Wed, 4 Mar 2020 19:07:13 +0000 (13:07 -0600)]
drivers: xds110: Add support TCK changes in firmware update

Starting with XDS110 firmware version 3.0.0.0, the peak TCK
frequency became 14,000 kHz. So the delay count calculation
in the current driver has been updated to use the new
formula for setting the TCK speed depending on which version
of the firmware is detected. And because of the changes, the
default TCK settings for the XDS110 based Launchpads can be
adjusted to take advantage of the higher TCK performance.
Note that the values used have been determined through
testing in the automated test labs to be the highest TCK
frequency with the XDS110 that are still reliable.
Different boards have a different peak TCK setting that
should be safe.

Change-Id: I4d66e90d8fac8272641ba4db4a3a510e3b444d86
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5493
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agoflash/stm32l4x: add support of STM32WB3x devices 75/5475/3
Tarek BOCHKATI [Mon, 9 Mar 2020 12:33:08 +0000 (13:33 +0100)]
flash/stm32l4x: add support of STM32WB3x devices

STM32WB3x devices' flash are quite similar to STM32WB5x,
except the maximum flash size, which is 512K for WB3x and 1M for WB5x

Change-Id: I3098d7153a7429e0e72c75cec962c05768b0b018
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5475
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/stm32l4x: add support of STM32WLEx devices 50/5450/6
Tarek BOCHKATI [Mon, 9 Mar 2020 14:10:17 +0000 (15:10 +0100)]
flash/stm32l4x: add support of STM32WLEx devices

STM32WLEx devices are based on arm Cortex-M4 running at 48MHz,
contains a single bank of maximum 256 Kbytes of flash memory.

there is 3 variants with different Flash/RAM sizes:
  STM32WLE5JC : 256K/64K
  STM32WLE5JB : 128K/48K
  STM32WLE5J8 :  64K/20K

the work-area size is set to 20 kb to fit in STM32WLE5J8

Change-Id: Ie8e186fe4be97cbc25c53ef0ade4b4dbbcee6f66
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5450
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agostlink: workaround serial bug with old ST-Link DFU 96/5396/22
Tarek BOCHKATI [Sat, 7 Mar 2020 16:20:24 +0000 (17:20 +0100)]
stlink: workaround serial bug with old ST-Link DFU

Old ST-LINK DFU returns an incorrect serial in the USB descriptor
 example for the following serial "57FF72067265575742132067"
  - the correct descriptor serial is:
    0x32, 0x03, 0x35, 0x00, 0x37, 0x00, 0x46, 0x00, 0x46, 0x00 ...
    this contains the length (0x32 = 50), the type (0x3 = DT_STRING)
    and the serial in unicode format.
    the serial part is: 0x0035, 0x0037, 0x0046, 0x0046 ... >>  57FF ...
    this format could be read correctly by 'libusb_get_string_descriptor_ascii'
    so this case is managed by libusb_helper::string_descriptor_equal
  - the buggy DFU is not doing any unicode conversion and returns a raw
    serial data in the descriptor:
    0x1a, 0x03, 0x57, 0x00, 0xFF, 0x00, 0x72, 0x00 ...
            >>    57          FF          72       ...
    based on the length (0x1a = 26) we could easily decide if we have to fixup the serial
    and then we have just to convert the raw data into printable characters using sprintf

example for an old ST-LINK/V2 standalone:
  before : 'W?r\ 6reWWB\13 g'
  after  : '57FF72067265575742132067'
  => same as the displayed value in STM32CubeProgrammer

tested using these commands
  using the buggy serial
    -c "hla_serial \x57\x3f\x72\x06\x72\x65\x57\x57\x42\x13\x20\x67"
  using the computed serial
    -c "hla_serial 57FF72067265575742132067"

Change-Id: I1213818257663eeb8e76f419087d3127d0524842
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5396
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agojtag/libusb_helper: permit adapters to compute their custom serials 96/5496/4
Tarek BOCHKATI [Fri, 6 Mar 2020 12:52:23 +0000 (13:52 +0100)]
jtag/libusb_helper: permit adapters to compute their custom serials

introduce a callback function that could be passed to jtag_libusb_open
to permit adapters to compute their custom/exotic serials.

the callback should return a non NULL value only when the serial could not
be retrieved by the standard 'libusb_get_string_descriptor_ascii'

Change-Id: Ib95d6bdfc4ee655eda538fba8becfa183c3b0059
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5496
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoflash/stm32h7x: use proper data type (bool) for has_dual_bank 00/5500/3
Tarek BOCHKATI [Tue, 17 Mar 2020 15:31:51 +0000 (16:31 +0100)]
flash/stm32h7x: use proper data type (bool) for has_dual_bank

+ minor changes in comments' alignment to please our eyes

Change-Id: Ifa35a1032afc4e9aee524f596c0298a9eea49c37
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5500
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
4 years agoflash/nor: check fill pattern fits in word size 92/5492/3
Christopher Head [Tue, 3 Mar 2020 21:25:50 +0000 (13:25 -0800)]
flash/nor: check fill pattern fits in word size

Change-Id: Idad527a428ceed2b53f3da41fb0c64bf8e62614a
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5492
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
4 years agortos: Destroy RTOS and fix memory leak 79/5479/3
Marc Schink [Thu, 27 Feb 2020 12:48:15 +0000 (13:48 +0100)]
rtos: Destroy RTOS and fix memory leak

The memory leak can be reproduced by using an arbitrary RTOS
and valgrind:

 $ valgrind --leak-check=full --show-leak-kinds=all

[...]
==9656== 224 (80 direct, 144 indirect) bytes in 1 blocks are definitely lost in loss record 3 of 3
==9656==    at 0x483CD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
==9656==    by 0x1C541A: os_alloc (rtos.c:79)
==9656==    by 0x1C569E: os_alloc_create (rtos.c:111)
==9656==    by 0x1C569E: rtos_create (rtos.c:153)
==9656==    by 0x1AE332: target_configure (target.c:4899)
==9656==    by 0x1AF228: jim_target_configure (target.c:4952)
==9656==    by 0x1C9EF9: command_unknown (command.c:1066)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313FB6: Jim_EvalObj (jim.c:10814)
==9656==    by 0x3154A3: Jim_EvalFile (jim.c:11207)
==9656==    by 0x316015: Jim_SourceCoreCommand (jim.c:15230)
==9656==    by 0x313284: JimInvokeCommand (jim.c:10364)
==9656==    by 0x313B8B: JimEvalObjList (jim.c:10605)
[...]

Change-Id: I2cd41a154fb8570842601ff4e3e76502f5908f49
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5479
Tested-by: jenkins
Reviewed-by: Moritz Fischer <moritzf@google.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoflash/startup.tcl: add STM32G0 and G4 aliases 82/5482/4
Tarek BOCHKATI [Sun, 1 Mar 2020 21:38:50 +0000 (22:38 +0100)]
flash/startup.tcl: add STM32G0 and G4 aliases

STM32G0 and G4 uses the same flash driver as the stm32l4x

Change-Id: Ic1c4be70aaee809536912e0390f07893efb9a082
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5482
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agoFlash driver for STM32G0xx and STM32G4xx 07/4807/11
Andreas Bolsch [Sun, 16 Dec 2018 16:30:41 +0000 (17:30 +0100)]
Flash driver for STM32G0xx and STM32G4xx

Flash module of STM32G0/G4 family is quite similar to the one of
STM32L4, so only minor changes are required, in particular
adaption of flash loader to Cortex-M0. Register addresses
passed to flash loader to simplify integration of L5.
Added re-probe after option byte load.
Added flash size override via cfg file.
WRPxxR mask now based on max. number of pages instead of fixed 0xFF,
as G4 devices fill up unused bits with '1'.
Sizes in stm32l4_probe changed to multiples of 1kB.

Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.
Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB.
This handling isn't optimal as the bank size includes the
size of the gap. WB not tested.

Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4807
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotcl/target: Fix naming of RZ/A1 SoC 45/5445/5
Marek Vasut [Sat, 8 Feb 2020 06:02:28 +0000 (07:02 +0100)]
tcl/target: Fix naming of RZ/A1 SoC

The RZ/A1 is not part of the R-Car family, but is rather an RZ family.
Fix the naming.

Change-Id: I5f882b2467e87e534e0f1c827554e664a7d55664
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5445
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agodrivers: xds110: Fix errors in routine that toggles 97/5497/2
Edward Fewell [Fri, 6 Mar 2020 20:39:14 +0000 (14:39 -0600)]
drivers: xds110: Fix errors in routine that toggles
TCK during nSRST assert/deassert code.

To support LPRF targets (CC13xx/CC26xx), TCK must be toggled
for 50 ms while nSRST is asserted and right after it is
released. This allows the core to halt in boot ROM before
code is run that might interfere with debug access.

The current routine has two issues. It shouldn't be run at
all if the target is using SWD. And the delay needs to
be a real-time 50 ms, so the number of TCK periods should
be calculated off the set speed.

Change-Id: If993031b84cf2a505ea67a6633602c4b01cd8e1e
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget/cortex_a: add hypervisor mode 61/5261/2
Antonio Borneo [Tue, 25 Jun 2019 14:01:38 +0000 (16:01 +0200)]
target/cortex_a: add hypervisor mode

Hypervisor mode is present only if the optional virtualization
extensions are available. Moreover, virtualization extensions
require that also security extensions are implemented.

Add the required infrastructure for the shadowed registers in
hypervisor mode.
Make monitor shadowed registers visible in hypervisor mode too.
Make hypervisor shadowed registers visible in hypervisor mode
only.
Check during cortex_a examine if virtualization extensions are
present and then conditionally enable the visibility of both
hypervisor and monitor modes shadowed registers.

Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5261
Tested-by: jenkins
4 years agoarmv7a: access monitor registers only with security extensions 59/5259/2
Antonio Borneo [Mon, 24 Jun 2019 16:28:31 +0000 (18:28 +0200)]
armv7a: access monitor registers only with security extensions

Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.

Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.

Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
4 years agotarget/armv4_5: remove unused macro 60/5260/2
Antonio Borneo [Mon, 24 Jun 2019 16:45:11 +0000 (18:45 +0200)]
target/armv4_5: remove unused macro

The macro ARMV4_5_CORE_REG_MODENUM() is unused.
Remove it!

Change-Id: I183df57bd86c9428710ea3583e43fba88fd26e0a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5260
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
4 years agoarm: Use different enum for core_type and core_mode 58/5258/2
Antonio Borneo [Mon, 24 Jun 2019 15:15:33 +0000 (17:15 +0200)]
arm: Use different enum for core_type and core_mode

The fields core_type and core_mode use the same enum arm_mode
but encode different information, making the code less immediate
to read.

Use a different enum arm_core_type for the field core_type.
The code behavior is not changed.

Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5258
Tested-by: jenkins
4 years agoarm: fix reg num for Monitor mode 57/5257/2
Antonio Borneo [Mon, 24 Jun 2019 10:17:17 +0000 (12:17 +0200)]
arm: fix reg num for Monitor mode

Commit 2efb1f14f611 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
"sp_mon" moved from index 37 to 39
"lr_mon" moved from index 38 to 40
"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].

Fix armv4_5_core_reg_map[].

Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 2efb1f14f611 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257
Tested-by: jenkins
4 years agoftdi: flush mpsse queue after a level change on reset pins 31/5431/2
Antonio Borneo [Mon, 3 Feb 2020 15:48:40 +0000 (16:48 +0100)]
ftdi: flush mpsse queue after a level change on reset pins

The function ftdi_set_signal() does not propagate the pin change
until next call to mpsse_flush(). Current code does not toggles
immediately the reset pins if polling is turned off.

Call mpsse_flush() at the end of ftdi_reset().
While there, remove the duplicated LOG message.

Change-Id: I79eacfe4fc32b5cdf2dc1b78f3660d96988466bc
Fixes: 8850eb8f2c51 ("swd: get rid of jtag queue to assert/deassert srst")
Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5431
Tested-by: jenkins
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agojimtcl: update to tag 0.79 03/5403/3
Antonio Borneo [Sat, 19 Oct 2019 17:46:53 +0000 (19:46 +0200)]
jimtcl: update to tag 0.79

OpenOCD is stuck at jimtcl tag 0.77 that is 3 years old.
The latest tag 0.79 (2019-11-20) is already used by debian build,
which packs jim library separately, as shown in [1]. Today only
the build for architecture powerpcspe is still not updated to
latest package version.
I have been using jim 0.79 since the day of the release, without
any issue.

Switch jimtcl to latest tag 0.79

[1] https://packages.debian.org/sid/openocd

Change-Id: I3426e68c32f88ecde74d4278303925423db451e0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agotarget: fix crash with jimtcl 0.78 53/5453/2
Antonio Borneo [Fri, 14 Feb 2020 13:35:51 +0000 (14:35 +0100)]
target: fix crash with jimtcl 0.78

The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.

OpenOCD commit 559d08c19ed8 ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
[target current] arp_waitstate halted 1

Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().

Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agojtag: report API reset as synchronous 71/5471/2
Antonio Borneo [Mon, 24 Feb 2020 11:26:07 +0000 (12:26 +0100)]
jtag: report API reset as synchronous

The jtag API reset() is synchronous, but this was not highlighted
in the description.

Change-Id: I76ffb7eec97c8608cfbef0b9268ee18a5f50b221
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 8850eb8f2c51 ("swd: get rid of jtag queue to assert/deassert srst")
Reviewed-on: http://openocd.zylin.com/5471
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
4 years agosemihosting: add semihosting handlers to AArch64 74/5474/2
Tarek BOCHKATI [Tue, 25 Feb 2020 18:44:58 +0000 (19:44 +0100)]
semihosting: add semihosting handlers to AArch64

note: this works only when the PE is in AArch64 state

Change-Id: Id6a336ca7d201df72bd1aaaeccce4185473fc1bd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5474
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agocortex_a: warn on broken debug_base setting 05/5105/3
Matthias Welwarsky [Thu, 11 Apr 2019 08:22:27 +0000 (10:22 +0200)]
cortex_a: warn on broken debug_base setting

A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.

Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.

This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.

Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105
Tested-by: jenkins
Reviewed-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotarget/armv8_opcodes: use T32 instructions when the PE is in AArch32 state 46/5346/3
Tarek BOCHKATI [Mon, 9 Dec 2019 11:47:07 +0000 (12:47 +0100)]
target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state

As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
    Writes to EDITR trigger the instruction to be executed if the PE
    is in Debug state:
      - If the PE is in AArch64 state, this is an A64 instruction.
      - If the PE is in AArch32 state, this is a T32 instruction

But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.

Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.

Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotarget/aarch64: fix soft breakpoint when PE is in AArch32 state 55/5355/2
Tarek BOCHKATI [Wed, 4 Dec 2019 14:09:51 +0000 (15:09 +0100)]
target/aarch64: fix soft breakpoint when PE is in AArch32 state

Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.

In this change, we check the core_state and bkpt length to know the
correct opcode to use.

Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
      if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
      then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
      length to 4 bytes, in order to set correctly the bpkt.

Change-Id: I8f3551124412c61d155eae87761767e9937f917d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotarget/aarch64: fix minor stepping issue with gdb 54/5354/2
Tarek BOCHKATI [Mon, 9 Dec 2019 11:35:01 +0000 (12:35 +0100)]
target/aarch64: fix minor stepping issue with gdb

when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.

by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.

Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agotarget: add examine-fail event 89/4289/9
Tomas Vanek [Sat, 4 Nov 2017 08:47:02 +0000 (09:47 +0100)]
target: add examine-fail event

A configuration script may want to check the reason why examine fails
e.g. device has security lock engaged.

tcl/target/kx.cfg and klx.cfg is modified to use the new event
for testing of the security lock of Kinetis MCU

Change-Id: Id1d3a79d24e84b513f4ea35586cd2ab0437ff9b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4289
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agoAdd target config for STM8S103 chip... 22/5422/2
Anton V. Kirilchik [Tue, 12 Mar 2019 20:11:39 +0000 (23:11 +0300)]
Add target config for STM8S103 chip...

Change-Id: I693e5b7933fc61956010a96be57ee6eb8abd3c31
Signed-off-by: Anton V. Kirilchik <kosmonaffft@gmail.com>
Reviewed-on: http://openocd.zylin.com/5422
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
4 years agosemihosting: reorganize semihosting commands 73/5473/3
Tarek BOCHKATI [Tue, 25 Feb 2020 18:35:44 +0000 (19:35 +0100)]
semihosting: reorganize semihosting commands

the same semihosting handlers chain is declared twice:
 1. in src/target/armv4_5.c
 2. in src/target/riscv/riscv.c

to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c

Change-Id: If813b3fd5eb2476658f1308f741c4e805141f617
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5473
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Liviu Ionescu <ilg@livius.net>
4 years agoflash/stm32h7x: fix bank sizes for devices with trimmed flash 42/5442/4
Tarek BOCHKATI [Fri, 7 Feb 2020 11:52:14 +0000 (12:52 +0100)]
flash/stm32h7x: fix bank sizes for devices with trimmed flash

STM32H7yxxI: dual independent 1 MByte banks
STM32H7yxxG: dual independent 512 Kbyte banks
STM32H7yxxB: single 128 Kbyte bank

where y = [4/5] or [A/B]

references: (documents are available in www.st.com)
 - STM32H7[4/5]x[G/I] : DS12110 Rev 7
    >> 3.3.1 Embedded Flash memory
 - STM32H750xB : RM0433 Rev 6
    >> Table 11. Flash memory organization on STM32H750xB devices
 - STM32H7[A/B]x[B/G/I] : RM0455 Rev 3
    >> 4.3.4 Flash memory architecture and usage

Change-Id: Ic9346964ef2554abf47f5832e25adfdc77bd323e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5442
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
4 years agotcl/target: Unify Renesas R-Car JTAG reset config 00/5400/8
Marek Vasut [Wed, 15 Jan 2020 04:42:03 +0000 (05:42 +0100)]
tcl/target: Unify Renesas R-Car JTAG reset config

Both Gen2 and Gen3 used the same init_reset{} implementation,
pull it into common file and include it from both generations.
Moreover, this behavior is SoC specific, not board specific,
so move the common init_reset into target/ directory.

Change-Id: I5489a4bff9a786da8cb7fd7a515b0c9ce9dc16e3
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5400
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
4 years agoflash/nor: update support for TI MSP432 devices 81/5481/2
Edward Fewell [Fri, 28 Feb 2020 22:56:11 +0000 (16:56 -0600)]
flash/nor: update support for TI MSP432 devices

Added fixes for issues found in additional code reviews.

Fixed host Endianness issues with using buffer reads
and writes instead of the *_u32 variants.

Changed code that tried to ID banks by hardcode
bank_number values to use instead the bank base
address. This fixes problems using configurations
with multiple devices.

Note that this replaces Change 4786 which has
been abandoned because of extensive changes to
the code to stop IDing banks by name.  And I
think I really messed up a rebase/merge on the
document file.

Tested on MSP432P401R, MSP432P4111, and MSP432E401Y
Launchpads.

Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5481
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
4 years agobluenrg-x: simplyfied the driver 93/5393/4
luca vinci [Wed, 8 Jan 2020 09:15:40 +0000 (10:15 +0100)]
bluenrg-x: simplyfied the driver

Adopted only fast algorithm for flash programming:
- write_word and write_byte methods have been removed.
- start and end write alignments have been defined.
Moved flash controller registers offsets in a common file
shared with the flash algorithm.
- the flash base address is passed to the flash algorithm
  as a parameter.
Removed unused functions

Change-Id: I80aeab3994e477044bbcf02e66d9525dae0cb491
Signed-off-by: luca vinci <luca.vinci@st.com>
Reviewed-on: http://openocd.zylin.com/5393
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Michele Sardo <msmttchr@gmail.com>
4 years agobluenrg-x: added support for BlueNRG-LP device 43/5343/3
luca vinci [Tue, 5 Nov 2019 07:45:04 +0000 (08:45 +0100)]
bluenrg-x: added support for BlueNRG-LP device

Extended bluenrg-x flash driver with BlueNRG-LP flash controller.
Changes include:
- register set for the flash controller
- made software structure prone to support more easily future devices
- updated target config file

Change-Id: I2e2dc70db32cf98c62e3a43f2e44a4600a25ac5b
Signed-off-by: luca vinci <luca.vinci@st.com>
Reviewed-on: http://openocd.zylin.com/5343
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

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