openocd.git
2 years agojtag: drivers: usb_blaster: clarify lowlevel driver selection code 31/3931/2
Paul Fertser [Fri, 30 Dec 2016 21:04:48 +0000 (00:04 +0300)]
jtag: drivers: usb_blaster: clarify lowlevel driver selection code

This patch should make the code logic more transparent and user
notifications more useful.

It also fixes a warning "array subscript is below array bounds" that
leads to FTBFS on Raspbian GNU/Linux 8 (jessie).

Change-Id: I626b6a5bc013dfee7d36cf196f0abab981d30675
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3931
Tested-by: jenkins
2 years agonor/nrf5: added nrf51822 QFAAH2 34/4334/2
Daniel Kucera [Sat, 13 Jan 2018 15:37:19 +0000 (16:37 +0100)]
nor/nrf5: added nrf51822 QFAAH2

Change-Id: I59725e098371c63ec3e6aa1d91bfed36b824a182
Signed-off-by: Daniel Kucera <daniel.kucera@gmail.com>
Reviewed-on: http://openocd.zylin.com/4334
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoaarch64: implement mmu on/off for aarch32 74/4374/4
Matthias Welwarsky [Mon, 22 Jan 2018 11:28:37 +0000 (12:28 +0100)]
aarch64: implement mmu on/off for aarch32

add decoding of aarch32 core modes (register layout is compatible)

Change-Id: I34c3146a7b1f836d3006be2b76b036da055b3d3e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4374
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2 years agoAdd read buffer to bitbang, improving performance. 12/4312/9
Tim Newsome [Wed, 13 Dec 2017 21:13:22 +0000 (13:13 -0800)]
Add read buffer to bitbang, improving performance.

Previously for every bit scanned OpenOCD would write the bit, wait for
that bit to be scanned, and then read the result. This involves at least
2 context switches. Most of the time the next bit scanned does not
depend on the last bit we read, so with a buffer we now write a bunch of
bits to be scanned all at once, and then we wait for them all to be
scanned and have a result.

This reduces the time for one testcase where OpenOCD connects to a
simulator from 12.30s to 5.35s!

Running all our tests went from 13m13s to 3m55s.

Change-Id: Ie9fcea043ac1d7877a521125334ed47d4b3e1615
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4312
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agoUse timeval helpers 80/4380/2
Christopher Head [Wed, 24 Jan 2018 22:35:40 +0000 (14:35 -0800)]
Use timeval helpers

Some of these changes actually fix broken comparisons which could
occasionally fail. Others just clean up the code and make it more clear.

Change-Id: I6c398bdc45fa0d2716f48a74822457d1351f81a5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoAdd timeval_compare helper function 79/4379/2
Christopher Head [Wed, 24 Jan 2018 22:22:37 +0000 (14:22 -0800)]
Add timeval_compare helper function

Change-Id: Id75727a150912ff778a4fa32ad56467da33a6324
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4379
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agotcl: target: klx: use 1KiB for working area 69/4369/2
Paul Fertser [Sat, 20 Jan 2018 18:10:39 +0000 (21:10 +0300)]
tcl: target: klx: use 1KiB for working area

Some parts have only that much. Reported by robertfoos_ on IRC.

Change-Id: I684fdccfa62cf726466ddc467543a990fd88c4dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4369
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoflash Kinetis: add K27 and K28 devices 55/4255/2
Tomas Vanek [Sun, 15 Oct 2017 08:34:27 +0000 (10:34 +0200)]
flash Kinetis: add K27 and K28 devices

Tested on FRDM-K28F. Thanks to Thomas Varghese for donating the kit.

Change-Id: Idcdd8bcf992acebd19e5335f7f833356500c45dd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4255
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agoflash Kinetis: make FCF protection more user friendly 28/4228/4
Tomas Vanek [Wed, 6 Sep 2017 20:34:14 +0000 (22:34 +0200)]
flash Kinetis: make FCF protection more user friendly

The Flash Configuration Field on Kinetis devices requires protection
because it is located in program flash space (at 0x400) and writing
an improper data to it may permanently lock the device. Even an erased
flash sector containing FCF engages security lock (not permanent one)
on the next reset or power cycle.

'kinetis fcf_source protection' mode was introduced in the change #3562.
Flash driver in this mode sets FCF immediately after sector erase to
prevent unintentional security lock. To do so the driver needs to know
FCF values before flash image data is actually processed. Flash
protection bits are available in bank structure, FOPT can be set by
'kinetis fopt' command and securing device by FSEC is not supported.

Nevertheless an inexperienced user flashed the device using an image
with FCF values different from those set in OpenOCD config and
concluded programming did not work as some verify errors showed.

This change tries to write maximum possible from image data
retaining FCF protection.

Check FCF in programmed data and report if some field differs from
values set by OpenOCD flash block protection and 'kinetis fopt' command.
Warn user about verify errors caused by FCF protection.

On devices with ECC flash (K26, K66 and KV5x) it is impossible to change
already programmed FCF - it would result in an ECC error. As FCF was
written just after erase in 'kinetis fcf_source protection' mode
the warning issued during flash write is the only possible action.

On non-ECC flash devices use cumulative flash programming to
set FCF values requested in programmed image data.
Use FSEC from programmed data only if it does not request a secure
mode. Device can be secured only in 'kinetis fcf_source write' mode.
Use FOPT from programmed data if its value was not configured
in OpenOCD config by 'kinetis fopt' command.

Change-Id: If65fbbd7700069f57e4ae32234dce371bff93674
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4228
Tested-by: jenkins
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoflash: nor: stm32l4x: fix warning in probe 52/4352/2
Paul Fertser [Wed, 17 Jan 2018 21:07:29 +0000 (00:07 +0300)]
flash: nor: stm32l4x: fix warning in probe

Reading options word can fail, so this needs to be handled.

Reported by Clang static analyzer.

Change-Id: I9754cab9c4446fa2b20d4b44b0e20724d1bc1beb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4352
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoserver: add safeguards against printing bogus port number 50/4350/4
Paul Fertser [Wed, 17 Jan 2018 14:31:58 +0000 (17:31 +0300)]
server: add safeguards against printing bogus port number

Clang static checker emits "Assigned value is garbage or undefined"
warning there as it can't prove that when the socket descriptor is
AF_INET/SOCK_STREAM and getsockname doesn't return an error, sin_port
is guaranteed to be filled in.

Pacify it by obvious means.

Change-Id: I43b5e5ceb41c07d523a81b34a25490c4c5f49a70
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4350
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agotarget, arm_adi_v5: catch two allocation errors 49/4349/2
Tomas Vanek [Sun, 14 Jan 2018 22:33:44 +0000 (23:33 +0100)]
target, arm_adi_v5: catch two allocation errors

Command
mdw 0 0x40000000
triggers Segmentation fault on an arm.
Size parameter is a nonsence that may happen e.g. if you
mistype mdw instead of mww.

Add checking for calloc() NULL return in mdb/h/w.

Use calloc() instead of malloc() as multiplication
count * sizeof(uint32_t) overflows for size >= 0x40000000.

Change-Id: I968c944d863d1173ef932a7077d526fccb9381ae
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4349
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2 years agoFix Jim interpreter memory leak 59/2959/4
Marc Schink [Wed, 10 Jan 2018 11:45:52 +0000 (12:45 +0100)]
Fix Jim interpreter memory leak

Change-Id: I71d7d97e7dc315c42fc43b65cb5fcecd7bdfb581
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2959
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agotarget: add initial imx7.cfg 90/4190/8
Oleksij Rempel [Wed, 14 Jun 2017 08:06:38 +0000 (10:06 +0200)]
target: add initial imx7.cfg

Change-Id: I899a215049ff0bc8840463c71018867ef71b5b90
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4190
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
2 years agoaarch64: speed up first examination 43/4143/4
Matthias Welwarsky [Thu, 6 Apr 2017 07:49:37 +0000 (09:49 +0200)]
aarch64: speed up first examination

Don't use atomic dap operations when not necessary. Also remove
loop trying to set core power request, didn't find a platform
where it actually worked and it's slowing examination down.

Change-Id: I44e5c2f289f951b8f4579f08a841172404a52053
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4143
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2 years agoaarch64: simplify mode and state handling 44/4144/3
Matthias Welwarsky [Thu, 6 Apr 2017 09:06:20 +0000 (11:06 +0200)]
aarch64: simplify mode and state handling

Aarch32 and Aarch64 modes don't conflict in CPSR, no need to deconflict
ARMv7-M profile modes either.

Change-Id: I4c437dfa657f9e8a1da3687bc9f21435384b7881
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4144
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2 years agoaarch64: add 'maskisr' command 23/4023/9
Matthias Welwarsky [Mon, 27 Feb 2017 16:10:19 +0000 (17:10 +0100)]
aarch64: add 'maskisr' command

Allow to configure ISR masking during single-step and add
handling for stepping over WFI with ISR masked.

Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4023
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2 years agoarm_adi_v5: added some partnumbers found in tegra 186 and tegra 210 60/4160/5
Jiri Kastner [Mon, 12 Jun 2017 13:26:02 +0000 (15:26 +0200)]
arm_adi_v5: added some partnumbers found in tegra 186 and tegra 210

Change-Id: Icd4137f3e266364d9728672bd2359fbd9a6c8ce9
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4160
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agojtagspi: new protocol that includes transfer length 36/4236/6
Robert Jordens [Tue, 8 Aug 2017 16:16:35 +0000 (18:16 +0200)]
jtagspi: new protocol that includes transfer length

This commit contains a rewrite of the jtagspi protocol and covers both
changes in the jtagspi.c openocd driver and the bscan_spi
(xilinx_bscan_spi) proxy bitstreams. The changes are as follows:

1. Always perform IR scan to ensure proper clearing of BYPASSed DRs.
2. Insert alignment cycles for all BYPASSed TAPs:

  The previous logic was erroneous. The delay in clock cyles from a bit
  written to the jtag interface to a bit read by the jtag interface is:

  * The number of BYPASSed TAPs before this (jtagspi) tap
  * The length of the jtagspi data register (1)
  * The number of BYPASSed TAPs before this one.

  I.e. it is just the number of enabled TAPs. This also gets rid of the
  configuration parameter DR_LENGTH.

3. Use marker bit to start spi transfer

  If there are TAPs ahead of this one on the JTAG chain, and we are in
  DR-SHIFT, there will be old bits toggled through first before the first
  valid bit destined for the flash.
  This delays the begin of the JTAGSPI transaction until the first high bit.

4. New jtagspi protocol

  A JTAGSPI transfer now consists of:

  * an arbitrary number of 0 bits (from BYPASS registers in front of the
    JTAG2SPI DR)
  * a marker bit (1) indicating the start of the JTAG2SPI transaction
  * 32 bits (big endian) describing the length of the SPI transaction
  * a number of SPI clock cycles (corresponding to 3.) with CS_N asserted
  * an arbitrary number of cycles (to shift MISO/TDO data through
    subsequent BYPASS registers)

5. xilinx_bscan_spi: clean up, add ultrascale

This is tested on the following configurations:

* KC705: XC7K325T
* Sayma AMC: XCKU040
* Sayma AMC + RTM): XCKU040 + XC7A15T, a board with integrated FTDI JTAG
  adapter, SCANSTA JTAG router, a Xilinx Ultrascale XCKU040 and a Xilinx
  Artix 7 15T. https://github.com/m-labs/sinara/wiki/Sayma
* Custom board with Lattice FPGA + XC7A35T
* CUstom board with 3x XCKU115-2FLVA1517E

Change-Id: I7361e9fb284ebb916302941735eebef3612aa103
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4236
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoserver/telnet: Use proper data types 13/3413/3
Marc Schink [Wed, 13 Apr 2016 09:00:19 +0000 (11:00 +0200)]
server/telnet: Use proper data types

Change-Id: Ie7588e311fa5155d5ee73148dee3d0d931bfc7f5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3413
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoftdi swd: disable SWD output pin during input 74/2274/7
Patrick Stewart [Wed, 27 Aug 2014 16:17:27 +0000 (17:17 +0100)]
ftdi swd: disable SWD output pin during input

 * Disables the data output pin while SWD is reading, so that a simple FTDI
   SWD interface can be made by connecting TCK to SWD_CLK and TDI+TDO directly
   to SWDIO. Enabled by setting SWDIO_OE to 0.

Change-Id: I7d3b71cf3f4eea163cb320aff69ed95d219190bd
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
Reviewed-on: http://openocd.zylin.com/2274
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2 years agocheckpatch: fix more "unescaped left brace" warnings 01/3801/2
Paul Fertser [Tue, 4 Oct 2016 11:33:38 +0000 (14:33 +0300)]
checkpatch: fix more "unescaped left brace" warnings

Unescaped left brace in string literals is deprecated since perl
v5.21.1.

Not a Perl programmer here so please review!

Change-Id: I724d8fa616d603e032e07afb9b8933e0ec95045b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3801
Tested-by: jenkins
2 years agoAccept 64-bit addresses in CRC requests. 17/4317/3
Tim Newsome [Tue, 26 Dec 2017 22:03:42 +0000 (14:03 -0800)]
Accept 64-bit addresses in CRC requests.

Change-Id: I6a3e97ae8ffb4dc2ca1197a8102cb9ba34de0a1e
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4317
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoSupport listening on port 0. 16/4316/3
Tim Newsome [Tue, 26 Dec 2017 21:44:26 +0000 (13:44 -0800)]
Support listening on port 0.

When listening on port 0, the system will assign a random open port. We
use this to run multiple OpenOCD instances against multiple simulators
as part of regression testing. This mechanism means the various test
instances don't have to coordinate to ensure they don't reuse any ports.

The required changes are minimal:
1. Don't increment the port number when it's 0.
2. Print out which port was assigned by the system.

Change-Id: I404c801fc405e9d8eb8420562c02e78d4db6242f
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4316
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoejtag: added missing instructions. 50/3950/2
Jiri Kastner [Mon, 16 Jan 2017 15:57:58 +0000 (16:57 +0100)]
ejtag: added missing instructions.

added missing instructions from latest available ejtag specification
(MD00047 v6.1 at time of writting) for trace control, fast data channel
and pcsample.

Change-Id: I30293951611265ffc2bd896f9d3ca6b310e5cac6
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3950
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoserver/telnet: Handle Ctrl+A and Ctrl+E 15/3415/2
Marc Schink [Sun, 4 Oct 2015 18:21:00 +0000 (20:21 +0200)]
server/telnet: Handle Ctrl+A and Ctrl+E

Handle the Ctrl+A and Ctrl+E shortcuts which move the cursor to the
beginning and end of the command line, respectively.

Change-Id: I89fa5fd3c5edeb08a3f9320fda766f72ce9d7f64
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3415
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoprofiling: write "correct" sample rate to gmon output 21/4221/4
Karl Palsson [Fri, 8 Sep 2017 15:44:52 +0000 (15:44 +0000)]
profiling: write "correct" sample rate to gmon output

This duration vs sample count is _significantly_ closer to the truth
than simply declaring the value to be 100Hz.

Change-Id: Ie8d8bdf1959e1aa7cead0631cd2c86afe77d1efc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4221
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agohla_target: allow non-intrusive profiling on cortex-m 20/4220/3
Karl Palsson [Fri, 8 Sep 2017 10:49:30 +0000 (10:49 +0000)]
hla_target: allow non-intrusive profiling on cortex-m

Leverages the existing work that added profiling via DWT_PCSR.

hla_target doesn't have direct access to the mem_ap for doing a bulk
repeated read, but simply reading the DWT_PCSR register repeatedly is
still ~2 order of magnitude faster than halt/resume.

Change-Id: Ibe451aa95143694398370fdad6939cfb6191d56f
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/4220
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agocortex_m: add profiling function 11/4211/6
Simon Schubert [Fri, 1 Sep 2017 18:34:09 +0000 (20:34 +0200)]
cortex_m: add profiling function

Use DWT_PCSR if present (reads nonzero); otherwise do halt-and-sample pc.

Signed-off-by: Simon Schubert <2@0x2c.org>
Change-Id: Id2dc4665e5008cc497a2e6e6493522d038d5af42
Reviewed-on: http://openocd.zylin.com/4211
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agotarget: lakemon: implement assert_reset and deassert_reset 16/4016/3
Felipe Balbi [Fri, 24 Feb 2017 13:26:39 +0000 (15:26 +0200)]
target: lakemon: implement assert_reset and deassert_reset

We're using an I/O port reset by default. The only board currently
supported (Galileo) doesn't have SRST routed on the JTAG connector.

When using 'reset halt', we must rely on Reset Break because our
adapters don't have support for PREQ#/PRDY# signals.

Tested with Intel Galileo GEN2.

Change-Id: Ia406e31c156f8001717d5b6a08bd03f71de790d3
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4016
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agotarget: quark_x10xx: miscellaneous cleanups 15/4015/2
Felipe Balbi [Fri, 24 Feb 2017 13:25:32 +0000 (15:25 +0200)]
target: quark_x10xx: miscellaneous cleanups

Just some misc cleanups without any functional changes. It's just
easier to read.

Change-Id: I66bee31f297bcbdb8cc4446b774d7714fbaa7c83
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4015
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agotarget: type: fix indentation 14/4014/2
Felipe Balbi [Fri, 24 Feb 2017 13:23:53 +0000 (15:23 +0200)]
target: type: fix indentation

No functional changes, cleanup only

Change-Id: I53c422be16d0a4ff157745d31362f6483093e5eb
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4014
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agotarget: lakemon: probemode entry isn't instantaneous 13/4013/2
Felipe Balbi [Fri, 24 Feb 2017 13:21:37 +0000 (15:21 +0200)]
target: lakemon: probemode entry isn't instantaneous

When testing with Intel Galileo GEN2 I have noticed a few iterations
where probemode entry took a little longer. At most I had to read
tapstatus twice. This patch uses a loop of up to 100 iterations to
wait for tapstatus to update with PM entry results.

Change-Id: I1c87d7dde715255b3fd2460d299b9493218533fc
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agotarget: quark_x10xx: adding missing 'static' keyword 12/4012/2
Felipe Balbi [Mon, 20 Feb 2017 15:35:55 +0000 (17:35 +0200)]
target: quark_x10xx: adding missing 'static' keyword

These symbols are only used within this C source file. They don't need
to be exposed to the outside.

Change-Id: Idb04550ecca7f12c3fdc8c6447eeeb871961add3
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Reviewed-on: http://openocd.zylin.com/4012
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agodigilent_jtag_smt2_nc: add support 87/4187/6
Robert Jordens [Thu, 3 Aug 2017 14:25:13 +0000 (16:25 +0200)]
digilent_jtag_smt2_nc: add support

The Digilent SMT2 NC is nominally the connector-less version of the
SMT2. But neither the SMT2 configuration nor the HS3 configuration work
for on the Xilinx KCU105 board where the SMT2 NC is used.

Change-Id: Ieb27cbc6d8b0f9c64ef778e4e0c839acc85ec0ef
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4187
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoXCF (Xilinx platfrom flash) support. 14/3914/3
barthess [Sun, 11 Dec 2016 12:11:41 +0000 (15:11 +0300)]
XCF (Xilinx platfrom flash) support.

Change-Id: I4ee6db5f0abdb9fd279cc0edd13f71952a9d295d
Signed-off-by: Uladzimir Pylinski <barthess@yandex.ru>
Reviewed-on: http://openocd.zylin.com/3914
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agodoc: add SVF optional arguments descriptions 14/4314/3
Paul Fertser [Thu, 21 Dec 2017 10:40:29 +0000 (13:40 +0300)]
doc: add SVF optional arguments descriptions

Change-Id: I1a3e5b04b6bc4821c4d11c8fcb33b426d6d41bfb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4314
Tested-by: jenkins
Reviewed-by: Jim Norris <u17263@att.net>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2 years agoserver: gdb: always print target information in multi-target setups 35/4135/2
Paul Fertser [Wed, 17 May 2017 08:03:19 +0000 (11:03 +0300)]
server: gdb: always print target information in multi-target setups

When multiple targets are declared, it's not always obvious which
target the connection was made for, this can lead to very confusing
errors.

Reported by zjason on IRC.

Change-Id: I52906320394e89cb6cfe82054a3f94b27c999689
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4135
Tested-by: jenkins
2 years agoflash/startup: make program accept filenames with spaces and other characters 83/4083/2
Paul Fertser [Tue, 28 Mar 2017 10:23:43 +0000 (13:23 +0300)]
flash/startup: make program accept filenames with spaces and other characters

This should allow to process any path names excluding those that have
curly braces.

Change-Id: I87bf9ddede11e2b28d5826878eb1338143f73c03
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4083
Tested-by: jenkins
2 years agotools: release.sh: produce only SHA256 hashes 49/3949/2
Paul Fertser [Sun, 15 Jan 2017 15:40:54 +0000 (18:40 +0300)]
tools: release.sh: produce only SHA256 hashes

Both MD5 and SHA-1 shouldn't be relied upon since long.

Change-Id: I0dea92fbf0f68b900c0d3a314fb3956d08ba0d48
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3949
Tested-by: jenkins
2 years agojtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srst 33/3933/2
Paul Fertser [Sat, 31 Dec 2016 18:01:52 +0000 (21:01 +0300)]
jtag: drivers: sysfsgpio, bcm2835gpio: remove requirement to have trst or srst

This doesn't seem to make any sense.

Change-Id: I272de0ea3c0e86cc9a798cbd864050aaa597c3f0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3933
Tested-by: jenkins
2 years agotarget: arm: disassembler: decode v6T2 ARM MOV{W,T} instructions 99/3899/2
Paul Fertser [Fri, 2 Dec 2016 18:54:10 +0000 (21:54 +0300)]
target: arm: disassembler: decode v6T2 ARM MOV{W,T} instructions

Change-Id: I32cf2669b1b22d4142f30674cf918e36561a885e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3899
Tested-by: jenkins
2 years agotarget: arm: disassembler: decode v6T2 ARM ISB instruction 95/3895/2
Paul Fertser [Fri, 2 Dec 2016 17:15:46 +0000 (20:15 +0300)]
target: arm: disassembler: decode v6T2 ARM ISB instruction

Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3895
Tested-by: jenkins
2 years agotarget: arm: disassembler: decode v6T2 ARM DSB instruction 94/3894/3
Paul Fertser [Fri, 2 Dec 2016 17:03:07 +0000 (20:03 +0300)]
target: arm: disassembler: decode v6T2 ARM DSB instruction

Change-Id: Id91b1a87d34982c72f2a8ab46564c961d1fef9dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3894
Tested-by: jenkins
2 years agotarget: arm: disassembler: add v5T Thumb BLX decoding 93/3893/2
Paul Fertser [Fri, 2 Dec 2016 16:04:17 +0000 (19:04 +0300)]
target: arm: disassembler: add v5T Thumb BLX decoding

Reported by thesourcerer on IRC.

Change-Id: I36d4d95de176a19fdd0bf80d8b419be6ca637e98
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3893
Tested-by: jenkins
2 years agoflash: startup.tcl: do not disable polling when not exiting 43/4243/3
Paul Fertser [Fri, 6 Oct 2017 16:39:21 +0000 (19:39 +0300)]
flash: startup.tcl: do not disable polling when not exiting

Change-Id: I31b8a8b4519d65d6587207a71eb08dcee8ddd6fd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4243
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2 years agoremote_bitbang_sysfsgpio: fix reset handling 83/4283/2
Aleksey Shargalin [Tue, 31 Oct 2017 13:56:01 +0000 (16:56 +0300)]
remote_bitbang_sysfsgpio: fix reset handling

When both SRST and TRST asserted, 'u' is sent to remote bitbang.
Fix for correct handling of such a case

Change-Id: I2a93ff71f5bbae658e6c0c3649a9fbcca2c5a14b
Signed-off-by: Aleksey Shargalin <myokaski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4283
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoboard: consolidate st_nucleo_l4 boards 13/4313/2
Pushpal Sidhu [Tue, 5 Dec 2017 17:36:17 +0000 (09:36 -0800)]
board: consolidate st_nucleo_l4 boards

We can now use the generic stlink.cfg which allows for both ST-LINK/V2
and V2-1 debuggers.

Change-Id: I229c6fe5f6a6a4f2d3c787a49939846f102f9e24
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
Reviewed-on: http://openocd.zylin.com/4313
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoAdded config files for stm8l152 stm8s003 and stm8s105 68/4268/6
Ake Rehnman [Tue, 24 Oct 2017 18:50:39 +0000 (20:50 +0200)]
Added config files for stm8l152 stm8s003 and stm8s105

Change-Id: I26cc401aafac01e5aed8eac605488da5221ffdc2
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4268
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agostlink_usb: Changes to make connect_under_reset work 65/4265/8
Ake Rehnman [Sat, 4 Nov 2017 18:12:17 +0000 (19:12 +0100)]
stlink_usb: Changes to make connect_under_reset work

Leaving mode before closing added
Resolved a collision with JTAG API v1 error/status
checking overwriting SWIM status bytes

Change-Id: I35444ec0e6caace3e072c60085059602f4cdf0a4
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/4265
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agojtag/drivers/stlink_usb : implemented and repaired SWIM support 52/3952/9
Ake Rehnman [Sat, 21 Jan 2017 09:42:11 +0000 (10:42 +0100)]
jtag/drivers/stlink_usb : implemented and repaired SWIM support

Fixed a bug in stlink_usb_read_mem/write_mem preventing large data transfers

The SWIM support in stlink_usb was basically non existent so I have
implemented the missing parts. The bCBWCBLength and dCBWDataTransferLength
for STLINK-V1 protocol was not correct so that was fixed. The reason for
adding SWIM support is to add STM8 support for OpenOCD.

I have tested the driver on:
STM8 discovery board with the built-in STLINK-V1
STM8 discovery board with STLINK-V2 dongle
STM32 vldiscovery board with the built-in STLINK-V1
STM32F1xxx processor with STLINK-V2 dongle

Change-Id: I4aa80a92fb0226174356adaf2f8ff949920a621f
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3952
Tested-by: jenkins
Reviewed-by: Philipp Klaus Krause
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoarm_adi_v5: fix regression from 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f 26/4326/2
Tomas Vanek [Wed, 10 Jan 2018 14:17:14 +0000 (15:17 +0100)]
arm_adi_v5: fix regression from 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f

Functions mem_ap_read() and mem_ap_write() incremented address even
if addrinc=false. I overlooked this fact and moved mem_ap_setup_tar()
set wrong addresses in no-incr mode.

Fixed by preventing address increment in no-incr mode.

Change-Id: I512e12a6a64e30cf6bc5bf77e3d57d35cc33e058
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4326
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agojtag/drivers/kitprog: Enable LOG_DEBUG_IO 23/4323/2
Forest Crossman [Sat, 6 Jan 2018 04:11:38 +0000 (22:11 -0600)]
jtag/drivers/kitprog: Enable LOG_DEBUG_IO

Change-Id: Ic01b0acf01e18bcb2bf98c101c7b5888cdc10186
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4323
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoaarch64: fix crash on single-stepping 84/4184/3
Matthias Welwarsky [Wed, 26 Jul 2017 09:23:19 +0000 (11:23 +0200)]
aarch64: fix crash on single-stepping

Make sure to skip un-examined targets (e.g. targets with deferred
examination) on single-stepping

fixes bug #158

Change-Id: Ib40c6fee03079fd078bd52a84615e6f8a081d128
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4184
Tested-by: jenkins
Reviewed-by: Yao Qi <qiyaoltc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoarm_adi_v5: reduce some CSW writes 63/4163/3
Tomas Vanek [Thu, 15 Jun 2017 09:03:32 +0000 (11:03 +0200)]
arm_adi_v5: reduce some CSW writes

MEM-AP access through banked data registers MEM_AP_REG_BD0..3
does not increment TAR regardless of the current autoincrement mode.
mem_ap_read_u32() and mem_ap_write_u32() can keep the current
autoincrement mode instead of switching autoincrement off.

Change-Id: Ib7ec688d3e04f1da678363cd2819ce90e8910e58
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4163
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoarm_adi_v5: fix wrong addressing after change of CSW_ADDRINC 62/4162/7
Tomas Vanek [Thu, 15 Jun 2017 06:59:01 +0000 (08:59 +0200)]
arm_adi_v5: fix wrong addressing after change of CSW_ADDRINC

Problem: If the same memory location is accessed alternatively
by MEM-AP banked data registers without autoincrement and by standard
autoincremented read/write, TAR register is not updated correctly.

How to replicate: On a Cortex-M issue
    mdw 0xe000edf0
multiple times. When poll is on (poll reads the same memory location)
only the first read is correct.
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 20002640
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 00000000

No problems with poll off.
0xe000edf0: 01000000
0xe000edf0: 01000000
0xe000edf0: 01000000

mem_ap_setup_tar() writes to MEM_AP_REG_TAR if requested TAR value
changed or CSW_ADDRINC_... is currently active.
However if an autoincremented access has been issued and autoinc
switched off in CSW afterwards, TAR does not get updated.

The change introduces mem_ap_update_tar_cache() which is called
after queuing of any access to MEM_AP_REG_DRW. It simulates
TAR increment to keep tar_value in sync with MEM_AP.
Crossing tar autoincrement block boundary invalidates cached value.

mem_ap_write() and mem_ap_read() do not check tar autoincrement
block boundary, mem_ap_setup_tar() is called before each transfer instead.

dap_invalidate_cache() is introduced to ensure invalidation
of all cached values during dap_dp_init() and swd_connect()

Change-Id: I815c2283d2989cffd6ea9a4100ce2f29dc3fb7b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4162
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agotarget aarch64: rework memory read/write to use 8/16/32 bit operations 01/4301/5
Bas Vermeulen [Sun, 26 Nov 2017 21:31:55 +0000 (22:31 +0100)]
target aarch64: rework memory read/write to use 8/16/32 bit operations

The existing code only used Memory Access mode to read memory,
which uses 32 bit operations only.
Rework the code to check the alignment/size of the read/write operation,
and use the Memory Access mode to read aligned 32 bit memory.
When using unaligned access, or 8 or 16 bit reads, use LDR{BHW} and STR{BHW}
instead.

The exception handling is still the same as it was before (meaning it breaks
when things go wrong), but I can now read an 8 bit register correctly.

Change-Id: I739a5ee825c0226ed4a89c32895cc2a047b8dc15
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4301
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agojtag/drivers/cmsis-dap: fix connect under reset 00/4100/5
Tomas Vanek [Sun, 9 Apr 2017 08:59:57 +0000 (10:59 +0200)]
jtag/drivers/cmsis-dap: fix connect under reset

Commit ef02b69b14d133b061217a91add5a028a77e86bc included
a call to cmsis_dap_cmd_DAP_Connect() before calling
cmsis_dap_cmd_DAP_SWJ_Sequence(). According to comment
it is necessary for at least Keil ULINK-ME.

Commit 72c3464be42088dc75245cf2fcc8f5c6e6959b4b added
a cmsis_dap_cmd_DAP_Disconnect() before connect call to pair
connection/disconnection. It solves some problems on Atmel EDBG.

Unfortunately calling either of cmsis_dap_cmd_DAP_Connect()
or cmsis_dap_cmd_DAP_Disconnect() deasserts reset signal.
So these workarounds break ability to connect under reset.

Use cmsis_dap_cmd_DAP_Disconnect() and cmsis_dap_cmd_DAP_Connect()
pair only if both SRST and TRST are deasserted.

Change-Id: I0914dae0a1360b8c7fe48231ff3867caedfb2dbe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Leonardo Sabino dos Santos <leonardo.sabino@gmail.com>
Reviewed-on: http://openocd.zylin.com/4100
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoconfig for ESPRESSObin from Globalscale Tech. Inc. 03/4303/9
Jiri Kastner [Sat, 16 Dec 2017 21:21:14 +0000 (22:21 +0100)]
config for ESPRESSObin from Globalscale Tech. Inc.

Change-Id: I77f536a9d2e901ebcef0a7dd0f205e5332b1d382
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4303
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoconfigs for Marvell Armada 3700 02/4302/10
Jiri Kastner [Sat, 16 Dec 2017 21:17:52 +0000 (22:17 +0100)]
configs for Marvell Armada 3700

Change-Id: I367f39c9bc9e58380d6d5b500d5368d5173d96bd
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/4302
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agotarget: remove unused event definitions 85/4285/4
Tomas Vanek [Tue, 31 Oct 2017 11:32:22 +0000 (12:32 +0100)]
target: remove unused event definitions

Events reset-halt-pre, reset-halt-post, reset-wait-pre and
reset-wait-post are not used anywhere.

Change-Id: I9a0f94875b102d9b08f6c2fd9d73a9f05f8e8e79
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4285
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoflash/nor/stm32f2x: fix erase on STM32F413/423 99/4299/3
Tomas Vanek [Thu, 23 Nov 2017 13:47:37 +0000 (14:47 +0100)]
flash/nor/stm32f2x: fix erase on STM32F413/423

Theese devices do not have a gap in sector numbering.
The driver translates sectors numbers 12 13... to 16 17... as used on dual
bank flash devices. Therefore erase of sector 12 and above fails with error
'stm32x device protected'
on F413/423.

Drop sector number translation for devices without has_large_mem flag.

Change-Id: I65531c0dfe02e2fd0f3d68f0615e0926e9901391
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4299
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoflash/nor/stm32f2x: fix protection block size for F767 in dual bank mode 71/4271/2
Tomas Vanek [Thu, 26 Oct 2017 16:00:33 +0000 (18:00 +0200)]
flash/nor/stm32f2x: fix protection block size for F767 in dual bank mode

A protection block comprises two adjacent sectors in dual bank mode.
As there are 64 and 128kB sectors joined in blocks 2 and 8, block size
should be computed as a sum of sector sizes.

Change-Id: Ie915df8cf7ca232c4565d7e0c514c8933e71fdfe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4271
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agodoc: improve stm32 flash driver documentation 09/4309/3
Spencer Oliver [Thu, 7 Dec 2017 12:30:35 +0000 (12:30 +0000)]
doc: improve stm32 flash driver documentation

also remove legacy footnote as it adds no value.

Change-Id: I3892acf244bd8fba6f844a5d82a66004e193a395
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4309
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2 years agojtag: drivers: stlink: handle all versions with single config 61/3961/5
Paul Fertser [Thu, 26 Jan 2017 20:41:40 +0000 (23:41 +0300)]
jtag: drivers: stlink: handle all versions with single config

Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.

Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoconfig: stm32l01x and stm32l02x chips support 08/4308/3
elmot [Thu, 7 Dec 2017 08:08:28 +0000 (10:08 +0200)]
config: stm32l01x and stm32l02x chips support

New low-end chips have only 2k of RAM, workarea size adjusted

Change-Id: Ibfccd73fef9e6dabffc87d901736c5626ce411fe
Signed-off-by: Ilia Motornyi <elijah.mot@gmail.com>
Reviewed-on: http://openocd.zylin.com/4308
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agodocs: add missing stm32 flash driver documentation 07/4307/2
Spencer Oliver [Wed, 6 Dec 2017 22:04:49 +0000 (22:04 +0000)]
docs: add missing stm32 flash driver documentation

Change-Id: I433780646e6fdfd0c2527b4a68025946ccb79d8b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/4307
Tested-by: jenkins
Reviewed-by: <alexandre.torgue@st.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2 years agostm8 : new target 53/3953/11
Ake Rehnman [Mon, 6 Nov 2017 18:56:28 +0000 (19:56 +0100)]
stm8 : new target

New STM8 target based mostly on mips4k. Target communication
through STLINK/SWIM. No flash driver yet but it is still possible
to program flash through load_image command. The usual target debug
methods are implemented.

Change-Id: I7216f231d3ac7c70cae20f1cd8463c2ed864a329
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/3953
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoAdd STM32H7 config files 82/4182/3
Alexandre Torgue [Mon, 13 Nov 2017 16:00:58 +0000 (17:00 +0100)]
Add STM32H7 config files

Add 2 target files:
-stm32h7x.cfg
-stm32h7x_dual_bank.cfg

Add 2 config files for:
-STM32H743zi-nucleo bord
-STM32H743i and STM32H753i eval boards.

Change-Id: I2aae2c5acff4f3ff8e1bf232fda5a11a87f71703
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4182
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2 years agoflash: Add new stm32h7x driver support 81/4181/3 81/4181/4
Alexandre Torgue [Mon, 13 Nov 2017 13:05:28 +0000 (14:05 +0100)]
flash: Add new stm32h7x driver support

Add basic support for:
     -STM32H7x (Embedded flash 2M)

Erase and write tested on stm32h743.

Change-Id: Ie8d8786227cdeee39fcf5663167a053ad8dcef4c
Signed-off-by: Rémi Prud'homme <remi.prudhomme@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-on: http://openocd.zylin.com/4181
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2 years agoOnly call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled 94/4294/2
Bas Vermeulen [Tue, 21 Nov 2017 16:12:24 +0000 (17:12 +0100)]
Only call cmsis_dap_cmd_DAP_SWD_Configure when swd_mode is enabled

The CMSIS-DAP used by NXP's LS1012ARDB board only supports JTAG,
and not SWD. Calling cmsis_dap_cmd_DAP_SWD_Configure returns with an
error (and doesn't actually do anything in the debugger).

Wrap the call to cmsis_dap_cmd_DAP_SWD_Configure in a check for
swd_mode, to make sure initialisation doesn't fail needlessly.

Change-Id: Id7e568cb6e36886bd7c5b3699d198a77a51c28c9
Signed-off-by: Bas Vermeulen <bas@daedalean.ai>
Reviewed-on: http://openocd.zylin.com/4294
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2 years agospi: add n25q256 flash 86/4186/7
Robert Jordens [Fri, 19 Aug 2016 21:49:49 +0000 (05:49 +0800)]
spi: add n25q256 flash

* 256 MBit SPI flash
* https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_l_256_aba_0.pdf spells out the entire zoo of IDs
* used e.g. on Xilinx KCU105

Change-Id: I18b19292b4869627adb9071266271962fec68fb4
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2 years agoserver/gdb: Use 'bool' instead of 'int' for boolean values 78/4278/2
Marc Schink [Sun, 29 Oct 2017 18:54:00 +0000 (19:54 +0100)]
server/gdb: Use 'bool' instead of 'int' for boolean values

Change-Id: I71c2f2553a29e9ef167ff3313cc06c7b31c64190
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4278
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoserver/gdb: Use get_target_from_connection() 77/4277/2
Marc Schink [Thu, 22 Sep 2016 20:36:28 +0000 (22:36 +0200)]
server/gdb: Use get_target_from_connection()

Change-Id: I2c66bf6da734a3b71e358553943e9fc3c6578c39
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4277
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agotarget: Constify parameter of is_armv7m() 75/4275/2
Marc Schink [Sun, 29 Oct 2017 14:58:41 +0000 (15:58 +0100)]
target: Constify parameter of is_armv7m()

Change-Id: Ieea1b0dec88818e9e8d5c8c5d54aa8959556d77b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4275
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agortos: Use 'bool' as return type for detect_rtos() 74/4274/2
Marc Schink [Sun, 29 Oct 2017 10:39:51 +0000 (11:39 +0100)]
rtos: Use 'bool' as return type for detect_rtos()

Change-Id: I91ad0431d44ed94f48d20c4690f8642d66f52a9b
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4274
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoadi_v5_swd: Add error message when SWD fails to connect 69/4269/3
Jonas Norling [Wed, 25 Oct 2017 08:38:49 +0000 (10:38 +0200)]
adi_v5_swd: Add error message when SWD fails to connect

Error message instead of failing silently.

Change-Id: Ie54a5bf68459d3c0e96cc38080ffad8de0a4b5ce
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4269
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoftdi: Enable SWDIO output before sending data on it 70/4270/2
Jonas Norling [Wed, 25 Oct 2017 09:33:06 +0000 (11:33 +0200)]
ftdi: Enable SWDIO output before sending data on it

The SWDIO buffer has to be enabled, by setting SWDIO_OE, for data on
SWDIO to reach the target. Explicitly do this before sending the
switch sequences for JTAG-to-SWD, etc.

This makes the code insensitive to the state of SWDIO_OE specified in
ftdi_layout_init. It used to work only on adapters with a non-inverted
SWDIO_OE inited to 1, or inverted SWDIO_OE inited to 0.

Change-Id: I4b9e520ac1c7ce2a437251a05fc036bc68de718e
Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com>
Reviewed-on: http://openocd.zylin.com/4270
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agotcl/interface/ftdi/openrd: Fix FTDI channel + device description 54/4254/2
Jonathan McDowell [Fri, 13 Oct 2017 06:53:32 +0000 (07:53 +0100)]
tcl/interface/ftdi/openrd: Fix FTDI channel + device description

Similar to the Sheevaplug fix inf95f8b70fbd0f7e9c91a2d9006b1abb2dd07ebf2
the OpenRD device has its JTAG interface on the first channel of the
ft2232, which is 0 for the new driver but was 1 for the old one. Correct
the config file appropriately. Also the device description was missing
the trailing " B" and thus not picking up the device correctly. Finally
add an adapter_khz setting in the OpenRD board configuration file - set
to 2MHz to match the Sheeva variant.

Confirmed as working thanks to Phil Hands providing me access to his
hardware to test on.

See also Debian Bug#793214; https://bugs.debian.org/793214

Change-Id: Ifacf53124eaa330bbbdf36dfa79e3256bf2a5201
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4254
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoCortex-M: Delete an unnecessary local variable 40/4240/2
Christopher Head [Tue, 3 Oct 2017 20:23:57 +0000 (13:23 -0700)]
Cortex-M: Delete an unnecessary local variable

The dhcsr_save variable was used to save the value of
cortex_m->dcb_dhcsr so it could be restored later. However, all writes
in between the save and the restore use mem_ap_write_atomic_u32, not
cortex_m_write_debug_halt_mask, which means cortex_m->dcb_dhcsr isn’t
changed anyway. Delete the unnecessary local.

Change-Id: I064a3134e21398e1ecfc9f1fa7efd7b020b52341
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4240
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoCortex-M: fix stale DHCSR cache values 39/4239/3
Christopher Head [Tue, 3 Oct 2017 19:59:06 +0000 (12:59 -0700)]
Cortex-M: fix stale DHCSR cache values

In cortex_m_assert_reset, in two locations, DHCSR is written directly
using mem_ap_write_u32. This means that the cached version,
target_to_cm(target)->dcb_dhcsr, is not updated when these writes are
performed, so subsequent writes to DHCSR that use
cortex_m_write_debug_halt_mask will change those bits back to their old
values which, unless modified in that particular invocation, come from
the cache. This causes an actual, observable bug on an STM32F7 in which
running “reset run” immediately after “program” can in some cases result
in execution proceeding with C_MASKINTS set (it is cleared on line 1021
but is then set immediately afterward in cortex_m_clear_halt), causing
failure of the application. Replace these mem_ap_write_u32 calls with
cortex_m_write_debug_halt_mask calls to do the same jobs.

Change-Id: Id35ca7f6057c2df2ba9cd67c53a73b50816d0b71
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4239
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2 years agoFix GCC7 warnings about string truncation 75/4175/5
Freddie Chopin [Thu, 29 Jun 2017 21:49:03 +0000 (23:49 +0200)]
Fix GCC7 warnings about string truncation

GCC7 with -Wall warns about possible string truncation with
snprint()-type functions with "directive output may be truncated writing
1 byte into a region of size between 0 and 9
[-Werror=format-truncation=]" + "note: ‘snprintf’ output between 5 and
14 bytes into a destination of size 12" (or similar). Fix this by
increasing sizes of buffers.

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Ib848f2a56dd658783534158947ae1be7c0e99d45
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4175
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2 years agoFix GCC7 warnings about switch-case fallthroughs 74/4174/4
Freddie Chopin [Thu, 29 Jun 2017 21:48:19 +0000 (23:48 +0200)]
Fix GCC7 warnings about switch-case fallthroughs

GCC7 with -Wextra warns about switch-case blocks which fallthrough with
"this statement may fall through [-Werror=implicit-fallthrough=]". This
can be fixed by adding "special" comments: "/* fallthrough */".

See https://gcc.gnu.org/gcc-7/changes.html

Change-Id: Iba0be791dbdd86984489b2d9a0592bb59828da1e
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/4174
Tested-by: jenkins
2 years agoarm: semihosting: set command line arguments 06/3106/4
Andreas Fritiofson [Wed, 28 Dec 2016 22:43:53 +0000 (23:43 +0100)]
arm: semihosting: set command line arguments

Add "arm semihosting_cmdline [argv0 argv1 ...]" for setting the
command line arguments for the debuggee.

[andreas.fritiofson@gmail.com]: Dynamic allocation, empty default

Change-Id: I831ddd161d602f251940e29608a154e9590fdee1
Signed-off-by: Christian Groessler <chris@groessler.org>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3106
Tested-by: jenkins
2 years agoDifferentiate "target not halted" messages. 44/4244/2
Tim Newsome [Fri, 6 Oct 2017 21:36:34 +0000 (14:36 -0700)]
Differentiate "target not halted" messages.

Change-Id: I8728fa007289d7af5c6791142e76eb5777c83ca4
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4244
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agoDocument `struct reg` fields. 50/4250/2
Tim Newsome [Sun, 8 Oct 2017 19:03:25 +0000 (12:03 -0700)]
Document `struct reg` fields.

Change-Id: I286316079e2e4d4f09427a4ffbecadb48c5dc9d9
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4250
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2 years agotcl: add hi3798 target and Tocoding Poplar board config 61/4161/4
Peter Griffin [Mon, 12 Jun 2017 15:28:03 +0000 (16:28 +0100)]
tcl: add hi3798 target and Tocoding Poplar board config

This config covers the 4x Cortex A53 CPUs. A custom connector
is required from J14 to standard ARM JTAG on v1 boards. However
v2 hardware should have a standard FTSH-105-01-L-DV connector.

Pinmuxing code to enable JTAG pins is included in l-loader-poplar
repository, so board is flashed with open source code, JTAG
is available at very early boot. Alternatively the following
pokes can be issued from U-Boot to enable JTAG (e.g. to debug
hisilicon SDK).

mw 0xf8a210ec 0x130;
mw 0xf8a210f0 0x130;
mw 0xf8a210f4 0x130;
mw 0xf8a210f8 0x130;
mw 0xf8a210fc 0x130;
mw 0xf8a21100 0x130;

Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-on: http://openocd.zylin.com/4161
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agonrf5: Add nRF52832-QFAA support 10/4210/3
Slowcoder [Thu, 31 Aug 2017 20:34:16 +0000 (22:34 +0200)]
nrf5: Add nRF52832-QFAA support

Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4210
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agonrf51: Rename to nrf5 09/4209/7
Slowcoder [Thu, 31 Aug 2017 19:09:42 +0000 (21:09 +0200)]
nrf51: Rename to nrf5

Renaming of all nrf51 NOR flash code to nrf5, as to prepare the
code for being able to flash nrf51 and nrf52 chips.

The nrf51 command is retained for backwards compatability.

"nRF5" is also the name Nordic Semiconductor uses to describe
both the nrf51 and nrf52 chips.

Change-Id: I5f4e3f1ec780184b28ad44f735a746e68908c502
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4209
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agonrf51: Refactor device-list 08/4208/2
Slowcoder [Thu, 31 Aug 2017 18:53:57 +0000 (20:53 +0200)]
nrf51: Refactor device-list

This cleans up the list of supported nrf51 chips considerably.

Change-Id: Ic74685657bb72a8703c0a49df4c48c54604ec2a7
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4208
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agostm32lx.c: Read IDcode at appropriate address. 83/3883/5
Uwe Bonnes [Mon, 14 Nov 2016 18:12:38 +0000 (19:12 +0100)]
stm32lx.c: Read IDcode at appropriate address.

Trying to read the L0 idcode at the L1 idcode address 0xE0042000 often
resulted in an uncatched error. Reading at the right L0 address 0x40015800
afterwards results in reading 0. So access to the device is denied..

Change-Id: I6de92cf99a5d5d46c72f9ba055613cbc5753a951
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3883
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agotarget: atheros_ar9344: add simple uart0 test 94/4194/2
Oleksij Rempel [Sun, 6 Aug 2017 07:50:05 +0000 (09:50 +0200)]
target: atheros_ar9344: add simple uart0 test

in some cases we need something to test if uart is actually
properly connected.

Change-Id: I5a16b053164b34bb30ae8370753be12887a85c51
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4194
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoboard: add TP-Link WDR4300 config 92/4192/3
Oleksij Rempel [Sat, 15 Jul 2017 15:53:37 +0000 (17:53 +0200)]
board: add TP-Link WDR4300 config

tested on TP-Link WDR4300 v1.7

Change-Id: If2b456afac835ab3a3987d434d20824c7ba75b93
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agotarget: add atheros_ar9344.cfg 91/4191/3
Oleksij Rempel [Sat, 15 Jul 2017 15:52:01 +0000 (17:52 +0200)]
target: add atheros_ar9344.cfg

Change-Id: I005b4c78ccb0fec8d38a25430cb49c580dcd8df5
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4191
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoboard: tp-link_tl-mr3020: add ath79 support 93/4193/3
Oleksij Rempel [Sun, 6 Aug 2017 05:58:31 +0000 (07:58 +0200)]
board: tp-link_tl-mr3020: add ath79 support

Finally we can use this driver by default!

Change-Id: I09d215d1bd1dc16873a7379637e6869af65ad8f1
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4193
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoserver: Add port number to socket bind error 57/4157/2
Robert Foss [Wed, 7 Jun 2017 20:49:29 +0000 (16:49 -0400)]
server: Add port number to socket bind error

Make this error message more useful by providing the port number
that we tried to bind to.

Change-Id: Ieb18adf0725a6ae99c77ebfaadc49d64ed407bbe
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-on: http://openocd.zylin.com/4157
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agotcl/interface/ftdi: improve minimodule config 85/4185/2
Diego Herranz [Thu, 3 Aug 2017 06:37:41 +0000 (07:37 +0100)]
tcl/interface/ftdi: improve minimodule config

- Tested on a real FT2232H MiniModule, so warning removed.
- Every pin initially set to high impedance except TCK, TDI,
  TDO and TMS: Safest values given it's an evaluation board
  and the rest of pins might be connected to something else.
- Reset is now initially de-asserted (it was asserted
  which is not recommended).
- nRST pin choice is arbitrary so comment added (wondering
  if it should be an "echo").
- "-oe" option added to NRST signal so it can be set as
  high impedance (tri-stated).

Change-Id: I967ab0c7bbccf72dbf6d6d78b3180b74e016e0d6
Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
Reviewed-on: http://openocd.zylin.com/4185
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2 years agoflash: efm32: add support for EFR-familty (e.g. bluegecko) 34/4034/4
Andrea Merello [Wed, 1 Mar 2017 10:32:07 +0000 (11:32 +0100)]
flash: efm32: add support for EFR-familty (e.g. bluegecko)

This patch adds support for Blue Gecko and Mighty Gecko chips from
Silabs.

They have different EFM32_MSC_REGBASE and LOCK register offset.

Based on the original patch from Andreas Kemnade.

Change-Id: I166c14960ced7c880b68083badd1b31372fefabe
Cc: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Reviewed-on: http://openocd.zylin.com/4034
Reviewed-by: Jonas Norling <jonas.norling@cyanconnode.com>
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: chrysn <chrysn@fsfe.org>
2 years agotcl/interface/ftdi/sheevaplug: Fix FTDI channel configuration 06/4206/2
Jonathan McDowell [Sun, 27 Aug 2017 18:12:21 +0000 (19:12 +0100)]
tcl/interface/ftdi/sheevaplug: Fix FTDI channel configuration

The migration from the old ft2232 driver to the new generic ftdi driver
ended up breaking support for the SheevaPlug device. The old driver
defaulted to channel 1, but numbered the channels 1 to 4. The new driver
starts at 0. The SheevaPlug JTAG is on interface A (interface B is the
serial console), so it should be using channel 0. Fix this. Confirmed
as working; serial console remains available and a new u-boot image can
be transferred across using the JTAG link.

See also Debian Bug#837989; https://bugs.debian.org/837989

Change-Id: I4ac2bfeb0d1e7e99d70fa47dc55f186e6af2c542
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4206
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2 years agoAdd missing break 00/4200/2
Fabio Utzig [Fri, 11 Aug 2017 16:17:03 +0000 (13:17 -0300)]
Add missing break

Change-Id: Ie1de679fe6ab5ace05fc3e156c71f34b296b3d3b
Signed-off-by: Fabio Utzig <utzig@apache.org>
Reviewed-on: http://openocd.zylin.com/4200
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Esben Haabendal <esbenhaabendal@gmail.com>