From: Marc Schink <dev@zapb.de>
Date: Wed, 8 Jul 2020 13:36:29 +0000 (+0200)
Subject: tcl/target: Add initial GigaDevice GD32VF103 support
X-Git-Tag: v0.11.0-rc1~183
X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff_plain;h=cf902f7034efd8c9db248b631420838679e9a1ed

tcl/target: Add initial GigaDevice GD32VF103 support

There is no flash bank support at the moment.

Change-Id: I52a2bde39425d94d9333cda002e5df0a1ef63c08
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5755
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
---

diff --git a/tcl/target/gd32vf103.cfg b/tcl/target/gd32vf103.cfg
new file mode 100644
index 0000000000..0f4dcf375e
--- /dev/null
+++ b/tcl/target/gd32vf103.cfg
@@ -0,0 +1,26 @@
+#
+# GigaDevice GD32VF103 target
+#
+# https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/
+#
+
+transport select jtag
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME gd32vf103
+}
+
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x800
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0