From: Matthias Welwarsky Date: Sun, 18 Oct 2015 12:12:27 +0000 (+0200) Subject: armv7a: fix-up dcache clean and flush functions inner loop pattern X-Git-Tag: v0.10.0-rc1~334 X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff_plain;h=6d7f5be6acfb275ce43f61514162fbd7798725d7 armv7a: fix-up dcache clean and flush functions inner loop pattern Other cache functions use an updated pattern for the address range loop. Bring dcache clean and flush functions in line. Change-Id: Iccb4a05c49054471033a3403363110cb08245d5b Signed-off-by: Matthias Welwarsky Reviewed-on: http://openocd.zylin.com/3035 Tested-by: jenkins Reviewed-by: Paul Fertser --- diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c index acc388a273..9237e73fe5 100644 --- a/src/target/armv7a_cache.c +++ b/src/target/armv7a_cache.c @@ -218,7 +218,8 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt, struct armv7a_common *armv7a = target_to_armv7a(target); struct arm_dpm *dpm = armv7a->arm.dpm; struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache; - uint32_t i, linelen = armv7a_cache->dminline; + uint32_t linelen = armv7a_cache->dminline; + uint32_t va_line, va_end; int retval; retval = armv7a_l1_d_cache_sanity_check(target); @@ -229,15 +230,19 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt, if (retval != ERROR_OK) goto done; - for (i = 0; i < size; i += linelen) { - uint32_t offs = virt + i; + va_line = virt & (-linelen); + va_end = virt + size; + while (va_line < va_end) { /* DCCMVAC - Data Cache Clean by MVA to PoC */ retval = dpm->instr_write_data_r0(dpm, - ARMV4_5_MCR(15, 0, 0, 7, 10, 1), offs); + ARMV4_5_MCR(15, 0, 0, 7, 10, 1), va_line); if (retval != ERROR_OK) goto done; + va_line += linelen; } + + dpm->finish(dpm); return retval; done: @@ -253,7 +258,8 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt, struct armv7a_common *armv7a = target_to_armv7a(target); struct arm_dpm *dpm = armv7a->arm.dpm; struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache; - uint32_t i, linelen = armv7a_cache->dminline; + uint32_t linelen = armv7a_cache->dminline; + uint32_t va_line, va_end; int retval; retval = armv7a_l1_d_cache_sanity_check(target); @@ -264,15 +270,19 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt, if (retval != ERROR_OK) goto done; - for (i = 0; i < size; i += linelen) { - uint32_t offs = virt + i; + va_line = virt & (-linelen); + va_end = virt + size; + while (va_line < va_end) { /* DCCIMVAC */ retval = dpm->instr_write_data_r0(dpm, - ARMV4_5_MCR(15, 0, 0, 7, 14, 1), offs); + ARMV4_5_MCR(15, 0, 0, 7, 14, 1), va_line); if (retval != ERROR_OK) goto done; + va_line += linelen; } + + dpm->finish(dpm); return retval; done: