From: David Brownell Date: Tue, 15 Dec 2009 22:39:25 +0000 (-0800) Subject: more tcl/{board,target} cleanup X-Git-Tag: v0.4.0-rc1~34 X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff_plain;h=4a2f4e34336dbb662a308e5a881edbba9f3657ec more tcl/{board,target} cleanup Remove more remnants of the old "jtag_device" syntax. Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity. Remove various non-supported "-variant" target options; they're not needed often at all. Flag some of the board files as needing to have and use target files for the TAP and target declarations. Signed-off-by: David Brownell --- diff --git a/tcl/board/at91eb40a.cfg b/tcl/board/at91eb40a.cfg index 62d3c9c3dc..40f2e123fc 100644 --- a/tcl/board/at91eb40a.cfg +++ b/tcl/board/at91eb40a.cfg @@ -1,5 +1,9 @@ #Script for AT91EB40a +# FIXME use some standard target config, maybe create one from this +# +# source [find target/...cfg] + if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { @@ -30,12 +34,11 @@ if { [info exists CPUTAPID ] } { reset_config srst_only srst_pulls_trst #jtag scan chain -#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID #target configuration set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME # speed up memory downloads arm7_9 fast_memory_access enable diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg index 6e8a193469..b0fe546202 100644 --- a/tcl/board/at91sam9g20-ek.cfg +++ b/tcl/board/at91sam9g20-ek.cfg @@ -5,6 +5,10 @@ # # ################################################################################################# +# FIXME use some standard target config, maybe create one from this +# +# source [find target/...cfg] + # Define basic characteristics for the CPU. The AT91SAM9G20 processor is a subtle variant of # the AT91SAM9260 and shares the same tap ID as it. @@ -34,8 +38,8 @@ jtag_ntrst_delay 200 jtag_rclk 5 -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME # Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The # AT91SAM9G20 has two SRAM areas, one starting at 0x00200000 and the other starting at 0x00300000. diff --git a/tcl/board/digi_connectcore_wi-9c.cfg b/tcl/board/digi_connectcore_wi-9c.cfg index 3bc26adf8a..2d82376691 100644 --- a/tcl/board/digi_connectcore_wi-9c.cfg +++ b/tcl/board/digi_connectcore_wi-9c.cfg @@ -4,6 +4,10 @@ reset_config trst_and_srst +# FIXME use some standard target config, maybe create one from this +# +# source [find target/...cfg] + if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { @@ -29,7 +33,7 @@ if { [info exists CPUTAPID ] } { set _CPUTAPID 0x07926031 } -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +set _TARGETNAME $_CHIPNAME.cpu jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID jtag_nsrst_delay 200 @@ -40,7 +44,7 @@ jtag_ntrst_delay 0 # Target configuration ###################### -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -event reset-init { mww 0x90600104 0x33313333 diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg index 968d80eccb..af7527a166 100644 --- a/tcl/board/hitex_str9-comstick.cfg +++ b/tcl/board/hitex_str9-comstick.cfg @@ -11,8 +11,13 @@ jtag_nsrst_delay 100 jtag_ntrst_delay 100 #use combined on interfaces or targets that can't set TRST/SRST separately reset_config trst_and_srst -#jtag scan chain -#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) + +# +# FIXME use the standard str912 target config; that script might need +# updating to "-ignore-version" for the boundary scan TAP +# +# source [find target/str912.cfg] +# if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -50,8 +55,8 @@ if { [info exists BSTAPID ] } { } jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -event reset-init { # We can increase speed now that we know the target is halted. diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg index 0f7ebf8a44..47bebc43df 100644 --- a/tcl/board/mini2440.cfg +++ b/tcl/board/mini2440.cfg @@ -71,6 +71,11 @@ # # # + +# FIXME use some standard target config, maybe create one from this +# +# source [find target/...cfg] + #------------------------------------------------------------------------- # Target configuration for the Samsung 2440 system on chip # Tested on a S3C2440 Evaluation board by keesj @@ -102,8 +107,8 @@ if { [info exists CPUTAPID ] } { #jtag scan chain jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1 #reset configuration diff --git a/tcl/board/str910-eval.cfg b/tcl/board/str910-eval.cfg index 0cf794aece..a2772a84de 100644 --- a/tcl/board/str910-eval.cfg +++ b/tcl/board/str910-eval.cfg @@ -3,6 +3,10 @@ # Need reset scripts reset_config trst_and_srst +# FIXME use some standard target config, maybe create one from this +# +# source [find target/...cfg] + if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { @@ -37,8 +41,8 @@ if { [info exists BSTAPID ] } { } jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME $_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 1 $_TARGETNAME configure -event reset-init { diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg index 3f526d068b..8278fa4696 100644 --- a/tcl/board/zy1000.cfg +++ b/tcl/board/zy1000.cfg @@ -31,8 +31,8 @@ if { [info exists CPUTAPID ] } { } jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME # at CPU CLK <32kHz this must be disabled arm7_9 fast_memory_access enable diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg index 47bab1e34c..20383315cd 100644 --- a/tcl/target/ar71xx.cfg +++ b/tcl/target/ar71xx.cfg @@ -10,7 +10,7 @@ set CHIPNAME ar71xx jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1 -set TARGETNAME [format "%s.cpu" $CHIPNAME] +set TARGETNAME $CHIPNAME.cpu target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME $TARGETNAME configure -event reset-halt-post { diff --git a/tcl/target/c100.cfg b/tcl/target/c100.cfg index a0a28d80a2..b175f23f4f 100644 --- a/tcl/target/c100.cfg +++ b/tcl/target/c100.cfg @@ -35,7 +35,7 @@ jtag newtap $_CHIPNAME dsp -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_D # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME # C100's ARAM 64k SRAM diff --git a/tcl/target/lpc2900.cfg b/tcl/target/lpc2900.cfg index 2371dd7aac..769d39d4e7 100644 --- a/tcl/target/lpc2900.cfg +++ b/tcl/target/lpc2900.cfg @@ -29,7 +29,7 @@ if { [info exists ETBTAPID ] } { reset_config trst_and_srst separate # Define the _TARGETNAME -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +set _TARGETNAME $_CHIPNAME.cpu # Include the ETB tap controller if asked for. # Has to be done manually for newer devices (not an "old" LPC2917/2919). diff --git a/tcl/target/tmpa900.cfg b/tcl/target/tmpa900.cfg index 80adc65221..329e03caed 100644 --- a/tcl/target/tmpa900.cfg +++ b/tcl/target/tmpa900.cfg @@ -39,8 +39,8 @@ jtag_ntrst_delay 20 # Target configuration ###################### -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME # built-in RAM0 #working_area 0 0xf8004000 0x4000 nobackup diff --git a/tcl/target/tmpa910.cfg b/tcl/target/tmpa910.cfg index 4af5e4e898..29d2d6efa9 100644 --- a/tcl/target/tmpa910.cfg +++ b/tcl/target/tmpa910.cfg @@ -39,8 +39,8 @@ jtag_ntrst_delay 20 # Target configuration ###################### -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME # built-in RAM0 #working_area 0 0xf8004000 0x4000 nobackup