From: Sasha Kozaruk <alkhozar@gmail.com>
Date: Fri, 20 Mar 2020 01:53:24 +0000 (-0700)
Subject: flash/stm32h7x: Use proper flash regs base for bank 1
X-Git-Tag: v0.11.0-rc1~363
X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff_plain;h=0a804222da63c5f849efa23b019a59e2dea76842

flash/stm32h7x: Use proper flash regs base for bank 1

On stm32h747 writing/erasing bank 1 didn't work. It was because the
flash register base was always set for bank 0.
Tested on STM32H747I-DISCO board.

Change-Id: I7e8c43ecdda9dc70b114905f5ec6a6753ca29d82
Signed-off-by: Sasha Kozaruk <alkhozar@gmail.com>
Reviewed-on: http://openocd.zylin.com/5534
Reviewed-by: Christopher Head <chead@zaber.com>
Tested-by: jenkins
---

diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c
index 1e2b351590..7b6fdb39ca 100644
--- a/src/flash/nor/stm32h7x.c
+++ b/src/flash/nor/stm32h7x.c
@@ -118,7 +118,6 @@ struct stm32h7x_part_info {
 	uint16_t max_flash_size_kb;
 	bool has_dual_bank;
 	uint16_t max_bank_size_kb;  /* Used when has_dual_bank is true */
-	uint32_t flash_regs_base;   /* Flash controller registers location */
 	uint32_t fsize_addr;        /* Location of FSIZE register */
 	uint32_t wps_group_size;    /* write protection group sectors' count */
 	uint32_t wps_mask;
@@ -175,7 +174,6 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
 	.max_flash_size_kb	= 2048,
 	.max_bank_size_kb	= 1024,
 	.has_dual_bank		= true,
-	.flash_regs_base	= FLASH_REG_BASE_B0,
 	.fsize_addr			= 0x1FF1E880,
 	.wps_group_size		= 1,
 	.wps_mask			= 0xFF,
@@ -191,7 +189,6 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
 	.max_flash_size_kb	= 2048,
 	.max_bank_size_kb	= 1024,
 	.has_dual_bank		= true,
-	.flash_regs_base	= FLASH_REG_BASE_B0,
 	.fsize_addr			= 0x08FFF80C,
 	.wps_group_size		= 4,
 	.wps_mask			= 0xFFFFFFFF,
@@ -763,8 +760,16 @@ static int stm32x_probe(struct flash_bank *bank)
 		LOG_INFO("Device: %s", stm32x_info->part_info->device_str);
 	}
 
-	/* update the address of controller from data base */
-	stm32x_info->flash_regs_base = stm32x_info->part_info->flash_regs_base;
+	/* update the address of controller */
+	if (bank->base == FLASH_BANK0_ADDRESS)
+		stm32x_info->flash_regs_base = FLASH_REG_BASE_B0;
+	else if (bank->base == FLASH_BANK1_ADDRESS)
+		stm32x_info->flash_regs_base = FLASH_REG_BASE_B1;
+	else {
+		LOG_WARNING("Flash register base not defined for bank %d", bank->bank_number);
+		return ERROR_FAIL;
+	}
+	LOG_DEBUG("flash_regs_base: 0x%" PRIx32, stm32x_info->flash_regs_base);
 
 	/* get flash size from target */
 	retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb);