# possible that initial tap examination failed. So let's
# re-examine the target again here when nSRST is asserted which
# should then succeed.
- jtag_reset 0 1
+ adapter assert srst
feroceon.cpu arp_examine
halt 0
- jtag_reset 0 0
+ adapter deassert srst
wait_halt
arm mcr 15 0 0 1 0 0x00052078
proc init_reset {mode} {
# Assert both resets: equivalent to a power-on reset
- jtag_reset 1 1
+ adapter assert trst assert srst
# Deassert TRST to begin TAP communication
- jtag_reset 0 1
+ adapter deassert trst assert srst
# TAP should now be responsive, validate the scan-chain
jtag arp_init
proc init_reset {mode} {
# Assert both resets: equivalent to a power-on reset
- jtag_reset 1 1
+ adapter assert trst assert srst
# Deassert TRST to begin TAP communication
- jtag_reset 0 1
+ adapter deassert trst assert srst
# TAP should now be responsive, validate the scan-chain
jtag arp_init
# possible that initial tap examination failed. So let's
# re-examine the target again here when nSRST is asserted which
# should then succeed.
- jtag_reset 0 1
+ adapter assert srst
feroceon.cpu arp_examine
halt 0
- jtag_reset 0 0
+ adapter deassert srst
wait_halt
arm mcr 15 0 0 1 0 0x00052078
# reset processing that works with PXA
proc init_reset {mode} {
# assert both resets; equivalent to power-on reset
- jtag_reset 1 1
+ adapter assert trst assert srst
# drop TRST after at least 32 cycles
sleep 1
- jtag_reset 0 1
+ adapter deassert trst assert srst
# minimum 32 TCK cycles to wake up the controller
runtest 50
jtag arp_init
# ... and take it out of reset
- jtag_reset 0 0
+ adapter deassert trst deassert srst
}
proc jtag_init {} {
reset_config trst_and_srst srst_pulls_trst
#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-on reset is not enough
-jtag_reset 1 1
-jtag_reset 0 0
+adapter assert trst assert srst
+adapter deassert trst deassert srst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)