cfg: add initial Atmel xplained kit support

These kits feature a CMSIS-DAP compliant debugger and so have been added
as part of the pending support.

Currently the flash drivers for the L8 and D20 are wip.

One issue this implementation of CMSIS-DAP raised is that it supports
512byte HID reports, however using the current HIDAPI we have no cross platform
way of querying this info. Long term we plan to add this support to HIDAPI.

Change-Id: Ie8b7c871f58a099d963cd71a9f8a0105a38784e9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1625
Tested-by: jenkins

diff --git a/contrib/openocd.udev b/contrib/openocd.udev
index c1e04b5f9915686a46e502f88fe6dd3057ed7115..66ec9ba1758d412170b3fc2ceee039204d664d55 100644 (file)
--- a/contrib/openocd.udev
+++ b/contrib/openocd.udev
@@ -101,4 +101,8 @@ KERNEL=="hidraw*", ATTRS{idVendor}=="c251", ATTRS{idProduct}=="f002", MODE="664"
 ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2722", MODE="664", GROUP="plugdev"
 KERNEL=="hidraw*", ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2722", MODE="664", GROUP="plugdev"
 
+# Atmel EDBG CMSIS-DAP
+ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="2111", MODE="664", GROUP="plugdev"
+KERNEL=="hidraw*", ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="2111", MODE="664", GROUP="plugdev"
+
 LABEL="openocd_rules_end"

diff --git a/tcl/board/atmel_sam4l8_xplained_pro.cfg b/tcl/board/atmel_sam4l8_xplained_pro.cfg
new file mode 100644 (file)
index 0000000..80ccc9f
--- /dev/null
+++ b/tcl/board/atmel_sam4l8_xplained_pro.cfg
@@ -0,0 +1,11 @@
+#
+# Atmel SAM4L8 Xplained Pro evaluation kit.
+# http://www.atmel.com/tools/ATSAM4L8-XPRO.aspx
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# chip name
+set CHIPNAME ATSAM4LC8CA
+
+source [find target/at91sam4lXX.cfg]

diff --git a/tcl/board/atmel_sam4s_xplained_pro.cfg b/tcl/board/atmel_sam4s_xplained_pro.cfg
new file mode 100644 (file)
index 0000000..d2acc48
--- /dev/null
+++ b/tcl/board/atmel_sam4s_xplained_pro.cfg
@@ -0,0 +1,11 @@
+#
+# Atmel SAM4S Xplained Pro evaluation kit.
+# http://www.atmel.com/tools/ATSAM4S-XPRO.aspx
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# chip name
+set CHIPNAME ATSAM4SD32C
+
+source [find target/at91sam4sd32x.cfg]

diff --git a/tcl/board/atmel_samd20_xplained_pro.cfg b/tcl/board/atmel_samd20_xplained_pro.cfg
new file mode 100644 (file)
index 0000000..525aee0
--- /dev/null
+++ b/tcl/board/atmel_samd20_xplained_pro.cfg
@@ -0,0 +1,11 @@
+#
+# Atmel SAMD20 Xplained Pro evaluation kit.
+# http://www.atmel.com/tools/ATSAMD20-XPRO.aspx
+#
+
+source [find interface/cmsis-dap.cfg]
+
+# chip name
+set CHIPNAME at91samd20j18
+
+source [find target/at91samdXX.cfg]

diff --git a/tcl/target/at91sam4XXX.cfg b/tcl/target/at91sam4XXX.cfg
index 24b3deb8e6308bd271490b77a56120aed47dab4d..cc2941a8198f7550753ffb36676d8304fbc07daa 100644 (file)
--- a/tcl/target/at91sam4XXX.cfg
+++ b/tcl/target/at91sam4XXX.cfg
@@ -1,6 +1,12 @@
+#
 # script for ATMEL sam4, a CORTEX-M4 chip
 #
 
+#
+# sam4 devices can support both JTAG and SWD transports.
+#
+source [find target/swj-dp.tcl]
+
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
 } else {
@@ -13,17 +19,13 @@ if { [info exists ENDIAN] } {
    set _ENDIAN little
 }
 
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
-#
-# Since we may be running of an RC oscilator, we crank down the speed a
-# bit more to be on the safe side. Perhaps superstition, but if are
-# running off a crystal, we can run closer to the limit. Note
-# that there can be a pretty wide band where things are more or less stable.
-
-adapter_khz 500
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x4000
+}
 
 #jtag scan chain
 if { [info exists CPUTAPID] } {
@@ -32,18 +34,32 @@ if { [info exists CPUTAPID] } {
    set _CPUTAPID 0x4ba00477
 }
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # 16K is plenty, the smallest chip has this much
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
 $_TARGETNAME configure -event gdb-flash-erase-start {
     halt
 }
 
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter_khz 500
+
+adapter_nsrst_delay 100
+if {$using_jtag} {
+ jtag_ntrst_delay 100
+}
+
 # if srst is not fitted use SYSRESETREQ to
 # perform a soft reset
 cortex_m reset_config sysresetreq

diff --git a/tcl/target/at91sam4lXX.cfg b/tcl/target/at91sam4lXX.cfg
new file mode 100644 (file)
index 0000000..67759bc
--- /dev/null
+++ b/tcl/target/at91sam4lXX.cfg
@@ -0,0 +1,6 @@
+# script for ATMEL sam4l, a CORTEX-M4 chip
+#
+
+source [find target/at91sam4XXX.cfg]
+
+# no flash defined yet

diff --git a/tcl/target/at91sam4sXX.cfg b/tcl/target/at91sam4sXX.cfg
index 0b29f5e8a5a394e0fe68c27d1ee1ac4601829ec0..3de4aa850ad36aac8b85ff62e4cfce634a74b87d 100644 (file)
--- a/tcl/target/at91sam4sXX.cfg
+++ b/tcl/target/at91sam4sXX.cfg
@@ -1,7 +1,6 @@
 # script for ATMEL sam4, a CORTEX-M4 chip
 #
 
-
 source [find target/at91sam4XXX.cfg]
 
 set _FLASHNAME $_CHIPNAME.flash

diff --git a/tcl/target/at91sam4sd32x.cfg b/tcl/target/at91sam4sd32x.cfg
index 4bc93cbf4c09899dc91f7fe52d1ae8b932c370ba..e44db66e0d7f1c1299b3517ee572b86f56015b44 100644 (file)
--- a/tcl/target/at91sam4sd32x.cfg
+++ b/tcl/target/at91sam4sd32x.cfg
@@ -1,7 +1,6 @@
 # script for ATMEL sam4sd32, a CORTEX-M4 chip
 #
 
-
 source [find target/at91sam4XXX.cfg]
 
 set _FLASHNAME $_CHIPNAME.flash0

diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg
new file mode 100644 (file)
index 0000000..0a1ef26
--- /dev/null
+++ b/tcl/target/at91samdXX.cfg
@@ -0,0 +1,61 @@
+#
+# script for ATMEL samdXX, a CORTEX-M0 chip
+#
+
+#
+# samdXX devices only support SWD transports.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME at91samd
+}
+
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 2kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x800
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x4ba00477
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+$_TARGETNAME configure -event gdb-flash-erase-start {
+    halt
+}
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+
+adapter_khz 500
+adapter_nsrst_delay 100
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m reset_config sysresetreq
+
+# no flash defined yet