- Fixes '[|]' whitespace
authorzwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 23 Jun 2009 22:45:15 +0000 (22:45 +0000)
committerzwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 23 Jun 2009 22:45:15 +0000 (22:45 +0000)
- Replace ')\([|]\)(' with ') \1 ('.
- Replace ')\([|]\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\([|]\)(' with '\1 \2 ('.
- Replace '\(\w\)\([|]\)\(\w\)' with '\1 \2 \3'.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2374 b42882b7-edfa-0310-969c-e2dbd0fdcd60

34 files changed:
src/ecosboard.c
src/flash/at91sam7.c
src/flash/flash.c
src/flash/lpc2000.c
src/flash/nand.c
src/flash/non_cfi.c
src/flash/ocl/at91sam7x/main.c
src/flash/ocl/at91sam7x/samflash.c
src/flash/pic32mx.c
src/flash/stellaris.c
src/flash/stellaris.h
src/flash/stm32x.c
src/flash/str7x.c
src/flash/str9xpec.c
src/flash/tms470.c
src/helper/binarybuffer.h
src/helper/command.c
src/helper/jim-eventloop.c
src/helper/jim-eventloop.h
src/helper/jim.c
src/helper/jim.h
src/jtag/jlink.c
src/jtag/parport.c
src/jtag/tcl.c
src/jtag/zy1000/jtag_minidriver.h
src/jtag/zy1000/zy1000.c
src/target/arm7_9_common.c
src/target/arm_adi_v5.c
src/target/armv4_5.c
src/target/cortex_m3.c
src/target/etm.c
src/target/mips32.h
src/target/target.c
src/target/xscale.c

index df92ce8..62f7319 100644 (file)
@@ -1460,7 +1460,7 @@ static int logfs_fo_close(struct CYG_FILE_TAG *fp);
 // For simplicity we use _FILESYSTEM synchronization for all accesses since
 // we should never block in any filesystem operations.
 FSTAB_ENTRY( logfs_fste, "logfs", 0,
-               CYG_SYNCMODE_FILE_FILESYSTEM|CYG_SYNCMODE_IO_FILESYSTEM,
+               CYG_SYNCMODE_FILE_FILESYSTEM | CYG_SYNCMODE_IO_FILESYSTEM,
                logfs_mount,
                logfs_umount,
                logfs_open,
index 2ab1cd3..8be4bc9 100644 (file)
@@ -107,7 +107,7 @@ static int at91sam7_register_commands(struct command_context_s *cmd_ctx)
        command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL);
 
        register_command(cmd_ctx, at91sam7_cmd, "gpnvm", at91sam7_handle_gpnvm_command, COMMAND_EXEC,
-                                       "at91sam7 gpnvm <bit> set|clear, set or clear one gpnvm bit");
+                                       "at91sam7 gpnvm <bit> set | clear, set or clear one gpnvm bit");
        return ERROR_OK;
 }
 
@@ -284,7 +284,7 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16
        target_write_u32(target, MC_FCR[bank->bank_number], fcr);
        LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number + 1, pagen);
 
-       if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB)|(cmd == CLB)))
+       if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB) | (cmd == CLB)))
        {
                /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
                if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
@@ -1138,7 +1138,7 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char
 
        if (argc != 2)
        {
-               command_print(cmd_ctx, "at91sam7 gpnvm <bit> <set|clear>");
+               command_print(cmd_ctx, "at91sam7 gpnvm <bit> <set | clear>");
                return ERROR_OK;
        }
 
index d93c4ef..a850ced 100644 (file)
@@ -197,7 +197,7 @@ int flash_init_drivers(struct command_context_s *cmd_ctx)
                register_command(cmd_ctx, flash_cmd, "write_image", handle_flash_write_image_command, COMMAND_EXEC,
                                                 "write_image [erase] <file> [offset] [type]");
                register_command(cmd_ctx, flash_cmd, "protect", handle_flash_protect_command, COMMAND_EXEC,
-                                                "set protection of sectors at <bank> <first> <last> <on|off>");
+                                                "set protection of sectors at <bank> <first> <last> <on | off>");
        }
 
        return ERROR_OK;
index 69bb6c5..106c2ba 100644 (file)
 /* flash programming support for Philips LPC2xxx devices
  * currently supported devices:
  * variant 1 (lpc2000_v1):
- * - 2104|5|6
- * - 2114|9
- * - 2124|9
+ * - 2104 | 5|6
+ * - 2114 | 9
+ * - 2124 | 9
  * - 2194
- * - 2212|4
- * - 2292|4
+ * - 2212 | 4
+ * - 2292 | 4
  *
  * variant 2 (lpc2000_v2):
  * - 213x
  * - 214x
- * - 2101|2|3
- * - 2364|6|8
+ * - 2101 | 2|3
+ * - 2364 | 6|8
  * - 2378
  */
 
index 9851e78..e2641ae 100644 (file)
@@ -311,9 +311,9 @@ int nand_init(struct command_context_s *cmd_ctx)
                                                 "erase blocks on NAND flash device <num> <offset> <length>");
                register_command(cmd_ctx, nand_cmd, "dump", handle_nand_dump_command, COMMAND_EXEC,
                                                 "dump from NAND flash device <num> <filename> "
-                                                "<offset> <length> [oob_raw|oob_only]");
+                                                "<offset> <length> [oob_raw | oob_only]");
                register_command(cmd_ctx, nand_cmd, "write", handle_nand_write_command, COMMAND_EXEC,
-                                                "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc|oob_softecc_kw]");
+                                                "write to NAND flash device <num> <filename> <offset> [oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
                register_command(cmd_ctx, nand_cmd, "raw_access", handle_nand_raw_access_command, COMMAND_EXEC,
                                                 "raw access to NAND flash device <num> ['enable'|'disable']");
        }
index 4731367..f3fd20f 100644 (file)
@@ -29,7 +29,7 @@
 
 #define KB 1024
 #define MB (1024*1024)
-#define ERASE_REGION(num, size) (((size/256) << 16)|(num-1))
+#define ERASE_REGION(num, size) (((size/256) << 16) | (num-1))
 
 /* non-CFI compatible flashes */
 non_cfi_t non_cfi_flashes[] = {
index 2d6ba0a..c675b20 100644 (file)
@@ -72,7 +72,7 @@ void cmd_flash(uint32 cmd)
        /* verify written data */
        if (!result) result = flash_verify(adr, len, ((uint8 *)buffer) + ofs);
 
-       dcc_wr(OCL_CMD_DONE|result);
+       dcc_wr(OCL_CMD_DONE | result);
 }
 
 
@@ -84,14 +84,14 @@ int main (void)
                cmd = dcc_rd();
                switch (cmd&OCL_CMD_MASK) {
                        case OCL_PROBE:
-                               dcc_wr(OCL_CMD_DONE|flash_init());
+                               dcc_wr(OCL_CMD_DONE | flash_init());
                                dcc_wr(0x100000); /* base */
                                dcc_wr(flash_page_count*flash_page_size); /* size */
                                dcc_wr(1); /* num_sectors */
                                dcc_wr(4096 | ((unsigned long) flash_page_size << 16)); /* buflen and bufalign */
                                break;
                        case OCL_ERASE_ALL:
-                               dcc_wr(OCL_CMD_DONE|flash_erase_all());
+                               dcc_wr(OCL_CMD_DONE | flash_erase_all());
                                break;
                        case OCL_FLASH_BLOCK:
                                cmd_flash(cmd);
index caa3dad..6f7bf5f 100644 (file)
@@ -164,7 +164,7 @@ int flash_erase_plane(int efc_ofs)
        if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
 
        /* set no erase before programming */
-       outr(MC_FMR + efc_ofs, inr(MC_FMR + efc_ofs)|0x80);
+       outr(MC_FMR + efc_ofs, inr(MC_FMR + efc_ofs) | 0x80);
 
        return FLASH_STAT_OK;
 }
index 3ed2bf5..dab58a4 100644 (file)
@@ -162,7 +162,7 @@ static int pic32mx_nvm_exec(struct flash_bank_s *bank, uint32_t op, uint32_t tim
        target_t *target = bank->target;
        uint32_t status;
 
-       target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN|op);
+       target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
 
        /* unlock flash registers */
        target_write_u32(target, PIC32MX_NVMKEY, NVMKEY1);
@@ -841,7 +841,7 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank)
 
        /* chip erase flash memory */
        target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER);
-       target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER|FLASH_STRT);
+       target_write_u32(target, PIC32MX_FLASH_CR, FLASH_MER | FLASH_STRT);
 
        status = pic32mx_wait_status_busy(bank, 10);
 
index 9cf862a..d06aa9a 100644 (file)
@@ -346,7 +346,7 @@ static uint32_t stellaris_get_flash_status(flash_bank_t *bank)
        target_t *target = bank->target;
        uint32_t fmc;
 
-       target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
+       target_read_u32(target, FLASH_CONTROL_BASE | FLASH_FMC, &fmc);
 
        return fmc;
 }
@@ -360,9 +360,9 @@ static void stellaris_read_clock_info(flash_bank_t *bank)
        uint32_t rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
        unsigned long mainfreq;
 
-       target_read_u32(target, SCB_BASE|RCC, &rcc);
+       target_read_u32(target, SCB_BASE | RCC, &rcc);
        LOG_DEBUG("Stellaris RCC %" PRIx32 "", rcc);
-       target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
+       target_read_u32(target, SCB_BASE | PLLCFG, &pllcfg);
        LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
        stellaris_info->rcc = rcc;
 
@@ -412,7 +412,7 @@ static void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
 
        uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
        LOG_DEBUG("usecrl = %i",(int)(usecrl));
-       target_write_u32(target, SCB_BASE|USECRL, usecrl);
+       target_write_u32(target, SCB_BASE | USECRL, usecrl);
 }
 
 #if 0
@@ -439,7 +439,7 @@ static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_
        target_t *target = bank->target;
 
        fmc = FMC_WRKEY | cmd;
-       target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
+       target_write_u32(target, FLASH_CONTROL_BASE | FLASH_FMC, fmc);
        LOG_DEBUG("Flash command: 0x%x", fmc);
 
        if (stellaris_wait_status_busy(bank, cmd, 100))
@@ -460,10 +460,10 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
        int i;
 
        /* Read and parse chip identification register */
-       target_read_u32(target, SCB_BASE|DID0, &did0);
-       target_read_u32(target, SCB_BASE|DID1, &did1);
-       target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
-       target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
+       target_read_u32(target, SCB_BASE | DID0, &did0);
+       target_read_u32(target, SCB_BASE | DID1, &did1);
+       target_read_u32(target, SCB_BASE | DC0, &stellaris_info->dc0);
+       target_read_u32(target, SCB_BASE | DC1, &stellaris_info->dc1);
        LOG_DEBUG("did0 0x%" PRIx32 ", did1 0x%" PRIx32 ", dc0 0x%" PRIx32 ", dc1 0x%" PRIx32 "",
                  did0, did1, stellaris_info->dc0, stellaris_info->dc1);
 
@@ -503,7 +503,7 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
        stellaris_info->pagesize = 1024;
        bank->size = 1024 * stellaris_info->num_pages;
        stellaris_info->pages_in_lockregion = 2;
-       target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
+       target_read_u32(target, SCB_BASE | FMPPE, &stellaris_info->lockbits);
 
        /* provide this for the benefit of the higher flash driver layers */
        bank->num_sectors = stellaris_info->num_pages;
@@ -597,7 +597,7 @@ static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
 
        /* Clear and disable flash programming interrupts */
        target_write_u32(target, FLASH_CIM, 0);
-       target_write_u32(target, FLASH_MISC, PMISC|AMISC);
+       target_write_u32(target, FLASH_MISC, PMISC | AMISC);
 
        for (banknr = first; banknr <= last; banknr++)
        {
@@ -672,10 +672,10 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
 
        /* Clear and disable flash programming interrupts */
        target_write_u32(target, FLASH_CIM, 0);
-       target_write_u32(target, FLASH_MISC, PMISC|AMISC);
+       target_write_u32(target, FLASH_MISC, PMISC | AMISC);
 
        LOG_DEBUG("fmppe 0x%" PRIx32 "",fmppe);
-       target_write_u32(target, SCB_BASE|FMPPE, fmppe);
+       target_write_u32(target, SCB_BASE | FMPPE, fmppe);
        /* Commit FMPPE */
        target_write_u32(target, FLASH_FMA, 1);
        /* Write commit command */
@@ -698,7 +698,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
                return ERROR_FLASH_OPERATION_FAILED;
        }
 
-       target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
+       target_read_u32(target, SCB_BASE | FMPPE, &stellaris_info->lockbits);
 
        return ERROR_OK;
 }
@@ -869,7 +869,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
 
        /* Clear and disable flash programming interrupts */
        target_write_u32(target, FLASH_CIM, 0);
-       target_write_u32(target, FLASH_MISC, PMISC|AMISC);
+       target_write_u32(target, FLASH_MISC, PMISC | AMISC);
 
        /* multiple words to be programmed? */
        if (words_remaining > 0)
@@ -1014,7 +1014,7 @@ static int stellaris_mass_erase(struct flash_bank_s *bank)
 
        /* Clear and disable flash programming interrupts */
        target_write_u32(target, FLASH_CIM, 0);
-       target_write_u32(target, FLASH_MISC, PMISC|AMISC);
+       target_write_u32(target, FLASH_MISC, PMISC | AMISC);
 
        target_write_u32(target, FLASH_FMA, 0);
        target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
index 18fd3f2..bf07c70 100644 (file)
@@ -68,12 +68,12 @@ typedef struct stellaris_flash_bank_s
 #define USECRL         0x140
 
 #define FLASH_CONTROL_BASE     0x400FD000
-#define FLASH_FMA      (FLASH_CONTROL_BASE|0x000)
-#define FLASH_FMD      (FLASH_CONTROL_BASE|0x004)
-#define FLASH_FMC      (FLASH_CONTROL_BASE|0x008)
-#define FLASH_CRIS     (FLASH_CONTROL_BASE|0x00C)
-#define FLASH_CIM      (FLASH_CONTROL_BASE|0x010)
-#define FLASH_MISC     (FLASH_CONTROL_BASE|0x014)
+#define FLASH_FMA      (FLASH_CONTROL_BASE | 0x000)
+#define FLASH_FMD      (FLASH_CONTROL_BASE | 0x004)
+#define FLASH_FMC      (FLASH_CONTROL_BASE | 0x008)
+#define FLASH_CRIS     (FLASH_CONTROL_BASE | 0x00C)
+#define FLASH_CIM      (FLASH_CONTROL_BASE | 0x010)
+#define FLASH_MISC     (FLASH_CONTROL_BASE | 0x014)
 
 #define AMISC  1
 #define PMISC  2
index b48ff93..aab8b9a 100644 (file)
@@ -122,9 +122,9 @@ static uint32_t stm32x_wait_status_busy(flash_bank_t *bank, int timeout)
                alive_sleep(1);
        }
        /* Clear but report errors */
-       if (status & (FLASH_WRPRTERR|FLASH_PGERR))
+       if (status & (FLASH_WRPRTERR | FLASH_PGERR))
        {
-               target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR|FLASH_PGERR);
+               target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
        }
        return status;
 }
@@ -140,7 +140,7 @@ static int stm32x_read_options(struct flash_bank_s *bank)
        /* read current option bytes */
        target_read_u32(target, STM32_FLASH_OBR, &optiondata);
 
-       stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8|((optiondata >> 2) & 0x07);
+       stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8 | ((optiondata >> 2) & 0x07);
        stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
 
        if (optiondata & (1 << OPT_READOUT))
@@ -177,8 +177,8 @@ static int stm32x_erase_options(struct flash_bank_s *bank)
        target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
 
        /* erase option bytes */
-       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_OPTWRE);
-       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_STRT|FLASH_OPTWRE);
+       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
+       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
 
        status = stm32x_wait_status_busy(bank, 10);
 
@@ -211,7 +211,7 @@ static int stm32x_write_options(struct flash_bank_s *bank)
        target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2);
 
        /* program option bytes */
-       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE);
+       target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
 
        /* write user option byte */
        target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options);
@@ -374,7 +374,7 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
        {
                target_write_u32(target, STM32_FLASH_CR, FLASH_PER);
                target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset);
-               target_write_u32(target, STM32_FLASH_CR, FLASH_PER|FLASH_STRT);
+               target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT);
 
                status = stm32x_wait_status_busy(bank, 10);
 
@@ -1098,7 +1098,7 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx
 
        if (argc < 4)
        {
-               command_print(cmd_ctx, "stm32x options_write <bank> <SWWDG|HWWDG> <RSTSTNDBY|NORSTSTNDBY> <RSTSTOP|NORSTSTOP>");
+               command_print(cmd_ctx, "stm32x options_write <bank> <SWWDG | HWWDG> <RSTSTNDBY | NORSTSTNDBY> <RSTSTOP | NORSTSTOP>");
                return ERROR_OK;
        }
 
@@ -1182,7 +1182,7 @@ static int stm32x_mass_erase(struct flash_bank_s *bank)
 
        /* mass erase flash memory */
        target_write_u32(target, STM32_FLASH_CR, FLASH_MER);
-       target_write_u32(target, STM32_FLASH_CR, FLASH_MER|FLASH_STRT);
+       target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT);
 
        status = stm32x_wait_status_busy(bank, 10);
 
index b6fef22..5cf8cdc 100644 (file)
@@ -160,7 +160,7 @@ static int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd
        bank->driver_priv = str7x_info;
        
        /* set default bits for str71x flash */
-       str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA1|FLASH_BSYA0);
+       str7x_info->busy_bits = (FLASH_LOCK | FLASH_BSYA1 | FLASH_BSYA0);
        str7x_info->disable_bit = (1 << 1);
        
        if (strcmp(args[6], "STR71x") == 0)
@@ -170,7 +170,7 @@ static int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd
        else if (strcmp(args[6], "STR73x") == 0)
        {
                str7x_info->register_base = 0x80100000;
-               str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA0);
+               str7x_info->busy_bits = (FLASH_LOCK | FLASH_BSYA0);
        }
        else if (strcmp(args[6], "STR75x") == 0)
        {
@@ -270,7 +270,7 @@ static int str7x_erase(struct flash_bank_s *bank, int first, int last)
        cmd = sectors;
        target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
        
-       cmd = FLASH_SER|FLASH_WMS;
+       cmd = FLASH_SER | FLASH_WMS;
        target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
        
        while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
@@ -326,7 +326,7 @@ static int str7x_protect(struct flash_bank_s *bank, int set, int first, int last
        cmd = protect_blocks;
        target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd);
        
-       cmd = FLASH_SPR|FLASH_WMS;
+       cmd = FLASH_SPR | FLASH_WMS;
        target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
        
        while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
index fc1bfbc..14dfebc 100644 (file)
@@ -1002,7 +1002,7 @@ static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *
 
        if (argc < 2)
        {
-               command_print(cmd_ctx, "str9xpec options_cmap <bank> <bank0|bank1>");
+               command_print(cmd_ctx, "str9xpec options_cmap <bank> <bank0 | bank1>");
                return ERROR_OK;
        }
 
@@ -1034,7 +1034,7 @@ static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s
 
        if (argc < 2)
        {
-               command_print(cmd_ctx, "str9xpec options_lvdthd <bank> <2.4v|2.7v>");
+               command_print(cmd_ctx, "str9xpec options_lvdthd <bank> <2.4v | 2.7v>");
                return ERROR_OK;
        }
 
@@ -1066,7 +1066,7 @@ int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_c
 
        if (argc < 2)
        {
-               command_print(cmd_ctx, "str9xpec options_lvdsel <bank> <vdd|vdd_vddq>");
+               command_print(cmd_ctx, "str9xpec options_lvdsel <bank> <vdd | vdd_vddq>");
                return ERROR_OK;
        }
 
@@ -1098,7 +1098,7 @@ static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_
 
        if (argc < 2)
        {
-               command_print(cmd_ctx, "str9xpec options_lvdwarn <bank> <vdd|vdd_vddq>");
+               command_print(cmd_ctx, "str9xpec options_lvdwarn <bank> <vdd | vdd_vddq>");
                return ERROR_OK;
        }
 
index 26fcadd..bad82c4 100644 (file)
@@ -411,7 +411,7 @@ static int tms470_handle_plldis_command(struct command_context_s *cmd_ctx, char
 {
        if (argc > 1)
        {
-               command_print(cmd_ctx, "tms470 plldis <0|1>");
+               command_print(cmd_ctx, "tms470 plldis <0 | 1>");
                return ERROR_INVALID_ARGUMENTS;
        }
        else if (argc == 1)
index 9421b4c..a0a6a45 100644 (file)
@@ -55,7 +55,7 @@ static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, un
 {
        if ((num == 32) && (first == 0))
        {
-               return (((uint32_t)buffer[3]) << 24)|(((uint32_t)buffer[2]) << 16)|(((uint32_t)buffer[1]) << 8)|(((uint32_t)buffer[0]) << 0);
+               return (((uint32_t)buffer[3]) << 24) | (((uint32_t)buffer[2]) << 16) | (((uint32_t)buffer[1]) << 8) | (((uint32_t)buffer[0]) << 0);
        } else
        {
                uint32_t result = 0;
index b49f547..bfb4cf8 100644 (file)
@@ -825,7 +825,7 @@ void process_jim_events(void)
        if (!recursion)
        {
                recursion++;
-               Jim_ProcessEvents (interp, JIM_ALL_EVENTS|JIM_DONT_WAIT);
+               Jim_ProcessEvents (interp, JIM_ALL_EVENTS | JIM_DONT_WAIT);
                recursion--;
        }
 #endif
index 9d15ddd..5c6283b 100644 (file)
@@ -64,7 +64,7 @@
 /* File event structure */
 typedef struct Jim_FileEvent {
     void *handle;
-    int mask; /* one of JIM_EVENT_(READABLE|WRITABLE|EXCEPTION) */
+    int mask; /* one of JIM_EVENT_(READABLE | WRITABLE | EXCEPTION) */
     Jim_FileProc *fileProc;
     Jim_EventFinalizerProc *finalizerProc;
     void *clientData;
@@ -237,7 +237,7 @@ static Jim_TimeEvent *JimSearchNearestTimer(Jim_EventLoop *eventLoop)
 /* --- POSIX version of Jim_ProcessEvents, for now the only available --- */
 #define JIM_FILE_EVENTS 1
 #define JIM_TIME_EVENTS 2
-#define JIM_ALL_EVENTS (JIM_FILE_EVENTS|JIM_TIME_EVENTS)
+#define JIM_ALL_EVENTS (JIM_FILE_EVENTS | JIM_TIME_EVENTS)
 #define JIM_DONT_WAIT 4
 
 /* Process every pending time event, then every pending file event
index b927bc5..cabb88f 100644 (file)
@@ -71,7 +71,7 @@ JIM_STATIC int Jim_EventLoopOnLoad(Jim_Interp *interp);
 /* --- POSIX version of Jim_ProcessEvents, for now the only available --- */
 #define JIM_FILE_EVENTS 1
 #define JIM_TIME_EVENTS 2
-#define JIM_ALL_EVENTS (JIM_FILE_EVENTS|JIM_TIME_EVENTS)
+#define JIM_ALL_EVENTS (JIM_FILE_EVENTS | JIM_TIME_EVENTS)
 #define JIM_DONT_WAIT 4
 
 JIM_STATIC void JIM_API(Jim_CreateFileHandler) (Jim_Interp *interp,
index 1dbe495..bd077d2 100644 (file)
@@ -6963,7 +6963,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
             case JIM_EXPROP_NUMNE: wC = wA != wB; break;
             case JIM_EXPROP_BITAND: wC = wA&wB; break;
             case JIM_EXPROP_BITXOR: wC = wA^wB; break;
-            case JIM_EXPROP_BITOR: wC = wA|wB; break;
+            case JIM_EXPROP_BITOR: wC = wA | wB; break;
             case JIM_EXPROP_POW: wC = JimPowWide(wA,wB); break;
             case JIM_EXPROP_LOGICAND_LEFT:
                 if (wA == 0) {
@@ -6996,7 +6996,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
                 wC = _rotl(uA,(unsigned long)wB);
 #else
                 const unsigned int S = sizeof(unsigned long) * 8;
-                wC = (unsigned long)((uA << wB)|(uA >> (S-wB)));
+                wC = (unsigned long)((uA << wB) | (uA >> (S-wB)));
 #endif
                 break;
             }
@@ -7006,7 +7006,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
                 wC = _rotr(uA,(unsigned long)wB);
 #else
                 const unsigned int S = sizeof(unsigned long) * 8;
-                wC = (unsigned long)((uA >> wB)|(uA << (S-wB)));
+                wC = (unsigned long)((uA >> wB) | (uA << (S-wB)));
 #endif
                 break;
             }
index 1ba5117..a5ae150 100644 (file)
@@ -1114,7 +1114,7 @@ JIM_STATIC int JIM_API( Jim_GetOpt_Nvp)( Jim_GetOptInfo *goi, const Jim_Nvp *loo
  *
  *     switch ( n->value ){
  *     case OPT_SEX:
- *          // handle:  --sex male|female|lots|needmore
+ *          // handle:  --sex male | female | lots | needmore
  *          e = Jim_GetOpt_Nvp( &goi, &nvp_sex, &n );
  *          if ( e != JIM_OK ){
  *               Jim_GetOpt_NvpUnknown( &ogi, nvp_sex, 1 );
index 42787db..56187e2 100644 (file)
@@ -299,7 +299,7 @@ static int jlink_register_commands(struct command_context_s *cmd_ctx)
                "query jlink info");
        register_command(cmd_ctx, NULL, "jlink_hw_jtag",
                &jlink_handle_jlink_hw_jtag_command, COMMAND_EXEC,
-               "set/get jlink hw jtag command version [2|3]");
+               "set/get jlink hw jtag command version [2 | 3]");
        return ERROR_OK;
 }
 
index 5e329d4..ab393e5 100644 (file)
@@ -469,7 +469,7 @@ static int parport_handle_write_on_exit_command(struct command_context_s *cmd_ct
 {
        if (argc != 1)
        {
-               command_print(cmd_ctx, "usage: parport_write_on_exit <on|off>");
+               command_print(cmd_ctx, "usage: parport_write_on_exit <on | off>");
                return ERROR_OK;
        }
 
index d3bd72d..593330b 100644 (file)
@@ -699,11 +699,11 @@ int jtag_register_commands(struct command_context_s *cmd_ctx)
        register_jim(cmd_ctx, "pathmove", Jim_Command_pathmove, "move JTAG to state1 then to state2, state3, etc. <state1>,<state2>,<stat3>...");
 
        register_command(cmd_ctx, NULL, "verify_ircapture", handle_verify_ircapture_command,
-               COMMAND_ANY, "verify value captured during Capture-IR <enable|disable>");
+               COMMAND_ANY, "verify value captured during Capture-IR <enable | disable>");
        register_command(cmd_ctx, NULL, "verify_jtag", handle_verify_jtag_command,
-               COMMAND_ANY, "verify value capture <enable|disable>");
+               COMMAND_ANY, "verify value capture <enable | disable>");
        register_command(cmd_ctx, NULL, "tms_sequence", handle_tms_sequence_command,
-               COMMAND_ANY, "choose short(default) or long tms_sequence <short|long>");
+               COMMAND_ANY, "choose short(default) or long tms_sequence <short | long>");
        return ERROR_OK;
 }
 
index 66debe3..3fd471b 100644 (file)
@@ -74,7 +74,7 @@ static void setCurrentState(enum tap_state state)
        }
        waitQueue();
        sampleShiftRegister();
-       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8)|(a << 4)|a);
+       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8) | (a << 4) | a);
 
 }
 
@@ -106,7 +106,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
                        }
                        /* shift out value */
                        waitIdle();
-                       ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, (((value >> i)&1) << 1)|tms);
+                       ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, (((value >> i)&1) << 1) | tms);
                }
                waitIdle();
                ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
@@ -116,11 +116,11 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
                setCurrentState(endState);
        } else
        {
-               ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8)|(a << 4)|b);
+               ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8) | (a << 4) | b);
        }
 #else
        /* fast version */
-       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8)|(a << 4)|b);
+       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8) | (a << 4) | b);
 #endif
 #else
        /* maximum debug version */
@@ -132,15 +132,15 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta
                {
                        sampleShiftRegister();
                        ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value >> i);
-                       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 8)|(a << 4)|a);
+                       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 8) | (a << 4) | a);
                }
                sampleShiftRegister();
                ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value >> (repeat-1));
-               ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 8)|(a << 4)|b);
+               ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 8) | (a << 4) | b);
        } else
        {
                sampleShiftRegister();
-               ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8)|(a << 4)|b);
+               ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (repeat << 8) | (a << 4) | b);
        }
        sampleShiftRegister();
 #endif
index 1762037..73efcd2 100644 (file)
@@ -405,7 +405,7 @@ static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endSt
        a = state;
        b = endState;
        ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
-       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15)|(repeat << 8)|(a << 4)|b);
+       ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
        VERBOSE(getShiftValueFlip());
 }
 #endif
@@ -741,7 +741,7 @@ void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, uint8_t *buffer, int l
                        for (i = 0; i < count; i++)
                        {
                                shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 1));
-                               shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr|(1 << 5));
+                               shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
                                buffer += 4;
                        }
                } else
@@ -750,7 +750,7 @@ void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, uint8_t *buffer, int l
                        for (i = 0; i < count; i++)
                        {
                                shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 0));
-                               shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr|(1 << 5));
+                               shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
                                buffer += 4;
                        }
                }
index e8023c8..1b08d47 100644 (file)
@@ -1951,7 +1951,7 @@ void arm7_9_enable_eice_step(target_t *target, uint32_t next_pc)
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], 0xffffffff);
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0xffffffff);
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE);
-               embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~(EICE_W_CTRL_RANGE|EICE_W_CTRL_nOPC) & 0xff);
+               embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~(EICE_W_CTRL_RANGE | EICE_W_CTRL_nOPC) & 0xff);
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_VALUE], current_pc);
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_MASK], 0);
                embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_MASK], 0xffffffff);
@@ -2842,17 +2842,17 @@ int arm7_9_register_commands(struct command_context_s *cmd_ctx)
 
        arm7_9_cmd = register_command(cmd_ctx, NULL, "arm7_9", NULL, COMMAND_ANY, "arm7/9 specific commands");
 
-       register_command(cmd_ctx, arm7_9_cmd, "write_xpsr", handle_arm7_9_write_xpsr_command, COMMAND_EXEC, "write program status register <value> <not cpsr|spsr>");
-       register_command(cmd_ctx, arm7_9_cmd, "write_xpsr_im8", handle_arm7_9_write_xpsr_im8_command, COMMAND_EXEC, "write program status register <8bit immediate> <rotate> <not cpsr|spsr>");
+       register_command(cmd_ctx, arm7_9_cmd, "write_xpsr", handle_arm7_9_write_xpsr_command, COMMAND_EXEC, "write program status register <value> <not cpsr | spsr>");
+       register_command(cmd_ctx, arm7_9_cmd, "write_xpsr_im8", handle_arm7_9_write_xpsr_im8_command, COMMAND_EXEC, "write program status register <8bit immediate> <rotate> <not cpsr | spsr>");
 
        register_command(cmd_ctx, arm7_9_cmd, "write_core_reg", handle_arm7_9_write_core_reg_command, COMMAND_EXEC, "write core register <num> <mode> <value>");
 
        register_command(cmd_ctx, arm7_9_cmd, "dbgrq", handle_arm7_9_dbgrq_command,
-               COMMAND_ANY, "use EmbeddedICE dbgrq instead of breakpoint for target halt requests <enable|disable>");
+               COMMAND_ANY, "use EmbeddedICE dbgrq instead of breakpoint for target halt requests <enable | disable>");
        register_command(cmd_ctx, arm7_9_cmd, "fast_memory_access", handle_arm7_9_fast_memory_access_command,
-                COMMAND_ANY, "use fast memory accesses instead of slower but potentially safer accesses <enable|disable>");
+                COMMAND_ANY, "use fast memory accesses instead of slower but potentially safer accesses <enable | disable>");
        register_command(cmd_ctx, arm7_9_cmd, "dcc_downloads", handle_arm7_9_dcc_downloads_command,
-               COMMAND_ANY, "use DCC downloads for larger memory writes <enable|disable>");
+               COMMAND_ANY, "use DCC downloads for larger memory writes <enable | disable>");
 
        armv4_5_register_commands(cmd_ctx);
 
@@ -2884,7 +2884,7 @@ int handle_arm7_9_write_xpsr_command(struct command_context_s *cmd_ctx, char *cm
 
        if (argc < 2)
        {
-               command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr|spsr>");
+               command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>");
                return ERROR_OK;
        }
 
@@ -2929,7 +2929,7 @@ int handle_arm7_9_write_xpsr_im8_command(struct command_context_s *cmd_ctx, char
 
        if (argc < 3)
        {
-               command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr|spsr>");
+               command_print(cmd_ctx, "usage: write_xpsr_im8 <im8> <rotate> <not cpsr | spsr>");
                return ERROR_OK;
        }
 
@@ -3005,7 +3005,7 @@ int handle_arm7_9_dbgrq_command(struct command_context_s *cmd_ctx, char *cmd, ch
                }
                else
                {
-                       command_print(cmd_ctx, "usage: arm7_9 dbgrq <enable|disable>");
+                       command_print(cmd_ctx, "usage: arm7_9 dbgrq <enable | disable>");
                }
        }
 
@@ -3038,7 +3038,7 @@ int handle_arm7_9_fast_memory_access_command(struct command_context_s *cmd_ctx,
                }
                else
                {
-                       command_print(cmd_ctx, "usage: arm7_9 fast_memory_access <enable|disable>");
+                       command_print(cmd_ctx, "usage: arm7_9 fast_memory_access <enable | disable>");
                }
        }
 
@@ -3071,7 +3071,7 @@ int handle_arm7_9_dcc_downloads_command(struct command_context_s *cmd_ctx, char
                }
                else
                {
-                       command_print(cmd_ctx, "usage: arm7_9 dcc_downloads <enable|disable>");
+                       command_print(cmd_ctx, "usage: arm7_9 dcc_downloads <enable | disable>");
                }
        }
 
index 126d955..a77daa7 100644 (file)
@@ -1068,11 +1068,11 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                        command_print(cmd_ctx, "\tROM table in legacy format" );
                }
                /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec  */
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFF0, &cid0);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFF4, &cid1);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFF8, &cid2);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFFC, &cid3);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000)|0xFCC, &memtype);
+               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF0, &cid0);
+               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF4, &cid1);
+               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF8, &cid2);
+               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFFC, &cid3);
+               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFCC, &memtype);
                swjdp_transaction_endcheck(swjdp);
                command_print(cmd_ctx, "\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 " CID0, 0x%" PRIx32,cid3,cid2,cid1,cid0);
                if (memtype&0x01)
@@ -1084,25 +1084,25 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                        command_print(cmd_ctx, "\tMEMTYPE system memory not present. Dedicated debug bus" );
                }
 
-               /* Now we read ROM table entries from dbgbase&0xFFFFF000)|0x000 until we get 0x00000000 */
+               /* Now we read ROM table entries from dbgbase&0xFFFFF000) | 0x000 until we get 0x00000000 */
                entry_offset = 0;
                do
                {
-                       mem_ap_read_atomic_u32(swjdp, (dbgbase&0xFFFFF000)|entry_offset, &romentry);
+                       mem_ap_read_atomic_u32(swjdp, (dbgbase&0xFFFFF000) | entry_offset, &romentry);
                        command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "",entry_offset,romentry);
                        if (romentry&0x01)
                        {
                                uint32_t c_cid0,c_cid1,c_cid2,c_cid3,c_pid0,c_pid1,c_pid2,c_pid3,c_pid4,component_start;
                                uint32_t component_base = (uint32_t)((dbgbase&0xFFFFF000) + (int)(romentry&0xFFFFF000));
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFE0, &c_pid0);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFE4, &c_pid1);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFE8, &c_pid2);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFEC, &c_pid3);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFD0, &c_pid4);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF0, &c_cid0);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF4, &c_cid1);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF8, &c_cid2);
-                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFFC, &c_cid3);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFE0, &c_pid0);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFE4, &c_pid1);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFE8, &c_pid2);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFEC, &c_pid3);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFD0, &c_pid4);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFF0, &c_cid0);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFF4, &c_cid1);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFF8, &c_cid2);
+                               mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000) | 0xFFC, &c_cid3);
                                component_start = component_base - 0x1000*(c_pid4 >> 4);
                                command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", pid4 0x%" PRIx32 ", start address 0x%" PRIx32 "",component_base,c_pid4,component_start);
                                command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1 >> 4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
index 33f1a51..77ca2e2 100644 (file)
@@ -456,7 +456,7 @@ int armv4_5_register_commands(struct command_context_s *cmd_ctx)
        armv4_5_cmd = register_command(cmd_ctx, NULL, "armv4_5", NULL, COMMAND_ANY, "armv4/5 specific commands");
 
        register_command(cmd_ctx, armv4_5_cmd, "reg", handle_armv4_5_reg_command, COMMAND_EXEC, "display ARM core registers");
-       register_command(cmd_ctx, armv4_5_cmd, "core_state", handle_armv4_5_core_state_command, COMMAND_EXEC, "display/change ARM core state <arm|thumb>");
+       register_command(cmd_ctx, armv4_5_cmd, "core_state", handle_armv4_5_core_state_command, COMMAND_EXEC, "display/change ARM core state <arm | thumb>");
 
        register_command(cmd_ctx, armv4_5_cmd, "disassemble", handle_armv4_5_disassemble_command, COMMAND_EXEC, "disassemble instructions <address> <count> ['thumb']");
        return ERROR_OK;
index c1ebae3..9f4ef52 100644 (file)
@@ -1112,8 +1112,8 @@ int cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
                comparator_list[dwt_num].mask = mask;
                comparator_list[dwt_num].function = watchpoint->rw + 5;
                target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address, comparator_list[dwt_num].comp);
-               target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x4, comparator_list[dwt_num].mask);
-               target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x8, comparator_list[dwt_num].function);
+               target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address | 0x4, comparator_list[dwt_num].mask);
+               target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address | 0x8, comparator_list[dwt_num].function);
                LOG_DEBUG("dwt_num %i 0x%" PRIx32 " 0x%" PRIx32 " 0x%" PRIx32 "", dwt_num, comparator_list[dwt_num].comp, comparator_list[dwt_num].mask, comparator_list[dwt_num].function);
        }
        else
@@ -1149,7 +1149,7 @@ int cortex_m3_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint
        }
        comparator_list[dwt_num].used = 0;
        comparator_list[dwt_num].function = 0;
-       target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x8, comparator_list[dwt_num].function);
+       target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address | 0x8, comparator_list[dwt_num].function);
 
        watchpoint->set = 0;
 
@@ -1648,7 +1648,7 @@ int handle_cortex_m3_mask_interrupts_command(struct command_context_s *cmd_ctx,
        {
                if (!strcmp(args[0], "on"))
                {
-                       cortex_m3_write_debug_halt_mask(target, C_HALT|C_MASKINTS, 0);
+                       cortex_m3_write_debug_halt_mask(target, C_HALT | C_MASKINTS, 0);
                }
                else if (!strcmp(args[0], "off"))
                {
index 44ae930..48d2eba 100644 (file)
@@ -1107,7 +1107,7 @@ static int handle_etm_tracemode_command(struct command_context_s *cmd_ctx, char
        }
        else if (argc != 0)
        {
-               command_print(cmd_ctx, "usage: configure trace mode <none|data|address|all> <context id bits> <cycle accurate> <branch output>");
+               command_print(cmd_ctx, "usage: configure trace mode <none | data | address | all> <context id bits> <cycle accurate> <branch output>");
                return ERROR_OK;
        }
 
@@ -1826,7 +1826,7 @@ int etm_register_commands(struct command_context_s *cmd_ctx)
 int etm_register_user_commands(struct command_context_s *cmd_ctx)
 {
        register_command(cmd_ctx, etm_cmd, "tracemode", handle_etm_tracemode_command,
-               COMMAND_EXEC, "configure trace mode <none|data|address|all> "
+               COMMAND_EXEC, "configure trace mode <none | data | address | all> "
                        "<context_id_bits> <cycle_accurate> <branch_output>");
 
        register_command(cmd_ctx, etm_cmd, "info", handle_etm_info_command,
index ab47f73..33f0c83 100644 (file)
@@ -94,8 +94,8 @@ typedef struct mips32_core_reg_s
 #define MIPS32_COP0_MF 0x00
 #define MIPS32_COP0_MT 0x04
 
-#define MIPS32_R_INST(opcode, rs, rt, rd, shamt, funct)        (((opcode) << 26) |((rs) << 21)|((rt) << 16)|((rd) << 11)| ((shamt) << 6) | (funct))
-#define MIPS32_I_INST(opcode, rs, rt, immd)    (((opcode) << 26) |((rs) << 21)|((rt) << 16)|(immd))
+#define MIPS32_R_INST(opcode, rs, rt, rd, shamt, funct)        (((opcode) << 26) |((rs) << 21) | ((rt) << 16) | ((rd) << 11)| ((shamt) << 6) | (funct))
+#define MIPS32_I_INST(opcode, rs, rt, immd)    (((opcode) << 26) |((rs) << 21) | ((rt) << 16) | (immd))
 #define MIPS32_J_INST(opcode, addr)    (((opcode) << 26) |(addr))
 
 #define MIPS32_NOP                                     0
index ca21f7f..5433316 100644 (file)
@@ -1483,7 +1483,7 @@ int target_register_user_commands(struct command_context_s *cmd_ctx)
        register_command(cmd_ctx,  NULL, "halt", handle_halt_command, COMMAND_EXEC, "halt target");
        register_command(cmd_ctx,  NULL, "resume", handle_resume_command, COMMAND_EXEC, "resume target [addr]");
        register_command(cmd_ctx,  NULL, "step", handle_step_command, COMMAND_EXEC, "step one instruction from current PC or [addr]");
-       register_command(cmd_ctx,  NULL, "reset", handle_reset_command, COMMAND_EXEC, "reset target [run|halt|init] - default is run");
+       register_command(cmd_ctx,  NULL, "reset", handle_reset_command, COMMAND_EXEC, "reset target [run | halt | init] - default is run");
        register_command(cmd_ctx,  NULL, "soft_reset_halt", handle_soft_reset_halt_command, COMMAND_EXEC, "halt the target and do a soft reset");
 
        register_command(cmd_ctx,  NULL, "mdw", handle_md_command, COMMAND_EXEC, "display memory words <addr> [count]");
@@ -3987,7 +3987,7 @@ static int tcl_target_func( Jim_Interp *interp, int argc, Jim_Obj *const *argv )
                break;
        case TS_CMD_RESET:
                if ( goi.argc != 2 ){
-                       Jim_WrongNumArgs( interp, 2, argv, "t|f|assert|deassert BOOL");
+                       Jim_WrongNumArgs( interp, 2, argv, "t | f|assert | deassert BOOL");
                        return JIM_ERR;
                }
                e = Jim_GetOpt_Nvp( &goi, nvp_assert, &n );
index 8c20653..e87f552 100644 (file)
@@ -3693,7 +3693,7 @@ int xscale_register_commands(struct command_context_s *cmd_ctx)
 
        register_command(cmd_ctx, xscale_cmd, "vector_catch", xscale_handle_vector_catch_command, COMMAND_EXEC, "<mask> of vectors that should be catched");
 
-       register_command(cmd_ctx, xscale_cmd, "trace_buffer", xscale_handle_trace_buffer_command, COMMAND_EXEC, "<enable|disable> ['fill' [n]|'wrap']");
+       register_command(cmd_ctx, xscale_cmd, "trace_buffer", xscale_handle_trace_buffer_command, COMMAND_EXEC, "<enable | disable> ['fill' [n]|'wrap']");
 
        register_command(cmd_ctx, xscale_cmd, "dump_trace", xscale_handle_dump_trace_command, COMMAND_EXEC, "dump content of trace buffer to <file>");
        register_command(cmd_ctx, xscale_cmd, "analyze_trace", xscale_handle_analyze_trace_buffer_command, COMMAND_EXEC, "analyze content of trace buffer");