- https://lists.berlios.de/pipermail/openocd-development/2008-April/002022.html for details
git-svn-id: svn://svn.berlios.de/openocd/trunk@624
b42882b7-edfa-0310-969c-
e2dbd0fdcd60
ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
}
ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
}
- if (jtag_reset_config & RESET_SRST_PULLS_TRST)
+ /* following hack is to handle luminary reset
+ * when srst is asserted the luminary device seesm to also clear the debug registers
+ * which does not match the armv7 debug TRM */
+
+ if (strcmp(cortex_m3->variant, "luminary") == 0)
+ /* this causes the luminary device to reset using the watchdog */
+ ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ );
+ LOG_DEBUG("Using Luminary Reset: SYSRESETREQ");
+ if (jtag_reset_config & RESET_SRST_PULLS_TRST)
+ {
+ jtag_add_reset(1, 1);
+ }
+ else
+ {
+ jtag_add_reset(0, 1);
+ }
}
target->state = TARGET_RESET;
}
target->state = TARGET_RESET;
armv7m->pre_restore_context = NULL;
armv7m->post_restore_context = NULL;
armv7m->pre_restore_context = NULL;
armv7m->post_restore_context = NULL;
+ if (variant)
+ {
+ cortex_m3->variant = strdup(variant);
+ }
+ else
+ {
+ cortex_m3->variant = strdup("");
+ }
+
armv7m_init_arch_info(target, armv7m);
armv7m->arch_info = cortex_m3;
armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
armv7m_init_arch_info(target, armv7m);
armv7m->arch_info = cortex_m3;
armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;
typedef struct cortex_m3_common_s
{
int common_magic;
typedef struct cortex_m3_common_s
{
int common_magic;
/* Context information */
u32 dcb_dhcsr;
/* Context information */
u32 dcb_dhcsr;
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
-target cortex_m3 little run_and_halt 0
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+target cortex_m3 little reset_halt 0 luminary
# 4k working area at base of ram
working_area 0 0x20000000 0x4000 nobackup
# 4k working area at base of ram
working_area 0 0x20000000 0x4000 nobackup
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
-target cortex_m3 little run_and_halt 0
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+target cortex_m3 little reset_halt 0 luminary
# 2k working area at base of ram
working_area 0 0x20000000 0x2000 nobackup
# 2k working area at base of ram
working_area 0 0x20000000 0x2000 nobackup
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