swd: Fix park bit polarity according to ADIv5.1 Supplement 31/2131/4
authorAndreas Fritiofson <andreas.fritiofson@gmail.com>
Fri, 9 May 2014 20:49:21 +0000 (22:49 +0200)
committerAndreas Fritiofson <andreas.fritiofson@gmail.com>
Sat, 28 Jun 2014 09:31:55 +0000 (09:31 +0000)
Change-Id: I27293defd3f3c3bf37c9662f88689e85ba593d86
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2131
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
src/jtag/swd.h

index 5d00ab3..2e676b5 100644 (file)
@@ -31,7 +31,7 @@
 #define SWD_CMD_A32    (3 << 3)                /* bits A[3:2] of register addr */
 #define SWD_CMD_PARITY (1 << 5)        /* parity of APnDP|RnW|A32 */
 #define SWD_CMD_STOP   (0 << 6)        /* always clear for synch SWD */
-#define SWD_CMD_PARK   (0 << 7)        /* not driven by host (pull high) */
+#define SWD_CMD_PARK   (1 << 7)        /* driven high by host */
 /* followed by TRN, 3-bits of ACK, TRN */
 
 /**