xscale: stackframe corruption bugfix
authorDavid Brownell <dbrownell@users.sourceforge.net>
Tue, 13 Oct 2009 08:21:24 +0000 (01:21 -0700)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Tue, 13 Oct 2009 08:21:24 +0000 (01:21 -0700)
Resolve a "FIX" comment; yes that was superfluous given that the
JTAG core does that check by default.  It was also buggy since it
wrote to a stack frame that went away before the write happened!!

Other fixes:  remove pointless malloc(); zero-init scan_field_t
values wherever they appear; whitespace scrub; spelling fix.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/xscale.c

index 82a2c571e843930403832c44eb16a5a5fa0d79a2..dd16b35e52d275d1e31eea890db375f1b86bb11b 100644 (file)
@@ -42,7 +42,7 @@
  *  Intel XScale® Core Developer’s Manual, January 2004
  *             Order Number: 273473-002
  *     This has a chapter detailing debug facilities, and punts some
- *     details to chip-specific microarchitecture documentats.
+ *     details to chip-specific microarchitecture documents.
  *
  *  Hot-Debug for Intel XScale® Core Debug White Paper, May 2005
  *             Document Number: 273539-005
@@ -166,21 +166,15 @@ static int xscale_jtag_set_instr(jtag_tap_t *tap, uint32_t new_instr)
        if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
        {
                scan_field_t field;
+               uint8_t scratch[4];
 
+               memset(&field, 0, sizeof field);
                field.tap = tap;
                field.num_bits = tap->ir_length;
-               field.out_value = calloc(CEIL(field.num_bits, 8), 1);
+               field.out_value = scratch;
                buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
 
-               uint8_t tmp[4];
-               field.in_value = tmp;
-
                jtag_add_ir_scan(1, &field, jtag_get_end_state());
-
-               /* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */
-               jtag_check_value_mask(&field, tap->expected, tap->expected_mask);
-
-               free(field.out_value);
        }
 
        return ERROR_OK;
@@ -190,9 +184,7 @@ static int xscale_read_dcsr(target_t *target)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
-
        int retval;
-
        scan_field_t fields[3];
        uint8_t field0 = 0x0;
        uint8_t field0_check_value = 0x2;
@@ -207,6 +199,8 @@ static int xscale_read_dcsr(target_t *target)
        buf_set_u32(&field0, 1, 1, xscale->hold_rst);
        buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 3;
        fields[0].out_value = &field0;
@@ -215,7 +209,6 @@ static int xscale_read_dcsr(target_t *target)
 
        fields[1].tap = target->tap;
        fields[1].num_bits = 32;
-       fields[1].out_value = NULL;
        fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
 
        fields[2].tap = target->tap;
@@ -277,30 +270,24 @@ static int xscale_receive(target_t *target, uint32_t *buffer, int num_words)
        uint8_t field2_check_mask = 0x1;
        int words_done = 0;
        int words_scheduled = 0;
-
        int i;
 
        path[0] = TAP_DRSELECT;
        path[1] = TAP_DRCAPTURE;
        path[2] = TAP_DRSHIFT;
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 3;
-       fields[0].out_value = NULL;
-       fields[0].in_value = NULL;
        fields[0].check_value = &field0_check_value;
        fields[0].check_mask = &field0_check_mask;
 
        fields[1].tap = target->tap;
        fields[1].num_bits = 32;
-       fields[1].out_value = NULL;
-       fields[1].check_value = NULL;
-       fields[1].check_mask = NULL;
 
        fields[2].tap = target->tap;
        fields[2].num_bits = 1;
-       fields[2].out_value = NULL;
-       fields[2].in_value = NULL;
        fields[2].check_value = &field2_check_value;
        fields[2].check_mask = &field2_check_mask;
 
@@ -377,10 +364,8 @@ static int xscale_read_tx(target_t *target, int consume)
        xscale_common_t *xscale = armv4_5->arch_info;
        tap_state_t path[3];
        tap_state_t noconsume_path[6];
-
        int retval;
        struct timeval timeout, now;
-
        scan_field_t fields[3];
        uint8_t field0_in = 0x0;
        uint8_t field0_check_value = 0x2;
@@ -403,19 +388,18 @@ static int xscale_read_tx(target_t *target, int consume)
        noconsume_path[4] = TAP_DREXIT2;
        noconsume_path[5] = TAP_DRSHIFT;
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 3;
-       fields[0].out_value = NULL;
        fields[0].in_value = &field0_in;
 
        fields[1].tap = target->tap;
        fields[1].num_bits = 32;
-       fields[1].out_value = NULL;
        fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_TX].value;
 
        fields[2].tap = target->tap;
        fields[2].num_bits = 1;
-       fields[2].out_value = NULL;
        uint8_t tmp;
        fields[2].in_value = &tmp;
 
@@ -477,10 +461,8 @@ static int xscale_write_rx(target_t *target)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
-
        int retval;
        struct timeval timeout, now;
-
        scan_field_t fields[3];
        uint8_t field0_out = 0x0;
        uint8_t field0_in = 0x0;
@@ -494,6 +476,8 @@ static int xscale_write_rx(target_t *target)
 
        xscale_jtag_set_instr(target->tap, XSCALE_DBGRX);
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 3;
        fields[0].out_value = &field0_out;
@@ -502,7 +486,6 @@ static int xscale_write_rx(target_t *target)
        fields[1].tap = target->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_RX].value;
-       fields[1].in_value = NULL;
 
        fields[2].tap = target->tap;
        fields[2].num_bits = 1;
@@ -637,9 +620,7 @@ static int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
-
        int retval;
-
        scan_field_t fields[3];
        uint8_t field0 = 0x0;
        uint8_t field0_check_value = 0x2;
@@ -660,6 +641,8 @@ static int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
        buf_set_u32(&field0, 1, 1, xscale->hold_rst);
        buf_set_u32(&field0, 2, 1, xscale->external_debug_break);
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 3;
        fields[0].out_value = &field0;
@@ -669,7 +652,6 @@ static int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
        fields[1].tap = target->tap;
        fields[1].num_bits = 32;
        fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
-       fields[1].in_value = NULL;
 
        fields[2].tap = target->tap;
        fields[2].num_bits = 1;
@@ -728,15 +710,15 @@ static int xscale_load_ic(target_t *target, uint32_t va, uint32_t buffer[8])
        /* virtual address of desired cache line */
        buf_set_u32(packet, 0, 27, va >> 5);
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 6;
        fields[0].out_value = &cmd;
-       fields[0].in_value = NULL;
 
        fields[1].tap = target->tap;
        fields[1].num_bits = 27;
        fields[1].out_value = packet;
-       fields[1].in_value = NULL;
 
        jtag_add_dr_scan(2, fields, jtag_get_end_state());
 
@@ -776,15 +758,15 @@ static int xscale_invalidate_ic_line(target_t *target, uint32_t va)
        /* virtual address of desired cache line */
        buf_set_u32(packet, 0, 27, va >> 5);
 
+       memset(&fields, 0, sizeof fields);
+
        fields[0].tap = target->tap;
        fields[0].num_bits = 6;
        fields[0].out_value = &cmd;
-       fields[0].in_value = NULL;
 
        fields[1].tap = target->tap;
        fields[1].num_bits = 27;
        fields[1].out_value = packet;
-       fields[1].in_value = NULL;
 
        jtag_add_dr_scan(2, fields, jtag_get_end_state());
 

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)