Andi <opencode@gmx.net> basic support for the MIPS based SMP8634 SoC.
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Mon, 5 Jan 2009 09:25:23 +0000 (09:25 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Mon, 5 Jan 2009 09:25:23 +0000 (09:25 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1299 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/board/x300t.cfg [new file with mode: 0644]
src/target/interface/parport_dlc5.cfg [new file with mode: 0644]
src/target/target/smp8634.cfg [new file with mode: 0644]

diff --git a/src/target/board/x300t.cfg b/src/target/board/x300t.cfg
new file mode 100644 (file)
index 0000000..200bb58
--- /dev/null
@@ -0,0 +1,17 @@
+# This is for the T-Home X300T / X301T IPTV box,\r
+# which are based on IPTV reference designs from Kiss/Cisco KMM-32**\r
+#\r
+# It has Sigma Designs SMP8634 chip.\r
+source [find target/smp8634.cfg]\r
+\r
+$_TARGETNAME configure -event reset-init { x300t_init }\r
+\r
+# 1MB CFI capable flash\r
+# flash bank <driver> <base> <size> <chip_width> <bus_width>\r
+flash bank cfi 0xac000000 0x100000 2 2 0\r
+\r
+proc x300t_init { } {\r
+       # Setup SDRAM config and flash mapping\r
+       # map flash to CPU address space REG_BASE_cpu_block+CPU_remap4\r
+       mww 0x6f010 0x48000000\r
+}\r
diff --git a/src/target/interface/parport_dlc5.cfg b/src/target/interface/parport_dlc5.cfg
new file mode 100644 (file)
index 0000000..346aede
--- /dev/null
@@ -0,0 +1,7 @@
+telnet_port 4444\r
+gdb_port 2001\r
+\r
+interface parport\r
+parport_port /dev/parport0\r
+parport_cable dlc5\r
+jtag_speed 0\r
diff --git a/src/target/target/smp8634.cfg b/src/target/target/smp8634.cfg
new file mode 100644 (file)
index 0000000..2470a5d
--- /dev/null
@@ -0,0 +1,32 @@
+# script for Sigma Designs SMP8634 (eventually even SMP8635)\r
+\r
+if { [info exists CHIPNAME] } {\r
+   set  _CHIPNAME $CHIPNAME\r
+} else {\r
+   set  _CHIPNAME smp8634\r
+}\r
+\r
+if { [info exists ENDIAN] } {\r
+   set  _ENDIAN $ENDIAN\r
+} else {\r
+   set  _ENDIAN little\r
+}\r
+\r
+if { [info exists CPUTAPID ] } {\r
+   set _CPUTAPID $CPUTAPID\r
+} else {\r
+   # force an error till we get a good number\r
+   set _CPUTAPID 0x08630001\r
+}\r
+\r
+jtag_nsrst_delay 100\r
+jtag_ntrst_delay 100\r
+\r
+reset_config trst_and_srst separate\r
+\r
+# jtag scan chain\r
+# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1\r
+\r
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]\r
+target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant\r

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