Code Review / openocd.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | patch | inline | side by side (parent: 5df0a88)
Michael Bruck <mbruck@digenius.de> macros for error handling
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 28 Apr 2009 07:29:18 +0000 (07:29 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 28 Apr 2009 07:29:18 +0000 (07:29 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1551 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/arm11.c patch | blob | history
src/target/arm11.h patch | blob | history
src/target/arm11_dbgtap.c patch | blob | history

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 4f7d37c667aaabdd9b744f7a46e4320c8be6dcef..241e6ed24696d673f52a310372250e4230df3098 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -316,15 +316,14 @@ reg_t arm11_gdb_dummy_fps_reg =
 int arm11_check_init(arm11_common_t * arm11, u32 * dscr)
 {
        FNC_INFO;
-       int retval;
 
        u32                     dscr_local_tmp_copy;
 
        if (!dscr)
        {
                dscr = &dscr_local_tmp_copy;
-               if ((retval=arm11_read_DSCR(arm11, dscr))!=ERROR_OK)
-                       return retval;
+               
+               CHECK_RETVAL(arm11_read_DSCR(arm11, dscr));
        }
 
        if (!(*dscr & ARM11_DSCR_MODE_SELECT))
@@ -382,9 +381,7 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
        }}
 
        /* Save DSCR */
-       int retval;
-       if ((retval=arm11_read_DSCR(arm11, &R(DSCR)))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_read_DSCR(arm11, &R(DSCR)));
 
        /* Save wDTR */
 
@@ -586,11 +583,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
           otherwise our programming would be sloppy */
        {
                u32 DSCR;
-               int retval;
-               if ((retval=arm11_read_DSCR(arm11, &DSCR))!=ERROR_OK)
-               {
-                       return retval;
-               }
+
+               CHECK_RETVAL(arm11_read_DSCR(arm11, &DSCR));
 
                if (DSCR & (ARM11_DSCR_RDTR_FULL | ARM11_DSCR_WDTR_FULL))
                {
@@ -679,14 +673,12 @@ int arm11_poll(struct target_s *target)
                return ERROR_OK;
 
        u32     dscr;
-       int retval;
-       if ((retval=arm11_read_DSCR(arm11, &dscr))!=ERROR_OK)
-               return retval;
+       
+       CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
        LOG_DEBUG("DSCR %08x", dscr);
 
-       if ((retval=arm11_check_init(arm11, &dscr))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_check_init(arm11, &dscr));
 
        if (dscr & ARM11_DSCR_CORE_HALTED)
        {
@@ -739,8 +731,6 @@ int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer)
 /* target execution control */
 int arm11_halt(struct target_s *target)
 {
-       int retval = ERROR_OK;
-
        FNC_INFO;
 
        arm11_common_t * arm11 = target->arch_info;
@@ -767,19 +757,13 @@ int arm11_halt(struct target_s *target)
 
        arm11_add_IR(arm11, ARM11_HALT, TAP_IDLE);
 
-       if((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(jtag_execute_queue());
 
        u32 dscr;
 
        while (1)
        {
-               int retval;
-               retval = arm11_read_DSCR(arm11, &dscr);
-               if (retval!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
                if (dscr & ARM11_DSCR_CORE_HALTED)
                        break;
@@ -792,19 +776,15 @@ int arm11_halt(struct target_s *target)
        target->state           = TARGET_HALTED;
        target->debug_reason    = arm11_get_DSCR_debug_reason(dscr);
 
-       if((retval = target_call_event_callbacks(target,
-               old_state == TARGET_DEBUG_RUNNING ? TARGET_EVENT_DEBUG_HALTED : TARGET_EVENT_HALTED)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(
+               target_call_event_callbacks(target,
+                       old_state == TARGET_DEBUG_RUNNING ? TARGET_EVENT_DEBUG_HALTED : TARGET_EVENT_HALTED));
 
        return ERROR_OK;
 }
 
 int arm11_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
 {
-       int retval = ERROR_OK;
-
        FNC_INFO;
 
        //        LOG_DEBUG("current %d  address %08x  handle_breakpoints %d  debug_execution %d",
@@ -876,17 +856,13 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
 
        arm11_add_IR(arm11, ARM11_RESTART, TAP_IDLE);
 
-       if((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(jtag_execute_queue());
 
        while (1)
        {
                u32 dscr;
-               retval = arm11_read_DSCR(arm11, &dscr);
-               if (retval!=ERROR_OK)
-                       return retval;
+       
+               CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
                LOG_DEBUG("DSCR %08x", dscr);
 
@@ -899,19 +875,14 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
                target->state                   = TARGET_RUNNING;
                target->debug_reason    = DBG_REASON_NOTHALTED;
 
-               if((retval = target_call_event_callbacks(target, TARGET_EVENT_RESUMED)) != ERROR_OK)
-               {
-                       return retval;
-               }
+               CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_RESUMED));
        }
        else
        {
                target->state                   = TARGET_DEBUG_RUNNING;
                target->debug_reason    = DBG_REASON_NOTHALTED;
-               if((retval = target_call_event_callbacks(target, TARGET_EVENT_RESUMED)) != ERROR_OK)
-               {
-                       return retval;
-               }
+
+               CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_RESUMED));
        }
 
        return ERROR_OK;
@@ -919,8 +890,6 @@ int arm11_resume(struct target_s *target, int current, u32 address, int handle_b
 
 int arm11_step(struct target_s *target, int current, u32 address, int handle_breakpoints)
 {
-       int retval = ERROR_OK;
-
        FNC_INFO;
 
        LOG_DEBUG("target->state: %s",
@@ -943,8 +912,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
 
        u32     next_instruction;
 
-       if ((arm11_read_memory_word(arm11, R(PC), &next_instruction))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_read_memory_word(arm11, R(PC), &next_instruction));
 
        /* skip over BKPT */
        if ((next_instruction & 0xFFF00070) == 0xe1200070)
@@ -988,8 +956,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                brp[1].address  = ARM11_SC7_BCR0;
                brp[1].value    = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (2 << 21);
 
-               if ((retval=arm11_sc7_run(arm11, brp, asizeof(brp)))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_sc7_run(arm11, brp, asizeof(brp)));
 
                /* resume */
 
@@ -1000,15 +967,11 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                        R(DSCR) |= ARM11_DSCR_INTERRUPTS_DISABLE;
 
 
-               if ((retval=arm11_leave_debug_state(arm11))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_leave_debug_state(arm11));
 
                arm11_add_IR(arm11, ARM11_RESTART, TAP_IDLE);
 
-               if((retval = jtag_execute_queue()) != ERROR_OK)
-               {
-                       return retval;
-               }
+               CHECK_RETVAL(jtag_execute_queue());
 
                /** \todo TODO: add a timeout */
 
@@ -1017,9 +980,8 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                while (1)
                {
                        u32 dscr;
-                       retval = arm11_read_DSCR(arm11, &dscr);
-                       if (retval!=ERROR_OK)
-                               return retval;
+
+                       CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
 
                        LOG_DEBUG("DSCR %08x", dscr);
 
@@ -1032,8 +994,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
                arm11_sc7_clear_vbw(arm11);
 
                /* save state */
-               if((retval = arm11_on_enter_debug_state(arm11))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(arm11_on_enter_debug_state(arm11));
 
            /* restore default state */
                R(DSCR) &= ~ARM11_DSCR_INTERRUPTS_DISABLE;
@@ -1043,10 +1004,7 @@ int arm11_step(struct target_s *target, int current, u32 address, int handle_bre
        //        target->state         = TARGET_HALTED;
        target->debug_reason    = DBG_REASON_SINGLESTEP;
 
-       if((retval = target_call_event_callbacks(target, TARGET_EVENT_HALTED)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(target_call_event_callbacks(target, TARGET_EVENT_HALTED));
 
        return ERROR_OK;
 }
@@ -1069,9 +1027,7 @@ int arm11_assert_reset(struct target_s *target)
 
        if (target->reset_halt)
        {
-               int retval;
-               if ((retval = target_halt(target))!=ERROR_OK)
-                       return retval;
+               CHECK_RETVAL(target_halt(target));
        }
 
        return ERROR_OK;
@@ -1511,25 +1467,18 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
        }
 
        // no debug, otherwise breakpoint is not set
-       if((retval = target_resume(target, 0, entry_point, 1, 0)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(target_resume(target, 0, entry_point, 1, 0));
 
-       if((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(target_wait_state(target, TARGET_HALTED, timeout_ms));
 
        if (target->state != TARGET_HALTED)
        {
-               if ((retval=target_halt(target))!=ERROR_OK)
-                       return retval;
-               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
-               {
-                       return retval;
-               }
+               CHECK_RETVAL(target_halt(target));
+
+               CHECK_RETVAL(target_wait_state(target, TARGET_HALTED, 500));
+
                retval = ERROR_TARGET_TIMEOUT;
+
                goto del_breakpoint;
        }
 
@@ -1590,7 +1539,6 @@ restore:
 
 int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 {
-       int retval = ERROR_OK;
        FNC_INFO;
 
        NEW(arm11_common_t, arm11, 1);
@@ -1601,10 +1549,7 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
        arm11->jtag_info.tap    = target->tap;
        arm11->jtag_info.scann_size     = 5;
 
-       if((retval = arm_jtag_setup_connection(&arm11->jtag_info)) != ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(arm_jtag_setup_connection(&arm11->jtag_info));
 
        if (target->tap==NULL)
                return ERROR_FAIL;
@@ -1630,7 +1575,6 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target
 int arm11_examine(struct target_s *target)
 {
        FNC_INFO;
-       int retval;
 
        arm11_common_t * arm11 = target->arch_info;
 
@@ -1657,9 +1601,7 @@ int arm11_examine(struct target_s *target)
 
        arm11_add_dr_scan_vc(asizeof(chain0_fields), chain0_fields, TAP_IDLE);
 
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
-               return retval;
-
+       CHECK_RETVAL(jtag_execute_queue());
 
        switch (arm11->device_id & 0x0FFFF000)
        {
diff --git a/src/target/arm11.h b/src/target/arm11.h
index 5c83ec69a6199a1cd74bf7b831db807c5a7a5ca7..f8fea1a19e0dfa6f47d619859fe0538e2eda0b77 100644 (file)
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -51,6 +51,16 @@
 #define ARM11_TAP_DEFAULT                      TAP_INVALID
 
 
+#define CHECK_RETVAL(action)                                                           \
+do {                                                                                                           \
+       int __retval = (action);                                                                \
+                                                                                                                       \
+       if (__retval != ERROR_OK)                                                               \
+               return __retval;                                                                        \
+                                                                                                                       \
+} while (0)
+
+
 typedef struct arm11_register_history_s
 {
        u32             value;
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index 3a50ea072327c49a7476e5b4cd38b228647fb8df..4ac949a363644aa716e01a930390a3cca7ec6623 100644 (file)
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -229,11 +229,7 @@ int arm11_read_DSCR(arm11_common_t * arm11, u32 *value)
 
        arm11_add_dr_scan_vc(1, &chain1_field, TAP_DRPAUSE);
 
-       int retval;
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
-       {
-               return retval;
-       }
+       CHECK_RETVAL(jtag_execute_queue());
 
        if (arm11->last_dscr != dscr)
                JTAG_DEBUG("DSCR  = %08x (OLD %08x)", dscr, arm11->last_dscr);
@@ -242,7 +238,7 @@ int arm11_read_DSCR(arm11_common_t * arm11, u32 *value)
 
        *value=dscr;
 
-       return retval;
+       return ERROR_OK;
 }
 
 /** Write the Debug Status and Control Register (DSCR)
@@ -266,9 +262,7 @@ int arm11_write_DSCR(arm11_common_t * arm11, u32 dscr)
 
        arm11_add_dr_scan_vc(1, &chain1_field, TAP_DRPAUSE);
 
-       int retval;
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(jtag_execute_queue());
 
        JTAG_DEBUG("DSCR <= %08x (OLD %08x)", dscr, arm11->last_dscr);
 
@@ -383,9 +377,7 @@ int arm11_run_instr_no_data(arm11_common_t * arm11, u32 * opcode, size_t count)
 
                        arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE);
 
-                       int retval;
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
-                               return retval;
+                       CHECK_RETVAL(jtag_execute_queue());
 
                        if (flag)
                                break;
@@ -447,9 +439,8 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data,
                        Data        = *data;
 
                        arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_IDLE);
-                       int retval;
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
-                               return retval;
+
+                       CHECK_RETVAL(jtag_execute_queue());
 
                        JTAG_DEBUG("DTR  Ready %d  nRetry %d", Ready, nRetry);
                }
@@ -465,9 +456,8 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, u32 opcode, u32 * data,
                Data        = 0;
 
                arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
-               int retval;
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
-                       return retval;
+
+               CHECK_RETVAL(jtag_execute_queue());
 
                JTAG_DEBUG("DTR  Data %08x  Ready %d  nRetry %d", Data, Ready, nRetry);
        }
@@ -550,9 +540,7 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 *
 
        arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
 
-       int retval;
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(jtag_execute_queue());
 
        size_t error_count = 0;
 
@@ -625,9 +613,8 @@ int arm11_run_instr_data_from_core(arm11_common_t * arm11, u32 opcode, u32 * dat
                do
                {
                        arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
-                       int retval;
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
-                               return retval;
+                       
+                       CHECK_RETVAL(jtag_execute_queue());
 
                        JTAG_DEBUG("DTR  Data %08x  Ready %d  nRetry %d", Data, Ready, nRetry);
                }
@@ -728,9 +715,8 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
                        JTAG_DEBUG("SC7 <= Address %02x  Data %08x    nRW %d", AddressOut, DataOut, nRW);
 
                        arm11_add_dr_scan_vc(asizeof(chain7_fields), chain7_fields, TAP_DRPAUSE);
-                       int retval;
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
-                               return retval;
+                       
+                       CHECK_RETVAL(jtag_execute_queue());
 
                        JTAG_DEBUG("SC7 => Address %02x  Data %08x  Ready %d", AddressIn, DataIn, Ready);
                }
@@ -826,16 +812,13 @@ void arm11_sc7_set_vcr(arm11_common_t * arm11, u32 value)
  */
 int arm11_read_memory_word(arm11_common_t * arm11, u32 address, u32 * result)
 {
-       int retval;
        arm11_run_instr_data_prepare(arm11);
 
        /* MRC p14,0,r0,c0,c5,0 (r0 = address) */
-       if ((retval=arm11_run_instr_data_to_core1(arm11, 0xee100e15, address))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_run_instr_data_to_core1(arm11, 0xee100e15, address));
 
        /* LDC p14,c5,[R0],#4 (DTR = [r0]) */
-       if ((retval=arm11_run_instr_data_from_core(arm11, 0xecb05e01, result, 1))!=ERROR_OK)
-               return retval;
+       CHECK_RETVAL(arm11_run_instr_data_from_core(arm11, 0xecb05e01, result, 1));
 
        arm11_run_instr_data_finish(arm11);
 
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)