mips: code clean up in mips_m4k_debug_entry() function

The function mips_ejtag_read_debug() is defined in mips_ejtag.c
and is called only by mips_m4k_debug_entry() for reading the
CP0 debug register. The comment in this function is obviously wrong.
There is a generic function to read CP0 registers with similar code.
A call to mips32_cp0_read() should work in the same way.
The purpose of reading the debug register is to test if the DSS
bit is set and clear the SSt bit.
It is faster and easier if the SSt bit is cleared without any check.
Remark: DSS bit set only means that a debug single-step exception
ocurred, but it is not possible to step over a sdbbp instruction,
in this case DSS will not be set and the SSt bit not cleared by code.
Resume command at another address will step, so really the behavior
is not the same.

Change-Id: Ibd35f80e0f7669976d96f4ed813830cecf587971
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/950
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index c2bee941d94f4f994322539190cb849b8cbbd2ae..bd7ae14dd70eec587023c277aa607ff7a5c4368c 100644 (file)
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -248,29 +248,6 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
        return mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
 }
 
-int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
-{
-       /* read ejtag ECR */
-       static const uint32_t code[] = {
-                       MIPS32_MTC0(15, 31, 0),                                                 /* move $15 to COP0 DeSave */
-                       MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)),    /* $15 = MIPS32_PRACC_STACK */
-                       MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)),
-                       MIPS32_SW(1, 0, 15),                                                    /* sw $1,($15) */
-                       MIPS32_SW(2, 0, 15),                                                    /* sw $2,($15) */
-                       MIPS32_LUI(1, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
-                       MIPS32_ORI(1, 1, LOWER16(MIPS32_PRACC_PARAM_OUT)),
-                       MIPS32_MFC0(2, 23, 0),                                                  /* move COP0 Debug to $2 */
-                       MIPS32_SW(2, 0, 1),
-                       MIPS32_LW(2, 0, 15),
-                       MIPS32_LW(1, 0, 15),
-                       MIPS32_B(NEG16(12)),
-                       MIPS32_MFC0(15, 31, 0),                                                 /* move COP0 DeSave to $15 */
-       };
-
-       return mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code,
-               0, NULL, 1, debug_reg, 1);
-}
-
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
        uint32_t ejtag_version;

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index be2af27e73b567c624411d9684ceaf63f9bb7f68..653103cdb6c2edbfab0691ad71d0b4dba1b381f0 100644 (file)
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -143,7 +143,6 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info);
 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step);
-int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg);
 
 static inline void mips_le_to_h_u32(jtag_callback_data_t arg)
 {

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 1a10d5a979160a3fbd77c954db61105c83de569d..9a3d929c8c1d01fde3bbcb25727659978f0b5b5e 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -82,10 +82,9 @@ static int mips_m4k_debug_entry(struct target *target)
 {
        struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
-       uint32_t debug_reg;
 
-       /* read debug register */
-       mips_ejtag_read_debug(ejtag_info, &debug_reg);
+       /* make sure stepping disabled, SSt bit in CP0 debug register cleared */
+       mips_ejtag_config_step(ejtag_info, 0);
 
        /* make sure break unit configured */
        mips32_configure_break_unit(target);
@@ -93,12 +92,6 @@ static int mips_m4k_debug_entry(struct target *target)
        /* attempt to find halt reason */
        mips_m4k_examine_debug_reason(target);
 
-       /* clear single step if active */
-       if (debug_reg & EJTAG_DEBUG_DSS) {
-               /* stopped due to single step - clear step bit */
-               mips_ejtag_config_step(ejtag_info, 0);
-       }
-
        mips32_save_context(target);
 
        /* default to mips32 isa, it will be changed below if required */