tcl/interface/ftdi: Add Digilent JTAG-HS3 config 28/2728/3
authorAndreas Färber <afaerber@suse.de>
Thu, 23 Apr 2015 10:30:39 +0000 (12:30 +0200)
committerSpencer Oliver <spen@spen-soft.co.uk>
Wed, 30 Sep 2015 21:10:36 +0000 (22:10 +0100)
Derived from tcl/interface/digilent-hs1.cfg.

JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with
PS_SRST_B on Xilinx Zynq SoC.

Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2728
Tested-by: jenkins
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
tcl/interface/ftdi/digilent_jtag_hs3.cfg [new file with mode: 0644]

diff --git a/tcl/interface/ftdi/digilent_jtag_hs3.cfg b/tcl/interface/ftdi/digilent_jtag_hs3.cfg
new file mode 100644 (file)
index 0000000..f7b8e57
--- /dev/null
@@ -0,0 +1,13 @@
+#
+# Digilent JTAG-HS3
+#
+
+interface ftdi
+ftdi_vid_pid 0x0403 0x6014
+ftdi_device_desc "Digilent USB Device"
+
+# From Digilent support:
+# The SRST pin is [...] 0x20 and 0x10 is the /OE (active low output enable)
+
+ftdi_layout_init 0x2088 0x308b
+ftdi_layout_signal nSRST -data 0x2000 -noe 0x1000