ARM: switch target_to_armv4_5() to target_to_arm()
authorDavid Brownell <dbrownell@users.sourceforge.net>
Sat, 5 Dec 2009 03:43:03 +0000 (19:43 -0800)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Sat, 5 Dec 2009 03:43:03 +0000 (19:43 -0800)
And remove that old symbol.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/arm7tdmi.c
src/target/arm920t.c
src/target/arm9tdmi.c
src/target/arm_semihosting.c
src/target/arm_simulator.c
src/target/armv4_5.c
src/target/armv4_5.h
src/target/xscale.c

index 7d14ed61490dc00bee00849f1f36f5f7027ee2e3..a0b12b94ae2b65587cafb1121b0ec8d479eca85d 100644 (file)
@@ -641,7 +641,7 @@ static void arm7tdmi_branch_resume_thumb(struct target *target)
 static void arm7tdmi_build_reg_cache(struct target *target)
 {
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
 }
index 6a5faffdc7ba98b1c1bb9d06afde14665701764e..305f0de8f47b73e79b14f504b6b34d17a69f4f4b 100644 (file)
@@ -212,7 +212,7 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
 static int arm920t_read_cp15_interpreted(struct target *target,
                uint32_t cp15_opcode, uint32_t address, uint32_t *value)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        uint32_t* regs_p[1];
        uint32_t regs[2];
        uint32_t cp15c15 = 0x0;
@@ -259,7 +259,7 @@ int arm920t_write_cp15_interpreted(struct target *target,
                uint32_t cp15_opcode, uint32_t value, uint32_t address)
 {
        uint32_t cp15c15 = 0x0;
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        uint32_t regs[2];
        struct reg *r = armv4_5->core_cache->reg_list;
 
index 7eb5641de9297f003c3cc2075135defa6dd57dae..10f88f7714901701d3d9c8b686f2a20953e7883f 100644 (file)
@@ -751,7 +751,7 @@ void arm9tdmi_disable_single_step(struct target *target)
 static void arm9tdmi_build_reg_cache(struct target *target)
 {
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
 }
index dd6a669597ca827587198de181fa6f17098d42ea..d71fbaef02bd0544f6ad0cceec5021604507ec1d 100644 (file)
@@ -43,7 +43,7 @@
 
 static int do_semihosting(struct target *target)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        uint32_t r0 = buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32);
        uint32_t r1 = buf_get_u32(armv4_5->core_cache->reg_list[1].value, 0, 32);
        uint32_t lr = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, ARM_MODE_SVC, 14).value, 0, 32);
@@ -406,7 +406,7 @@ static int do_semihosting(struct target *target)
  */
 int arm_semihosting(struct target *target, int *retval)
 {
-       struct arm *arm = target_to_armv4_5(target);
+       struct arm *arm = target_to_arm(target);
        uint32_t lr, spsr;
        struct reg *r;
 
index cb1f65180aa4ecedfd2653d8b42b38170df75d3c..443f29bf230f4b67e563890dd6914115b9344996 100644 (file)
@@ -850,7 +850,7 @@ static enum arm_mode armv4_5_get_mode(struct arm_sim_interface *sim)
 
 int arm_simulate_step(struct target *target, uint32_t *dry_run_pc)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        struct arm_sim_interface sim;
 
        sim.user_data = armv4_5;
index 102913b560f9d7ea143df75617301be865c3376a..4fc8c82609b18f3e579faffa9e5a3f95581a7237 100644 (file)
@@ -491,7 +491,7 @@ static int armv4_5_set_core_reg(struct reg *reg, uint8_t *buf)
 {
        struct arm_reg *armv4_5 = reg->arch_info;
        struct target *target = armv4_5->target;
-       struct arm *armv4_5_target = target_to_armv4_5(target);
+       struct arm *armv4_5_target = target_to_arm(target);
        uint32_t value = buf_get_u32(buf, 0, 32);
 
        if (target->state != TARGET_HALTED)
@@ -583,7 +583,7 @@ struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *arm
 
 int armv4_5_arch_state(struct target *target)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
        {
@@ -611,7 +611,7 @@ int armv4_5_arch_state(struct target *target)
 COMMAND_HANDLER(handle_armv4_5_reg_command)
 {
        struct target *target = get_current_target(CMD_CTX);
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        unsigned num_regs;
        struct reg *regs;
 
@@ -698,7 +698,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 COMMAND_HANDLER(handle_armv4_5_core_state_command)
 {
        struct target *target = get_current_target(CMD_CTX);
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        if (!is_arm(armv4_5))
        {
@@ -974,7 +974,7 @@ const struct command_registration arm_command_handlers[] = {
 
 int armv4_5_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int *reg_list_size)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        int i;
 
        if (!is_arm_mode(armv4_5->core_mode))
@@ -999,7 +999,7 @@ int armv4_5_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int
 static int armv4_5_run_algorithm_completion(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info)
 {
        int retval;
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        if ((retval = target_wait_state(target, TARGET_HALTED, timeout_ms)) != ERROR_OK)
        {
@@ -1036,7 +1036,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
                int (*run_it)(struct target *target, uint32_t exit_point,
                                int timeout_ms, void *arch_info))
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        struct armv4_5_algorithm *armv4_5_algorithm_info = arch_info;
        enum arm_state core_state = armv4_5->core_state;
        uint32_t context[17];
@@ -1388,7 +1388,7 @@ int arm_blank_check_memory(struct target *target,
 
 static int arm_full_context(struct target *target)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        unsigned num_regs = armv4_5->core_cache->num_regs;
        struct reg *reg = armv4_5->core_cache->reg_list;
        int retval = ERROR_OK;
index 5d58aa356179d18303f4076ebc97dfb16318934a..42fbeacc21dde529286f65f5841af2e93647b140 100644 (file)
@@ -141,8 +141,6 @@ struct arm
        void *arch_info;
 };
 
-#define target_to_armv4_5 target_to_arm
-
 /** Convert target handle to generic ARM target state handle. */
 static inline struct arm *target_to_arm(struct target *target)
 {
index 253decbdfa6eb58913a7e19e20c329d0cab0980a..0fa3270034434912cd3e2bdc961c6125cc243186 100644 (file)
@@ -1429,7 +1429,7 @@ static int xscale_step_inner(struct target *target, int current,
 static int xscale_step(struct target *target, int current,
                uint32_t address, int handle_breakpoints)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
        struct breakpoint *breakpoint = target->breakpoints;
 
        uint32_t current_pc;
@@ -1675,7 +1675,7 @@ static int xscale_write_core_reg(struct target *target, struct reg *r,
 
 static int xscale_full_context(struct target *target)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        uint32_t *buffer;
 
@@ -1757,7 +1757,7 @@ static int xscale_full_context(struct target *target)
 
 static int xscale_restore_banked(struct target *target)
 {
-       struct arm *armv4_5 = target_to_armv4_5(target);
+       struct arm *armv4_5 = target_to_arm(target);
 
        int i, j;
 

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