armv7a: Improve parsing of MPIDR register to avoid error message for Cortex R5 08/5108/4
authorTommy Vestermark <tov@vestermark.dk>
Thu, 11 Apr 2019 10:40:36 +0000 (20:40 +1000)
committerMatthias Welwarsky <matthias@welwarsky.de>
Wed, 24 Apr 2019 13:10:13 +0000 (14:10 +0100)
References:
- ARM DDI0406C ARMv7 Architecture Reference Manual, section B4.1.106
- ARM DDI0460D Cortex-R5 Technical Reference Manual section 4.3.6
- ARM 100048_0002_0 Cortex-A73 Technical Reference Manual section 4.5.2

Tested on: TMS570LC4357

Change-Id: Ie0d45fb697697f78cc4ad4e7a0116be9772590ba
Signed-off-by: Tommy Vestermark <tov@vestermark.dk>
Reviewed-on: http://openocd.zylin.com/5108
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

No differences found

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)