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ARM: fix single-step of Thumb unconditional branch
authorNicolas Pitre <nico@fluxnic.net>
Wed, 28 Oct 2009 01:19:43 +0000 (21:19 -0400)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Wed, 28 Oct 2009 02:25:54 +0000 (19:25 -0700)
Only type 1 branch instruction has a condition code, not type 2.
Currently they're both tagged with ARM_B which doesn't allow for the
distinction.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/arm_simulator.c patch | blob | history

diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index c50a52cd9cfa8ceb456bf0cd7da1dfef81a6c2e3..27957b2f6ca46bd30b196346f7a0615258565873 100644 (file)
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -317,8 +317,8 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si
                        return retval;
                instruction_size = 2;
 
-               /* check condition code (only for branch instructions) */
-               if (instruction.type == ARM_B &&
+               /* check condition code (only for branch (1) instructions) */
+               if ((opcode & 0xf000) == 0xd000 &&
                    !thumb_pass_branch_condition(sim->get_cpsr(sim, 0, 32), opcode))
                {
                        if (dry_run_pc)
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