aarch64: simplify armv8_set_cpsr() 12/3812/4
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Thu, 6 Oct 2016 14:11:19 +0000 (16:11 +0200)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 13:18:34 +0000 (14:18 +0100)
Translate from cpsr value to "enum arm_mode" by shifting up 4 bits and
filling the lowest nibble with 0xF.

Change-Id: Ic32186104b0c29578c4f6f99e04840ab88a0017b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/armv8.c

index 3f3127e134df3efab6ecc23224fc061144c1b214..a572e23e543e149f7a03368c30ce65e755d01c82 100644 (file)
@@ -282,36 +282,10 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr)
                }
        }
        arm->core_state = state;
-       if (arm->core_state == ARM_STATE_AARCH64) {
-               switch (mode) {
-                       case SYSTEM_AAR64_MODE_EL0t:
-                               arm->core_mode = ARMV8_64_EL0T;
-                       break;
-                       case SYSTEM_AAR64_MODE_EL1t:
-                               arm->core_mode = ARMV8_64_EL0T;
-                       break;
-                       case SYSTEM_AAR64_MODE_EL1h:
-                               arm->core_mode = ARMV8_64_EL1H;
-                       break;
-                       case SYSTEM_AAR64_MODE_EL2t:
-                               arm->core_mode = ARMV8_64_EL2T;
-                       break;
-                       case SYSTEM_AAR64_MODE_EL2h:
-                               arm->core_mode = ARMV8_64_EL2H;
-                       break;
-                       case SYSTEM_AAR64_MODE_EL3t:
-                               arm->core_mode = ARMV8_64_EL3T;
-                       break;
-                       case SYSTEM_AAR64_MODE_EL3h:
-                               arm->core_mode = ARMV8_64_EL3H;
-                       break;
-                       default:
-                               LOG_DEBUG("unknow mode 0x%x", (unsigned) (mode));
-                       break;
-               }
-       } else {
+       if (arm->core_state == ARM_STATE_AARCH64)
+               arm->core_mode = (mode << 4) | 0xf;
+       else
                arm->core_mode = mode;
-       }
 
        LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
                armv8_mode_name(arm->core_mode),

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)