cortex_m: support control.FPCA

Bit 2 of control register is used if the processor includes the FP
extension

Change-Id: Ie21bc9de8cae5bad9d841e1908eff3aa0bb29d4b
Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
Reviewed-on: http://openocd.zylin.com/5853
Reviewed-by: Sylvain Chouleur <sylvain.chouleur@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index ea6ee6117f99f44cc4e3b88bf2efa5aa4356367d..5e0694d8ab5fa51a53964e4003822f003482b8b8 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -111,7 +111,7 @@ static const struct {
        { ARMV7M_PRIMASK, "primask", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
        { ARMV7M_BASEPRI, "basepri", 8, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
        { ARMV7M_FAULTMASK, "faultmask", 1, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
-       { ARMV7M_CONTROL, "control", 2, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
+       { ARMV7M_CONTROL, "control", 3, REG_TYPE_INT8, "system", "org.gnu.gdb.arm.m-system" },
 
        { ARMV7M_D0, "d0", 64, REG_TYPE_IEEE_DOUBLE, "float", "org.gnu.gdb.arm.vfp" },
        { ARMV7M_D1, "d1", 64, REG_TYPE_IEEE_DOUBLE, "float", "org.gnu.gdb.arm.vfp" },

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 55664a79a75437b67625cf8d4a893468436610af..abc377f0dc31b699999dadba8a285e6e863c7171 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -541,7 +541,7 @@ static int cortex_m_debug_entry(struct target *target)
                arm->map = armv7m_msp_reg_map;
        } else {
                unsigned control = buf_get_u32(arm->core_cache
-                               ->reg_list[ARMV7M_CONTROL].value, 0, 2);
+                               ->reg_list[ARMV7M_CONTROL].value, 0, 3);
 
                /* is this thread privileged? */
                arm->core_mode = control & 1
@@ -1678,7 +1678,7 @@ static int cortex_m_load_core_reg_u32(struct target *target,
                                        break;
 
                                case ARMV7M_CONTROL:
-                                       *value = buf_get_u32((uint8_t *)value, 24, 2);
+                                       *value = buf_get_u32((uint8_t *)value, 24, 3);
                                        break;
                        }
 
@@ -1764,7 +1764,7 @@ static int cortex_m_store_core_reg_u32(struct target *target,
                                        break;
 
                                case ARMV7M_CONTROL:
-                                       buf_set_u32((uint8_t *)&reg, 24, 2, value);
+                                       buf_set_u32((uint8_t *)&reg, 24, 3, value);
                                        break;
                        }
 

diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index f0dc572764f34362a3e9f72351473a9f90255a0a..c02cbb643a121e03fd482000f1e5149230d8100a 100644 (file)
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -123,7 +123,7 @@ static int adapter_load_core_reg_u32(struct target *target,
                        break;
 
                case ARMV7M_CONTROL:
-                       *value = buf_get_u32((uint8_t *) value, 24, 2);
+                       *value = buf_get_u32((uint8_t *) value, 24, 3);
                        break;
                }
 
@@ -215,7 +215,7 @@ static int adapter_store_core_reg_u32(struct target *target,
                        break;
 
                case ARMV7M_CONTROL:
-                       buf_set_u32((uint8_t *) &reg, 24, 2, value);
+                       buf_set_u32((uint8_t *) &reg, 24, 3, value);
                        break;
                }
 
@@ -433,7 +433,7 @@ static int adapter_debug_entry(struct target *target)
                arm->map = armv7m_msp_reg_map;
        } else {
                unsigned control = buf_get_u32(arm->core_cache
-                               ->reg_list[ARMV7M_CONTROL].value, 0, 2);
+                               ->reg_list[ARMV7M_CONTROL].value, 0, 3);
 
                /* is this thread privileged? */
                arm->core_mode = control & 1