ETM: remove old mid-level ETM handle
authorDavid Brownell <dbrownell@users.sourceforge.net>
Thu, 12 Nov 2009 05:57:44 +0000 (21:57 -0800)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Thu, 12 Nov 2009 05:57:44 +0000 (21:57 -0800)
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.

Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.

The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP.  Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/arm7_9_common.h
src/target/armv4_5.h
src/target/etb.c
src/target/etm.c
src/target/etm.h
src/target/etm_dummy.c
src/target/oocd_trace.c

index c0145d95e375f950a96b678d069e9c9da0a3c8ad..a49dab2739e43402dd0c822e7e2c74c5c027236a 100644 (file)
@@ -30,7 +30,7 @@
 #define ARM7_9_COMMON_H
 
 #include "breakpoints.h"
-#include "etm.h"
+#include "armv4_5.h"
 
 #define        ARM7_9_COMMON_MAGIC 0x0a790a79 /**< */
 
@@ -39,7 +39,7 @@
  */
 typedef struct arm7_9_common_s
 {
-       armv4_5_common_t armv4_5_common;
+       struct arm armv4_5_common;
        uint32_t common_magic;
 
        arm_jtag_t jtag_info; /**< JTAG information for target */
@@ -69,8 +69,6 @@ typedef struct arm7_9_common_s
        bool fast_memory_access;
        bool dcc_downloads;
 
-       etm_context_t *etm_ctx;
-
        struct working_area_s *dcc_working_area;
 
        int (*examine_debug_reason)(target_t *target); /**< Function for determining why debug state was entered */
index 4d87c083e1f98195ff025d6dd3316c3bdab95809..1eaab12da300103c57fbe9e5f4491e39bb7a3897 100644 (file)
@@ -29,6 +29,7 @@
 #include "register.h"
 #include "target.h"
 #include "log.h"
+#include "etm.h"
 
 typedef enum armv4_5_mode
 {
index 28ef3ef40962dd4ff41824085122133bd04dadad..3a4e3fe459a3dbbf2e8eca5d37b7af482b40c570 100644 (file)
@@ -21,7 +21,7 @@
 #include "config.h"
 #endif
 
-#include "arm7_9_common.h"
+#include "armv4_5.h"
 #include "etb.h"
 
 
index 53d31a1538421beb59d7381ad13fd53129d84e6e..990c0629a31972e8ec082d5eca89a32c82574a58 100644 (file)
 #include "config.h"
 #endif
 
-#include "etm.h"
+#include "armv4_5.h"
 #include "etb.h"
 #include "image.h"
-#include "arm7_9_common.h"
 #include "arm_disassembler.h"
 
 
index 2335c983e163caa98857839a422615f235667a0f..254db9257c1d926ea7ce8f0f7485d3b05f363734 100644 (file)
@@ -25,7 +25,6 @@
 
 #include "trace.h"
 #include "arm_jtag.h"
-#include "armv4_5.h"
 
 struct image_s;
 
@@ -158,7 +157,7 @@ typedef struct etm
        uint32_t trace_depth;           /* number of cycles to be analyzed, 0 if no data available */
        etm_portmode_t portmode;        /* normal, multiplexed or demultiplexed */
        etmv1_tracemode_t tracemode;    /* type of info trace contains */
-       armv4_5_state_t core_state;     /* current core state */
+       int /*armv4_5_state_t*/ core_state;     /* current core state */
        struct image_s *image;          /* source for target opcodes */
        uint32_t pipe_index;            /* current trace cycle */
        uint32_t data_index;            /* cycle holding next data packet */
index eba1865ea001918f6dd140e06b259e20caf1efa3..0c5fc111b534e4983b71ee54c8c626d5325159d9 100644 (file)
@@ -21,8 +21,8 @@
 #include "config.h"
 #endif
 
+#include "armv4_5.h"
 #include "etm_dummy.h"
-#include "arm7_9_common.h"
 
 
 static int handle_etm_dummy_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
index 4ee84fff56e0182ad5d85802b61e88325848fcae..e0048e64ce413a0601bb0f6bbac4b733f97b89e0 100644 (file)
@@ -21,8 +21,8 @@
 #include "config.h"
 #endif
 
+#include "armv4_5.h"
 #include "oocd_trace.h"
-#include "arm7_9_common.h"
 
 /*
  * This is "proof of concept" code, for prototype hardware:

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