--- /dev/null
+/****************************************************************************\r
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.\r
+*\r
+* Redistribution and use in source and binary forms, with or without \r
+* modification, are permitted provided that the following conditions \r
+* are met:\r
+* \r
+* 1. Redistributions of source code must retain the above copyright \r
+* notice, this list of conditions and the following disclaimer.\r
+* 2. Redistributions in binary form must reproduce the above copyright\r
+* notice, this list of conditions and the following disclaimer in the \r
+* documentation and/or other materials provided with the distribution.\r
+* 3. Neither the name of the author nor the names of its contributors may \r
+* be used to endorse or promote products derived from this software \r
+* without specific prior written permission.\r
+*\r
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS \r
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL \r
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, \r
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, \r
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS \r
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED \r
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, \r
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF \r
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF \r
+* SUCH DAMAGE.\r
+*\r
+****************************************************************************\r
+* History:\r
+*\r
+* 30.03.06 mifi First Version for Insight tutorial\r
+****************************************************************************/\r
+#ifndef __TYPEDEFS_H__\r
+#define __TYPEDEFS_H__\r
+\r
+/*\r
+ * Some types to use Windows like source\r
+ */\r
+typedef char CHAR; /* 8-bit signed data */\r
+typedef unsigned char BYTE; /* 8-bit unsigned data */\r
+typedef unsigned short WORD; /* 16-bit unsigned data */\r
+typedef long LONG; /* 32-bit signed data */\r
+typedef unsigned long ULONG; /* 32-bit unsigned data */\r
+typedef unsigned long DWORD; /* 32-bit unsigned data */\r
+\r
+\r
+#endif /* !__TYPEDEFS_H__ */\r
+/*** EOF ***/\r
--- /dev/null
+#\r
+# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!! \r
+#\r
+##############################################################################################\r
+# \r
+# On command line:\r
+#\r
+# make all = Create project\r
+#\r
+# make clean = Clean project files.\r
+#\r
+# To rebuild project do "make clean" and "make all".\r
+#\r
+\r
+##############################################################################################\r
+# Start of default section\r
+#\r
+\r
+TRGT = arm-elf-\r
+CC = $(TRGT)gcc\r
+CP = $(TRGT)objcopy\r
+AS = $(TRGT)gcc -x assembler-with-cpp\r
+BIN = $(CP) -O ihex \r
+\r
+MCU = arm7tdmi\r
+\r
+# List all default C defines here, like -D_DEBUG=1\r
+DDEFS = \r
+\r
+# List all default ASM defines here, like -D_DEBUG=1\r
+DADEFS = \r
+\r
+# List all default directories to look for include files here\r
+DINCDIR = \r
+\r
+# List the default directory to look for the libraries here\r
+DLIBDIR =\r
+\r
+# List all default libraries here\r
+DLIBS = \r
+\r
+#\r
+# End of default section\r
+##############################################################################################\r
+\r
+##############################################################################################\r
+# Start of user section\r
+#\r
+\r
+# Define project name here\r
+PROJECT = test\r
+\r
+# Define linker script file here\r
+LDSCRIPT_RAM = ./prj/hitex_str7_ram.ld\r
+LDSCRIPT_ROM = ./prj/hitex_str7_rom.ld\r
+\r
+# List all user C define here, like -D_DEBUG=1\r
+UDEFS = \r
+\r
+# Define ASM defines here\r
+UADEFS = \r
+\r
+# List C source files here\r
+SRC = ./src/main.c\r
+\r
+# List ASM source files here\r
+ASRC = ./src/crt.s\r
+\r
+# List all user directories here\r
+UINCDIR = ./inc\r
+\r
+# List the user directory to look for the libraries here\r
+ULIBDIR =\r
+\r
+# List all user libraries here\r
+ULIBS = \r
+\r
+# Define optimisation level here\r
+OPT = -O0\r
+\r
+#\r
+# End of user defines\r
+##############################################################################################\r
+\r
+\r
+INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))\r
+LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))\r
+DEFS = $(DDEFS) $(UDEFS)\r
+ADEFS = $(DADEFS) $(UADEFS)\r
+OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)\r
+LIBS = $(DLIBS) $(ULIBS)\r
+MCFLAGS = -mcpu=$(MCU)\r
+\r
+ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)\r
+CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)\r
+LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)\r
+LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)\r
+\r
+# Generate dependency information\r
+CPFLAGS += -MD -MP -MF .dep/$(@F).d\r
+\r
+#\r
+# makefile rules\r
+#\r
+\r
+all: RAM ROM\r
+\r
+RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex\r
+\r
+ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex\r
+\r
+%o : %c\r
+ $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@\r
+\r
+%o : %s\r
+ $(AS) -c $(ASFLAGS) $< -o $@\r
+\r
+%ram.elf: $(OBJS)\r
+ $(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@\r
+\r
+%rom.elf: $(OBJS)\r
+ $(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@\r
+\r
+%hex: %elf\r
+ $(BIN) $< $@\r
+\r
+clean:\r
+ -rm -f $(OBJS)\r
+ -rm -f $(PROJECT)_ram.elf\r
+ -rm -f $(PROJECT)_ram.map\r
+ -rm -f $(PROJECT)_ram.hex\r
+ -rm -f $(PROJECT)_rom.elf\r
+ -rm -f $(PROJECT)_rom.map\r
+ -rm -f $(PROJECT)_rom.hex\r
+ -rm -f $(SRC:.c=.c.bak)\r
+ -rm -f $(SRC:.c=.lst)\r
+ -rm -f $(ASRC:.s=.s.bak)\r
+ -rm -f $(ASRC:.s=.lst)\r
+ -rm -fR .dep\r
+\r
+# \r
+# Include the dependency files, should be the last of the makefile\r
+#\r
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)\r
+\r
+# *** EOF ***
\ No newline at end of file
--- /dev/null
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+monitor arm7_9 sw_bkpts enable\r
+monitor mww 0xA0000050 0x01c2\r
+monitor mdw 0xA0000050\r
+load\r
+break main\r
+continue
\ No newline at end of file
--- /dev/null
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+monitor arm7_9 force_hw_bkpts enable\r
+monitor mww 0xA0000050 0x01c2\r
+monitor mdw 0xA0000050\r
+load\r
+break main\r
+continue
\ No newline at end of file
--- /dev/null
+/***********************************************************************************\r
+* Copyright 2005 Anglia Design\r
+* This demo code and associated components are provided as is and has no warranty,\r
+* implied or otherwise. You are free to use/modify any of the provided\r
+* code at your own risk in your applications with the expressed limitation\r
+* of liability (see below)\r
+* \r
+* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY\r
+* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR\r
+* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER\r
+* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
+*\r
+* Author : Spencer Oliver\r
+* Web : www.anglia-designs.com\r
+*\r
+***********************************************************************************/\r
+\r
+/* Stack Sizes */\r
+\r
+ _STACKSIZE = 1024;\r
+ _STACKSIZE_IRQ = 256;\r
+ _STACKSIZE_FIQ = 0;\r
+ _STACKSIZE_SVC = 1024;\r
+ _STACKSIZE_ABT = 0;\r
+ _STACKSIZE_UND = 0;\r
+ _HEAPSIZE = 1024;\r
+ \r
+/* Memory Definitions */\r
+\r
+MEMORY\r
+{\r
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000\r
+}\r
+\r
+/* Section Definitions */\r
+\r
+SECTIONS\r
+{ \r
+ /* first section is .text which is used for code */\r
+\r
+ .text :\r
+ {\r
+ CREATE_OBJECT_SYMBOLS\r
+ KEEP(*(.vectrom))\r
+ KEEP(*(.init))\r
+ *(.text .text.*)\r
+ *(.gnu.linkonce.t.*)\r
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer)\r
+ KEEP(*(.fini))\r
+ *(.gcc_except_table)\r
+ } >DATA =0\r
+ . = ALIGN(4);\r
+\r
+ /* .ctors .dtors are used for c++ constructors/destructors */\r
+ \r
+ .ctors :\r
+ {\r
+ PROVIDE(__ctors_start__ = .);\r
+ KEEP(*(SORT(.ctors.*)))\r
+ KEEP(*(.ctors))\r
+ PROVIDE(__ctors_end__ = .);\r
+ } >DATA\r
+\r
+ .dtors :\r
+ {\r
+ PROVIDE(__dtors_start__ = .); \r
+ KEEP(*(SORT(.dtors.*)))\r
+ KEEP(*(.dtors))\r
+ PROVIDE(__dtors_end__ = .);\r
+ } >DATA\r
+ \r
+ /* .rodata section which is used for read-only data (constants) */\r
+\r
+ .rodata :\r
+ {\r
+ *(.rodata .rodata.*)\r
+ *(.gnu.linkonce.r.*)\r
+ } >DATA\r
+ . = ALIGN(4);\r
+\r
+ .init_array :\r
+ {\r
+ *(.init)\r
+ *(.fini)\r
+ PROVIDE_HIDDEN (__preinit_array_start = .);\r
+ KEEP (*(.preinit_array))\r
+ PROVIDE_HIDDEN (__preinit_array_end = .);\r
+ PROVIDE_HIDDEN (__init_array_start = .);\r
+ KEEP (*(SORT(.init_array.*)))\r
+ KEEP (*(.init_array))\r
+ PROVIDE_HIDDEN (__init_array_end = .);\r
+ PROVIDE_HIDDEN (__fini_array_start = .);\r
+ KEEP (*(.fini_array))\r
+ KEEP (*(SORT(.fini_array.*)))\r
+ PROVIDE_HIDDEN (__fini_array_end = .);\r
+ } >DATA\r
+\r
+ . = ALIGN(4);\r
+ \r
+ /* .ARM.exidx is sorted, so has to go in its own output section. */\r
+ __exidx_start = .;\r
+ .ARM.exidx :\r
+ {\r
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
+ } >DATA\r
+ __exidx_end = .;\r
+\r
+ _vectext = .;\r
+ PROVIDE (vectext = .);\r
+\r
+ .vect : AT (_vectext)\r
+ {\r
+ _vecstart = .;\r
+ KEEP(*(.vectram))\r
+ _vecend = .;\r
+ } >DATA\r
+\r
+ _etext = _vectext + SIZEOF(.vect);\r
+ PROVIDE (etext = .);\r
+\r
+ /* .data section which is used for initialized data */\r
+\r
+ .data : AT (_etext)\r
+ {\r
+ *(.data .data.*)\r
+ *(.gnu.linkonce.d.*)\r
+ SORT(CONSTRUCTORS)\r
+ } >DATA\r
+ . = ALIGN(4);\r
+ \r
+ __data_start = .;\r
+ _edata = .;\r
+ PROVIDE (edata = .);\r
+\r
+ /* .bss section which is used for uninitialized data */\r
+\r
+ .bss :\r
+ {\r
+ __bss_start = .;\r
+ __bss_start__ = .;\r
+ *(.bss .bss.*)\r
+ *(.gnu.linkonce.b.*)\r
+ *(COMMON)\r
+ . = ALIGN(4);\r
+ } >DATA\r
+ . = ALIGN(4);\r
+ __bss_end__ = .;\r
+ \r
+ _end = .;\r
+ PROVIDE(end = .);\r
+\r
+ /* .heap section which is used for memory allocation */\r
+ \r
+ .heap (NOLOAD) :\r
+ {\r
+ __heap_start__ = .;\r
+ *(.heap)\r
+ . = MAX(__heap_start__ + _HEAPSIZE , .);\r
+ } >DATA\r
+ __heap_end__ = __heap_start__ + SIZEOF(.heap);\r
+ \r
+ /* .stack section - user mode stack */\r
+ \r
+ .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_start__ = .;\r
+ *(.stack)\r
+ . = MAX(__stack_start__ + _STACKSIZE , .);\r
+ } >DATA\r
+ __stack_end__ = __stack_start__ + SIZEOF(.stack);\r
+\r
+ /* .stack_irq section */\r
+ \r
+ .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_irq_start__ = .;\r
+ *(.stack_irq)\r
+ . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);\r
+ } >DATA\r
+ __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);\r
+\r
+ /* .stack_fiq section */\r
+ \r
+ .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_fiq_start__ = .;\r
+ *(.stack_fiq)\r
+ . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);\r
+ } >DATA\r
+ __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);\r
+\r
+ /* .stack_svc section */\r
+ \r
+ .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_svc_start__ = .;\r
+ *(.stack_svc)\r
+ . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);\r
+ } >DATA\r
+ __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);\r
+\r
+ /* .stack_abt section */\r
+ \r
+ .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_abt_start__ = .;\r
+ *(.stack_abt)\r
+ . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);\r
+ } >DATA\r
+ __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);\r
+\r
+ /* .stack_und section */\r
+ \r
+ .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_und_start__ = .;\r
+ *(.stack_und)\r
+ . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);\r
+ } >DATA\r
+ __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);\r
+ \r
+ /* Stabs debugging sections. */\r
+ .stab 0 : { *(.stab) }\r
+ .stabstr 0 : { *(.stabstr) }\r
+ .stab.excl 0 : { *(.stab.excl) }\r
+ .stab.exclstr 0 : { *(.stab.exclstr) }\r
+ .stab.index 0 : { *(.stab.index) }\r
+ .stab.indexstr 0 : { *(.stab.indexstr) }\r
+ .comment 0 : { *(.comment) }\r
+ /* DWARF debug sections.\r
+ Symbols in the DWARF debugging sections are relative to the beginning\r
+ of the section so we begin them at 0. */\r
+ /* DWARF 1 */\r
+ .debug 0 : { *(.debug) }\r
+ .line 0 : { *(.line) }\r
+ /* GNU DWARF 1 extensions */\r
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
+ .debug_sfnames 0 : { *(.debug_sfnames) }\r
+ /* DWARF 1.1 and DWARF 2 */\r
+ .debug_aranges 0 : { *(.debug_aranges) }\r
+ .debug_pubnames 0 : { *(.debug_pubnames) }\r
+ /* DWARF 2 */\r
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+ .debug_abbrev 0 : { *(.debug_abbrev) }\r
+ .debug_line 0 : { *(.debug_line) }\r
+ .debug_frame 0 : { *(.debug_frame) }\r
+ .debug_str 0 : { *(.debug_str) }\r
+ .debug_loc 0 : { *(.debug_loc) }\r
+ .debug_macinfo 0 : { *(.debug_macinfo) }\r
+ /* SGI/MIPS DWARF 2 extensions */\r
+ .debug_weaknames 0 : { *(.debug_weaknames) }\r
+ .debug_funcnames 0 : { *(.debug_funcnames) }\r
+ .debug_typenames 0 : { *(.debug_typenames) }\r
+ .debug_varnames 0 : { *(.debug_varnames) } \r
+}\r
--- /dev/null
+/***********************************************************************************\r
+* Copyright 2005 Anglia Design\r
+* This demo code and associated components are provided as is and has no warranty,\r
+* implied or otherwise. You are free to use/modify any of the provided\r
+* code at your own risk in your applications with the expressed limitation\r
+* of liability (see below)\r
+* \r
+* LIMITATION OF LIABILITY: ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY\r
+* LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR\r
+* INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER\r
+* THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
+*\r
+* Author : Spencer Oliver\r
+* Web : www.anglia-designs.com\r
+*\r
+***********************************************************************************/\r
+\r
+/* Stack Sizes */\r
+\r
+ _STACKSIZE = 1024;\r
+ _STACKSIZE_IRQ = 256;\r
+ _STACKSIZE_FIQ = 0;\r
+ _STACKSIZE_SVC = 1024;\r
+ _STACKSIZE_ABT = 0;\r
+ _STACKSIZE_UND = 0;\r
+ _HEAPSIZE = 1024;\r
+\r
+/* Memory Definitions */\r
+\r
+MEMORY\r
+{\r
+ CODE (rx) : ORIGIN = 0x40000000, LENGTH = 0x00040000\r
+ DATA (rw) : ORIGIN = 0x20000000, LENGTH = 0x00010000\r
+}\r
+\r
+/* Section Definitions */\r
+\r
+SECTIONS\r
+{\r
+ /* first section is .text which is used for code */\r
+\r
+ .text :\r
+ {\r
+ CREATE_OBJECT_SYMBOLS\r
+ KEEP(*(.vectrom))\r
+ KEEP(*(.init))\r
+ *(.text .text.*)\r
+ *(.gnu.linkonce.t.*)\r
+ *(.glue_7t) *(.glue_7) *(.vfp11_veneer)\r
+ KEEP(*(.fini))\r
+ *(.gcc_except_table)\r
+ } >CODE =0\r
+ . = ALIGN(4);\r
+\r
+ /* .ctors .dtors are used for c++ constructors/destructors */\r
+ \r
+ .ctors :\r
+ {\r
+ PROVIDE(__ctors_start__ = .);\r
+ KEEP(*(SORT(.ctors.*)))\r
+ KEEP(*(.ctors))\r
+ PROVIDE(__ctors_end__ = .);\r
+ } >CODE\r
+\r
+ .dtors :\r
+ {\r
+ PROVIDE(__dtors_start__ = .); \r
+ KEEP(*(SORT(.dtors.*)))\r
+ KEEP(*(.dtors))\r
+ PROVIDE(__dtors_end__ = .);\r
+ } >CODE\r
+ \r
+ /* .rodata section which is used for read-only data (constants) */\r
+\r
+ .rodata :\r
+ {\r
+ *(.rodata .rodata.*)\r
+ *(.gnu.linkonce.r.*)\r
+ } >CODE\r
+ . = ALIGN(4);\r
+\r
+ .init_array :\r
+ {\r
+ *(.init)\r
+ *(.fini)\r
+ PROVIDE_HIDDEN (__preinit_array_start = .);\r
+ KEEP (*(.preinit_array))\r
+ PROVIDE_HIDDEN (__preinit_array_end = .);\r
+ PROVIDE_HIDDEN (__init_array_start = .);\r
+ KEEP (*(SORT(.init_array.*)))\r
+ KEEP (*(.init_array))\r
+ PROVIDE_HIDDEN (__init_array_end = .);\r
+ PROVIDE_HIDDEN (__fini_array_start = .);\r
+ KEEP (*(.fini_array))\r
+ KEEP (*(SORT(.fini_array.*)))\r
+ PROVIDE_HIDDEN (__fini_array_end = .);\r
+ } >CODE\r
+\r
+ . = ALIGN(4);\r
+ \r
+ /* .ARM.exidx is sorted, so has to go in its own output section. */\r
+ __exidx_start = .;\r
+ .ARM.exidx :\r
+ {\r
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
+ } >CODE\r
+ __exidx_end = .;\r
+\r
+ _vectext = .;\r
+ PROVIDE (vectext = .);\r
+\r
+ .vect : AT (_vectext)\r
+ {\r
+ _vecstart = .;\r
+ KEEP(*(.vectram))\r
+ _vecend = .;\r
+ } >DATA\r
+\r
+ _etext = _vectext + SIZEOF(.vect);\r
+ PROVIDE (etext = .);\r
+\r
+ /* .data section which is used for initialized data */\r
+\r
+ .data : AT (_etext)\r
+ {\r
+ __data_start = .;\r
+ *(.data .data.*)\r
+ *(.gnu.linkonce.d.*)\r
+ SORT(CONSTRUCTORS)\r
+ . = ALIGN(4);\r
+ *(.fastrun .fastrun.*)\r
+ } >DATA\r
+ . = ALIGN(4);\r
+ \r
+ _edata = .;\r
+ PROVIDE (edata = .);\r
+\r
+ /* .bss section which is used for uninitialized data */\r
+\r
+ .bss :\r
+ {\r
+ __bss_start = .;\r
+ __bss_start__ = .;\r
+ *(.bss .bss.*)\r
+ *(.gnu.linkonce.b.*)\r
+ *(COMMON)\r
+ . = ALIGN(4);\r
+ } >DATA\r
+ . = ALIGN(4);\r
+ __bss_end__ = .;\r
+ \r
+ _end = .;\r
+ PROVIDE(end = .);\r
+\r
+ /* .heap section which is used for memory allocation */\r
+ \r
+ .heap (NOLOAD) :\r
+ {\r
+ __heap_start__ = .;\r
+ *(.heap)\r
+ . = MAX(__heap_start__ + _HEAPSIZE , .);\r
+ } >DATA\r
+ __heap_end__ = __heap_start__ + SIZEOF(.heap);\r
+ \r
+ /* .stack section - user mode stack */\r
+ \r
+ .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_start__ = .;\r
+ *(.stack)\r
+ . = MAX(__stack_start__ + _STACKSIZE , .);\r
+ } >DATA\r
+ __stack_end__ = __stack_start__ + SIZEOF(.stack);\r
+\r
+ /* .stack_irq section */\r
+ \r
+ .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_irq_start__ = .;\r
+ *(.stack_irq)\r
+ . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);\r
+ } >DATA\r
+ __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);\r
+\r
+ /* .stack_fiq section */\r
+ \r
+ .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_fiq_start__ = .;\r
+ *(.stack_fiq)\r
+ . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);\r
+ } >DATA\r
+ __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);\r
+\r
+ /* .stack_svc section */\r
+ \r
+ .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_svc_start__ = .;\r
+ *(.stack_svc)\r
+ . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);\r
+ } >DATA\r
+ __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);\r
+\r
+ /* .stack_abt section */\r
+ \r
+ .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_abt_start__ = .;\r
+ *(.stack_abt)\r
+ . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);\r
+ } >DATA\r
+ __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);\r
+\r
+ /* .stack_und section */\r
+ \r
+ .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :\r
+ {\r
+ __stack_und_start__ = .;\r
+ *(.stack_und)\r
+ . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);\r
+ } >DATA\r
+ __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);\r
+ \r
+ /* Stabs debugging sections. */\r
+ .stab 0 : { *(.stab) }\r
+ .stabstr 0 : { *(.stabstr) }\r
+ .stab.excl 0 : { *(.stab.excl) }\r
+ .stab.exclstr 0 : { *(.stab.exclstr) }\r
+ .stab.index 0 : { *(.stab.index) }\r
+ .stab.indexstr 0 : { *(.stab.indexstr) }\r
+ .comment 0 : { *(.comment) }\r
+ /* DWARF debug sections.\r
+ Symbols in the DWARF debugging sections are relative to the beginning\r
+ of the section so we begin them at 0. */\r
+ /* DWARF 1 */\r
+ .debug 0 : { *(.debug) }\r
+ .line 0 : { *(.line) }\r
+ /* GNU DWARF 1 extensions */\r
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
+ .debug_sfnames 0 : { *(.debug_sfnames) }\r
+ /* DWARF 1.1 and DWARF 2 */\r
+ .debug_aranges 0 : { *(.debug_aranges) }\r
+ .debug_pubnames 0 : { *(.debug_pubnames) }\r
+ /* DWARF 2 */\r
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+ .debug_abbrev 0 : { *(.debug_abbrev) }\r
+ .debug_line 0 : { *(.debug_line) }\r
+ .debug_frame 0 : { *(.debug_frame) }\r
+ .debug_str 0 : { *(.debug_str) }\r
+ .debug_loc 0 : { *(.debug_loc) }\r
+ .debug_macinfo 0 : { *(.debug_macinfo) }\r
+ /* SGI/MIPS DWARF 2 extensions */\r
+ .debug_weaknames 0 : { *(.debug_weaknames) }\r
+ .debug_funcnames 0 : { *(.debug_funcnames) }\r
+ .debug_typenames 0 : { *(.debug_typenames) }\r
+ .debug_varnames 0 : { *(.debug_varnames) } \r
+}\r
+\r
--- /dev/null
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+# tell gdb our flash memory map\r
+# and enable flash programming\r
+gdb_memory_map enable\r
+gdb_flash_program enable\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config trst_and_srst srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_halt 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+target_script 0 gdb_program_config .\prj\str710_program.script\r
+\r
+working_area 0 0x2000C000 0x4000 nobackup\r
+\r
+#flash bank str7x <base> <size> 0 0 <target#> <variant>\r
+flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+flash protect 0 0 7 off\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
--- /dev/null
+/****************************************************************************\r
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.\r
+*\r
+* Redistribution and use in source and binary forms, with or without \r
+* modification, are permitted provided that the following conditions \r
+* are met:\r
+* \r
+* 1. Redistributions of source code must retain the above copyright \r
+* notice, this list of conditions and the following disclaimer.\r
+* 2. Redistributions in binary form must reproduce the above copyright\r
+* notice, this list of conditions and the following disclaimer in the \r
+* documentation and/or other materials provided with the distribution.\r
+* 3. Neither the name of the author nor the names of its contributors may \r
+* be used to endorse or promote products derived from this software \r
+* without specific prior written permission.\r
+*\r
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS \r
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL \r
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, \r
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, \r
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS \r
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED \r
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, \r
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF \r
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF \r
+* SUCH DAMAGE.\r
+*\r
+****************************************************************************\r
+*\r
+* History:\r
+*\r
+* 04.03.06 mifi First Version\r
+* This version based on an example from Ethernut and\r
+* "ARM Cross Development with Eclipse" from James P. Lynch\r
+*\r
+* 26.01.08 mifi Change the code of the init section. Here I have used\r
+* some of the source from the Anglia startup.s\r
+* Author: Spencer Oliver (www.anglia-designs.com)\r
+****************************************************************************/\r
+\r
+/*\r
+ * Some defines for the program status registers\r
+ */\r
+ ARM_MODE_USER = 0x10 /* Normal User Mode */ \r
+ ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */\r
+ ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */\r
+ ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */\r
+ ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */\r
+ ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */\r
+ ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */\r
+ ARM_MODE_MASK = 0x1F\r
+ \r
+ I_BIT = 0x80 /* disable IRQ when I bit is set */\r
+ F_BIT = 0x40 /* disable IRQ when I bit is set */\r
+ \r
+/*\r
+ * Register Base Address\r
+ */\r
+ PRCCU_BASE = 0xA0000000\r
+ RCCU_CFR = 0x08\r
+ RCCU_PLL1CR = 0x18\r
+ PCU_MDIVR = 0x40\r
+ PCU_PDIVR = 0x44\r
+ PCU_BOOTCR = 0x50\r
+ \r
+ \r
+ .section .vectors,"ax"\r
+ .code 32\r
+ \r
+/****************************************************************************/\r
+/* Vector table and reset entry */\r
+/****************************************************************************/\r
+_vectors:\r
+ ldr pc, ResetAddr /* Reset */\r
+ ldr pc, UndefAddr /* Undefined instruction */\r
+ ldr pc, SWIAddr /* Software interrupt */\r
+ ldr pc, PAbortAddr /* Prefetch abort */\r
+ ldr pc, DAbortAddr /* Data abort */\r
+ ldr pc, ReservedAddr /* Reserved */\r
+ ldr pc, IRQAddr /* IRQ interrupt */\r
+ ldr pc, FIQAddr /* FIQ interrupt */\r
+\r
+\r
+ResetAddr: .word ResetHandler\r
+UndefAddr: .word UndefHandler\r
+SWIAddr: .word SWIHandler\r
+PAbortAddr: .word PAbortHandler\r
+DAbortAddr: .word DAbortHandler\r
+ReservedAddr: .word 0\r
+IRQAddr: .word IRQHandler\r
+FIQAddr: .word FIQHandler\r
+\r
+ .ltorg\r
+\r
+\r
+ .section .init, "ax"\r
+ .code 32\r
+ \r
+ .global ResetHandler\r
+ .global ExitFunction\r
+ .extern main\r
+/****************************************************************************/\r
+/* Reset handler */\r
+/****************************************************************************/\r
+ResetHandler:\r
+/*\r
+ * Wait for the oscillator is stable\r
+ */ \r
+ nop\r
+ nop\r
+ nop\r
+ nop\r
+ nop\r
+ nop\r
+ nop\r
+ nop\r
+ \r
+/*\r
+ * Setup STR71X, for more information about the register\r
+ * take a look in the STR71x Microcontroller Reference Manual.\r
+ *\r
+ * Reference is made to: Rev. 6 March 2005\r
+ * \r
+ * 1. Map internal RAM to address 0\r
+ * In this case, we are running always in the RAM\r
+ * this make no sence. But if we are in flash, we\r
+ * can copy the interrupt vectors into the ram and\r
+ * switch to RAM mode.\r
+ *\r
+ * 2. Setup the PLL, the eval board HITEX STR7 is equipped\r
+ * with an external 16MHz oscillator. We want:\r
+ *\r
+ * RCLK: 32MHz = (CLK2 * 16) / 4\r
+ * MCLK: 32Mhz\r
+ * PCLK1: 32MHz\r
+ * PCLK2: 32MHz\r
+ *\r
+ */ \r
+ \r
+ /* \r
+ * 1. Map RAM to the boot memory 0x00000000\r
+ */\r
+ ldr r0, =PRCCU_BASE\r
+ ldr r1, =0x01C2 \r
+ str r1, [r0, #PCU_BOOTCR] \r
+ \r
+ \r
+ /*\r
+ * 2. Setup PLL start\r
+ */\r
+ \r
+ /* Set the prescaling factor for APB and APB1 group */\r
+ ldr r0, =PRCCU_BASE\r
+ ldr r1, =0x0000 /* no prescaling PCLKx = RCLK */ \r
+ str r1, [r0, #PCU_PDIVR] \r
+\r
+ /* Set the prescaling factor for the Main System Clock MCLK */\r
+ ldr r0, =PRCCU_BASE\r
+ ldr r1, =0x0000 /* no prescaling MCLK = RCLK\r
+ str r1, [r0, #PCU_MDIVR] \r
+ \r
+ /* Configure the PLL1 ( * 16 , / 4 ) */\r
+ ldr r0, =PRCCU_BASE\r
+ ldr r1, =0x0073 \r
+ str r1, [r0, #RCCU_PLL1CR] \r
+\r
+ /* Check if the PLL is locked */\r
+pll_lock_loop:\r
+ ldr r1, [r0, #RCCU_CFR]\r
+ tst r1, #0x0002\r
+ beq pll_lock_loop\r
+ \r
+ /* Select PLL1_Output as RCLK clock */\r
+ ldr r0, =PRCCU_BASE\r
+ ldr r1, =0x8009 \r
+ str r1, [r0, #RCCU_CFR] \r
+ \r
+ /*\r
+ * Setup PLL end\r
+ */\r
+ \r
+ \r
+ /*\r
+ * Setup a stack for each mode\r
+ */ \r
+ msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */ \r
+ ldr sp, =__stack_und_end__\r
+ \r
+ msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */\r
+ ldr sp, =__stack_abt_end__\r
+ \r
+ msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */ \r
+ ldr sp, =__stack_fiq_end__\r
+ \r
+ msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */ \r
+ ldr sp, =__stack_irq_end__\r
+ \r
+ msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */\r
+ ldr sp, =__stack_svc_end__\r
+\r
+ \r
+ /*\r
+ * Now init all the sections\r
+ */\r
+\r
+\r
+ /* \r
+ * Relocate .data section (Copy from ROM to RAM) \r
+ */\r
+ ldr r1, =_etext\r
+ ldr r2, =__data_start\r
+ ldr r3, =_edata\r
+LoopRel:\r
+ cmp r2, r3\r
+ ldrlo r0, [r1], #4\r
+ strlo r0, [r2], #4\r
+ blo LoopRel\r
+\r
+\r
+ /* \r
+ * Clear .bss section (Zero init) \r
+ */\r
+ mov r0, #0\r
+ ldr r1, =__bss_start__\r
+ ldr r2, =__bss_end__\r
+LoopZI:\r
+ cmp r1, r2\r
+ strlo r0, [r1], #4\r
+ blo LoopZI\r
+\r
+ \r
+ /* \r
+ * Call C++ constructors \r
+ */\r
+ ldr r0, =__ctors_start__\r
+ ldr r1, =__ctors_end__\r
+ctor_loop:\r
+ cmp r0, r1\r
+ beq ctor_end\r
+ ldr r2, [r0], #4\r
+ stmfd sp!, {r0-r1}\r
+ mov lr, pc\r
+ mov pc, r2\r
+ ldmfd sp!, {r0-r1}\r
+ b ctor_loop\r
+ctor_end:\r
+ \r
+ \r
+ /*\r
+ * Jump to main\r
+ */\r
+ mrs r0, cpsr\r
+ bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */\r
+ msr cpsr, r0\r
+ \r
+ mov r0, #0 /* No arguments */\r
+ mov r1, #0 /* No arguments */\r
+ ldr r2, =main\r
+ mov lr, pc\r
+ bx r2 /* And jump... */\r
+ \r
+ExitFunction:\r
+ nop\r
+ nop\r
+ nop\r
+ b ExitFunction \r
+ \r
+\r
+/****************************************************************************/\r
+/* Default interrupt handler */\r
+/****************************************************************************/\r
+\r
+UndefHandler:\r
+ b UndefHandler\r
+ \r
+SWIHandler:\r
+ b SWIHandler\r
+\r
+PAbortHandler:\r
+ b PAbortHandler\r
+\r
+DAbortHandler:\r
+ b DAbortHandler\r
+ \r
+IRQHandler:\r
+ b IRQHandler\r
+ \r
+FIQHandler:\r
+ b FIQHandler\r
+ \r
+ .weak ExitFunction\r
+ .weak UndefHandler, PAbortHandler, DAbortHandler\r
+ .weak IRQHandler, FIQHandler\r
+\r
+ .ltorg\r
+/*** EOF ***/ \r
+ \r
+\r
\ No newline at end of file
--- /dev/null
+/****************************************************************************\r
+* Copyright (c) 2006 by Michael Fischer. All rights reserved.\r
+*\r
+* Redistribution and use in source and binary forms, with or without \r
+* modification, are permitted provided that the following conditions \r
+* are met:\r
+* \r
+* 1. Redistributions of source code must retain the above copyright \r
+* notice, this list of conditions and the following disclaimer.\r
+* 2. Redistributions in binary form must reproduce the above copyright\r
+* notice, this list of conditions and the following disclaimer in the \r
+* documentation and/or other materials provided with the distribution.\r
+* 3. Neither the name of the author nor the names of its contributors may \r
+* be used to endorse or promote products derived from this software \r
+* without specific prior written permission.\r
+*\r
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \r
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT \r
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS \r
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL \r
+* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, \r
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, \r
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS \r
+* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED \r
+* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, \r
+* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF \r
+* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF \r
+* SUCH DAMAGE.\r
+*\r
+****************************************************************************\r
+* History:\r
+*\r
+* 30.03.06 mifi First Version for Insight tutorial\r
+* 26.01.08 mifi Added variable "d" to test const variable.\r
+****************************************************************************/\r
+#define __MAIN_C__\r
+\r
+/*\r
+ * I use the include only, to show\r
+ * how to setup a include dir in the makefile\r
+ */\r
+#include "typedefs.h"\r
+\r
+/*=========================================================================*/\r
+/* DEFINE: All Structures and Common Constants */\r
+/*=========================================================================*/\r
+\r
+/*=========================================================================*/\r
+/* DEFINE: Prototypes */\r
+/*=========================================================================*/\r
+\r
+/*=========================================================================*/\r
+/* DEFINE: Definition of all local Data */\r
+/*=========================================================================*/\r
+static const DWORD d = 7;\r
+\r
+/*=========================================================================*/\r
+/* DEFINE: Definition of all local Procedures */\r
+/*=========================================================================*/\r
+\r
+/*=========================================================================*/\r
+/* DEFINE: All code exported */\r
+/*=========================================================================*/\r
+/***************************************************************************/\r
+/* main */\r
+/***************************************************************************/\r
+int main (void)\r
+{\r
+ DWORD a = 1;\r
+ DWORD b = 2;\r
+ DWORD c = 0;\r
+ \r
+ a = a + d;\r
+ \r
+ while (1)\r
+ {\r
+ a++;\r
+ b++;\r
+ c = a + b;\r
+ }\r
+ \r
+ /*\r
+ * This return here make no sense.\r
+ * But to prevent the compiler warning:\r
+ * "return type of 'main' is not 'int'\r
+ * we use an int as return :-)\r
+ */ \r
+ return(0);\r
+}\r
+\r
+/*** EOF ***/\r
Code Review / openocd.git / commitdiff