Fix several format specifiers errors exposed by arm-none-eabi 19/2719/2
authorPaul Fertser <fercerpav@gmail.com>
Sun, 15 Mar 2015 07:18:55 +0000 (10:18 +0300)
committerPaul Fertser <fercerpav@gmail.com>
Thu, 16 Apr 2015 19:24:50 +0000 (20:24 +0100)
Change-Id: I1fe5c5c0b22cc23deedcf13ad5183c957551a1b7
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2719
Tested-by: jenkins
src/flash/nor/at91samd.c
src/flash/nor/lpc2000.c
src/flash/nor/nrf51.c
src/flash/nor/sim3x.c
src/flash/nor/stellaris.c
src/target/arm_adi_v5.c
src/target/cortex_a.c
src/target/mips_ejtag.c

index de0f1cc..e80cf92 100644 (file)
@@ -976,8 +976,8 @@ COMMAND_HANDLER(samd_handle_bootloader_command)
                                        nb = (2 << (8 - size)) * page_size;
 
                                /* There are 4 pages per row */
-                               command_print(CMD_CTX, "Bootloader size is %u bytes (%u rows)",
-                                          nb, nb / (page_size * 4));
+                               command_print(CMD_CTX, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)",
+                                          nb, (uint32_t)(nb / (page_size * 4)));
                        }
                }
        }
index 0247e66..8340aea 100644 (file)
@@ -1450,7 +1450,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank)
                        break;
 
                default:
-                       LOG_ERROR("BUG: unknown Part ID encountered: 0x%x", part_id);
+                       LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id);
                        exit(-1);
        }
 
@@ -1472,7 +1472,7 @@ static int lpc2000_probe(struct flash_bank *bank)
                        status = get_lpc2000_part_id(bank, &part_id);
                        if (status == LPC2000_CMD_SUCCESS)
                                LOG_INFO("If auto-detection fails for this part, please email "
-                                       "openocd-devel@lists.sourceforge.net, citing part id 0x%x.\n", part_id);
+                                       "openocd-devel@lists.sourceforge.net, citing part id 0x%" PRIx32 ".\n", part_id);
                }
 
                lpc2000_build_sector_list(bank);
index 34297ef..351a86e 100644 (file)
@@ -709,7 +709,7 @@ static int nrf51_erase_page(struct flash_bank *bank,
 
        LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset);
        if (sector->is_protected) {
-               LOG_ERROR("Cannot erase protected sector at 0x%x", sector->offset);
+               LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset);
                return ERROR_FAIL;
        }
 
index 867d0ca..7ec0076 100644 (file)
@@ -512,8 +512,8 @@ static int sim3x_flash_write(struct flash_bank *bank, const uint8_t * buffer, ui
                                        "for padding buffer");
                        return ERROR_FAIL;
                }
-               LOG_INFO("odd number of bytes to write (%d), extending to %d "
-                               "and padding with 0xff", old_count, count);
+               LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32
+                               " and padding with 0xff", old_count, count);
 
                new_buffer[count - 1] = 0xff;
                buffer = memcpy(new_buffer, buffer, old_count);
index 27b6632..451f19b 100644 (file)
@@ -507,12 +507,12 @@ static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
        printed = snprintf(buf,
                           buf_size,
                           "did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
-                          ", eproc: %s, ramsize: %ik, flashsize: %ik\n",
+                          ", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n",
                           stellaris_info->did1,
                           stellaris_info->did1,
                           "ARMv7M",
                           stellaris_info->sramsiz,
-                          stellaris_info->num_pages * stellaris_info->pagesize / 1024);
+                          (uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024));
        buf += printed;
        buf_size -= printed;
 
index 3df39f9..f7e58d0 100644 (file)
@@ -992,7 +992,7 @@ static int dap_rom_display(struct command_context *cmd_ctx,
                        uint32_t c_cid0, c_cid1, c_cid2, c_cid3;
                        uint32_t c_pid0, c_pid1, c_pid2, c_pid3, c_pid4;
                        uint32_t component_base;
-                       unsigned part_num;
+                       uint32_t part_num;
                        const char *type, *full;
 
                        component_base = (dbgbase & 0xFFFFF000) + (romentry & 0xFFFFF000);
index 7ecf428..ed9b2b2 100644 (file)
@@ -238,7 +238,7 @@ static int cortex_a_init_debug_access(struct target *target)
           the registers in the Core Power Domain */
        retval = mem_ap_sel_read_atomic_u32(swjdp, armv7a->debug_ap,
                        armv7a->debug_base + CPUDBG_PRSR, &dbg_osreg);
-       LOG_DEBUG("target->coreid %d DBGPRSR  0x%x ", target->coreid, dbg_osreg);
+       LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR  0x%" PRIx32, target->coreid, dbg_osreg);
 
        if (retval != ERROR_OK)
                return retval;
@@ -2954,7 +2954,7 @@ static int cortex_a_examine_first(struct target *target)
        if (retval != ERROR_OK)
                return retval;
 
-       LOG_DEBUG("target->coreid %d DBGPRSR  0x%" PRIx32, target->coreid, dbg_osreg);
+       LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR  0x%" PRIx32, target->coreid, dbg_osreg);
 
        armv7a->arm.core_type = ARM_MODE_MON;
        retval = cortex_a_dpm_setup(cortex_a, didr);
index f6cd451..2a16193 100644 (file)
@@ -352,9 +352,9 @@ static void ejtag_v20_print_imp(struct mips_ejtag *ejtag_info)
                EJTAG_IMP_HAS(EJTAG_V20_IMP_NOPB) ? " noPB" : " PB",
                EJTAG_IMP_HAS(EJTAG_V20_IMP_NODB) ? " noDB" : " DB",
                EJTAG_IMP_HAS(EJTAG_V20_IMP_NOIB) ? " noIB" : " IB");
-       LOG_DEBUG("EJTAG v2.0: Break Channels: %i",
-               (ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) &
-               EJTAG_V20_IMP_BCHANNELS_MASK);
+       LOG_DEBUG("EJTAG v2.0: Break Channels: %" PRIu8,
+               (uint8_t)((ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) &
+               EJTAG_V20_IMP_BCHANNELS_MASK));
 }
 
 static void ejtag_v26_print_imp(struct mips_ejtag *ejtag_info)