return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
arm7_9->wp_available--;
-
+
/* pick a breakpoint unit */
if (!arm7_9->wp0_used)
{
{
if ((retval=arm7_9_set_software_breakpoints(arm7_9))!=ERROR_OK)
return retval;
-
+
/* did we already set this breakpoint? */
if (breakpoint->set)
return ERROR_OK;
-
+
if (breakpoint->length == 4)
{
u32 verify = 0xffffffff;
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
-
+
if (arm7_9->breakpoint_count==0)
{
- /* make sure we don't have any dangling breakpoints. This is vital upon
- * GDB connect/disconnect
+ /* make sure we don't have any dangling breakpoints. This is vital upon
+ * GDB connect/disconnect
*/
- arm7_9_clear_watchpoints(arm7_9);
+ arm7_9_clear_watchpoints(arm7_9);
}
if ((breakpoint->type == BKPT_HARD) && (arm7_9->wp_available < 1))
if (breakpoint->type == BKPT_HARD)
{
arm7_9->wp_available--;
-
+
if (!arm7_9->wp0_used)
{
arm7_9->wp0_used = 1;
LOG_ERROR("BUG: no hardware comparator available");
}
}
-
+
arm7_9->breakpoint_count++;
-
+
return arm7_9_set_breakpoint(target, breakpoint);
}
if (breakpoint->type == BKPT_HARD)
arm7_9->wp_available++;
-
+
arm7_9->breakpoint_count--;
if (arm7_9->breakpoint_count==0)
{
/* make sure we don't have any dangling breakpoints */
- arm7_9_clear_watchpoints(arm7_9);
+ arm7_9_clear_watchpoints(arm7_9);
}
return ERROR_OK;
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- LOG_DEBUG("target->state: %s",
+ LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
if (!(jtag_reset_config & RESET_HAS_SRST))
/* debug entry was already prepared in arm7_9_assert_reset() */
target->debug_reason = DBG_REASON_DBGRQ;
}
-
+
return ERROR_OK;
}
int arm7_9_deassert_reset(target_t *target)
{
int retval=ERROR_OK;
- LOG_DEBUG("target->state: %s",
+ LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
{
return retval;
}
-
+
if ((retval=target_halt(target))!=ERROR_OK)
{
return retval;
}
-
+
}
return retval;
}
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
- LOG_DEBUG("target->state: %s",
+ LOG_DEBUG("target->state: %s",
Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
if (target->state == TARGET_HALTED)
reg[0] = address;
arm7_9->write_core_regs(target, 0x1, reg);
+ int j=0;
+
switch (size)
{
case 4:
/* advance buffer, count number of accesses */
buffer += thisrun_accesses * 4;
num_accesses += thisrun_accesses;
+
+ if ((j++%1024)==0)
+ {
+ keep_alive();
+ }
}
break;
case 2:
/* advance buffer, count number of accesses */
buffer += thisrun_accesses * 2;
num_accesses += thisrun_accesses;
+
+ if ((j++%1024)==0)
+ {
+ keep_alive();
+ }
}
break;
case 1:
/* advance buffer, count number of accesses */
buffer += thisrun_accesses * 1;
num_accesses += thisrun_accesses;
+
+ if ((j++%1024)==0)
+ {
+ keep_alive();
+ }
}
break;
default:
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
+ * Copyright (C) 2008 by Oyvind Harboe *
+ * oyvind.harboe@zylin.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
#include <string.h>
#include <unistd.h>
-bitfield_desc_t armv4_5_psr_bitfield_desc[] =
+bitfield_desc_t armv4_5_psr_bitfield_desc[] =
{
{"M[4:0]", 5},
{"T", 1},
char* armv4_5_core_reg_list[] =
{
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13_usr", "lr_usr", "pc",
-
+
"r8_fiq", "r9_fiq", "r10_fiq", "r11_fiq", "r12_fiq", "r13_fiq", "lr_fiq",
-
+
"r13_irq", "lr_irq",
-
+
"r13_svc", "lr_svc",
-
+
"r13_abt", "lr_abt",
-
+
"r13_und", "lr_und",
-
+
"cpsr", "spsr_fiq", "spsr_irq", "spsr_svc", "spsr_abt", "spsr_und"
};
int armv4_5_core_reg_arch_type = -1;
-armv4_5_core_reg_t armv4_5_core_reg_list_arch_info[] =
+armv4_5_core_reg_t armv4_5_core_reg_list_arch_info[] =
{
{0, ARMV4_5_MODE_ANY, NULL, NULL},
{1, ARMV4_5_MODE_ANY, NULL, NULL},
{13, ARMV4_5_MODE_USR, NULL, NULL},
{14, ARMV4_5_MODE_USR, NULL, NULL},
{15, ARMV4_5_MODE_ANY, NULL, NULL},
-
+
{8, ARMV4_5_MODE_FIQ, NULL, NULL},
{9, ARMV4_5_MODE_FIQ, NULL, NULL},
{10, ARMV4_5_MODE_FIQ, NULL, NULL},
{12, ARMV4_5_MODE_FIQ, NULL, NULL},
{13, ARMV4_5_MODE_FIQ, NULL, NULL},
{14, ARMV4_5_MODE_FIQ, NULL, NULL},
-
+
{13, ARMV4_5_MODE_IRQ, NULL, NULL},
{14, ARMV4_5_MODE_IRQ, NULL, NULL},
{13, ARMV4_5_MODE_ABT, NULL, NULL},
{14, ARMV4_5_MODE_ABT, NULL, NULL},
-
+
{13, ARMV4_5_MODE_UND, NULL, NULL},
{14, ARMV4_5_MODE_UND, NULL, NULL},
-
+
{16, ARMV4_5_MODE_ANY, NULL, NULL},
{16, ARMV4_5_MODE_FIQ, NULL, NULL},
{16, ARMV4_5_MODE_IRQ, NULL, NULL},
int retval;
armv4_5_core_reg_t *armv4_5 = reg->arch_info;
target_t *target = armv4_5->target;
-
+
if (target->state != TARGET_HALTED)
{
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
-
+
/* retval = armv4_5->armv4_5_common->full_context(target); */
retval = armv4_5->armv4_5_common->read_core_reg(target, armv4_5->num, armv4_5->mode);
-
+
return retval;
}
target_t *target = armv4_5->target;
armv4_5_common_t *armv4_5_target = target->arch_info;
u32 value = buf_get_u32(buf, 0, 32);
-
+
if (target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
-
+
if (reg == &armv4_5_target->core_cache->reg_list[ARMV4_5_CPSR])
{
if (value & 0x20)
{
/* change state to Thumb */
LOG_DEBUG("changing to Thumb state");
- armv4_5_target->core_state = ARMV4_5_STATE_THUMB;
+ armv4_5_target->core_state = ARMV4_5_STATE_THUMB;
}
}
else
{
/* change state to ARM */
LOG_DEBUG("changing to ARM state");
- armv4_5_target->core_state = ARMV4_5_STATE_ARM;
+ armv4_5_target->core_state = ARMV4_5_STATE_ARM;
}
}
-
+
if (armv4_5_target->core_mode != (value & 0x1f))
{
LOG_DEBUG("changing ARM core mode to '%s'", armv4_5_mode_strings[armv4_5_mode_to_number(value & 0x1f)]);
armv4_5_target->write_core_reg(target, 16, ARMV4_5_MODE_ANY, value);
}
}
-
+
buf_set_u32(reg->value, 0, 32, value);
reg->dirty = 1;
reg->valid = 1;
{
armv4_5_common_t *armv4_5 = target->arch_info;
int i;
-
+
for (i = 0; i < 37; i++)
{
armv4_5->core_cache->reg_list[i].valid = 0;
armv4_5->core_cache->reg_list[i].dirty = 0;
}
-
+
return ERROR_OK;
}
reg_t *reg_list = malloc(sizeof(reg_t) * num_regs);
armv4_5_core_reg_t *arch_info = malloc(sizeof(armv4_5_core_reg_t) * num_regs);
int i;
-
+
cache->name = "arm v4/5 registers";
cache->next = NULL;
cache->reg_list = reg_list;
cache->num_regs = num_regs;
-
+
if (armv4_5_core_reg_arch_type == -1)
armv4_5_core_reg_arch_type = register_reg_arch_type(armv4_5_get_core_reg, armv4_5_set_core_reg);
-
+
for (i = 0; i < 37; i++)
{
arch_info[i] = armv4_5_core_reg_list_arch_info[i];
reg_list[i].arch_type = armv4_5_core_reg_arch_type;
reg_list[i].arch_info = &arch_info[i];
}
-
+
return cache;
}
int armv4_5_arch_state(struct target_s *target)
{
armv4_5_common_t *armv4_5 = target->arch_info;
-
+
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
LOG_ERROR("BUG: called for a non-ARMv4/5 target");
exit(-1);
}
-
+
LOG_USER("target halted in %s state due to %s, current mode: %s\ncpsr: 0x%8.8x pc: 0x%8.8x",
armv4_5_state_strings[armv4_5->core_state],
Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name,
armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
-
+
return ERROR_OK;
}
int mode, num;
target_t *target = get_current_target(cmd_ctx);
armv4_5_common_t *armv4_5 = target->arch_info;
-
+
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
command_print(cmd_ctx, "current target isn't an ARMV4/5 target");
return ERROR_OK;
}
-
+
if (target->state != TARGET_HALTED)
{
command_print(cmd_ctx, "error: target must be halted for register accesses");
return ERROR_OK;
}
-
+
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
{
armv4_5->full_context(target);
}
- output_len += snprintf(output + output_len, 128 - output_len, "%8s: %8.8x ", ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).name,
+ output_len += snprintf(output + output_len, 128 - output_len, "%8s: %8.8x ", ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).name,
buf_get_u32(ARMV4_5_CORE_REG_MODENUM(armv4_5->core_cache, mode, num).value, 0, 32));
}
command_print(cmd_ctx, output);
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_SPSR_SVC].value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_SPSR_ABT].value, 0, 32),
buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_SPSR_UND].value, 0, 32));
-
+
return ERROR_OK;
}
{
target_t *target = get_current_target(cmd_ctx);
armv4_5_common_t *armv4_5 = target->arch_info;
-
+
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
command_print(cmd_ctx, "current target isn't an ARMV4/5 target");
return ERROR_OK;
}
-
+
if (argc > 0)
{
if (strcmp(args[0], "arm") == 0)
armv4_5->core_state = ARMV4_5_STATE_THUMB;
}
}
-
+
command_print(cmd_ctx, "core state: %s", armv4_5_state_strings[armv4_5->core_state]);
-
+
return ERROR_OK;
}
arm_instruction_t cur_instruction;
u32 opcode;
int thumb = 0;
-
+
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
{
command_print(cmd_ctx, "current target isn't an ARMV4/5 target");
return ERROR_OK;
}
-
+
if (argc < 2)
{
command_print(cmd_ctx, "usage: armv4_5 disassemble <address> <count> ['thumb']");
return ERROR_OK;
}
-
+
address = strtoul(args[0], NULL, 0);
count = strtoul(args[1], NULL, 0);
-
+
if (argc >= 3)
if (strcmp(args[2], "thumb") == 0)
thumb = 1;
-
+
for (i = 0; i < count; i++)
{
target_read_u32(target, address, &opcode);
command_print(cmd_ctx, "%s", cur_instruction.text);
address += (thumb) ? 2 : 4;
}
-
+
return ERROR_OK;
}
command_t *armv4_5_cmd;
armv4_5_cmd = register_command(cmd_ctx, NULL, "armv4_5", NULL, COMMAND_ANY, "armv4/5 specific commands");
-
+
register_command(cmd_ctx, armv4_5_cmd, "reg", handle_armv4_5_reg_command, COMMAND_EXEC, "display ARM core registers");
register_command(cmd_ctx, armv4_5_cmd, "core_state", handle_armv4_5_core_state_command, COMMAND_EXEC, "display/change ARM core state <arm|thumb>");
-
+
register_command(cmd_ctx, armv4_5_cmd, "disassemble", handle_armv4_5_disassemble_command, COMMAND_EXEC, "disassemble instructions <address> <count> ['thumb']");
return ERROR_OK;
}
{
armv4_5_common_t *armv4_5 = target->arch_info;
int i;
-
+
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
-
+
*reg_list_size = 26;
*reg_list = malloc(sizeof(reg_t*) * (*reg_list_size));
-
+
for (i = 0; i < 16; i++)
{
(*reg_list)[i] = &ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i);
}
-
+
for (i = 16; i < 24; i++)
{
(*reg_list)[i] = &armv4_5_gdb_dummy_fp_reg;
}
-
+
(*reg_list)[24] = &armv4_5_gdb_dummy_fps_reg;
(*reg_list)[25] = &armv4_5->core_cache->reg_list[ARMV4_5_CPSR];
-
+
return ERROR_OK;
}
int i;
int retval = ERROR_OK;
LOG_DEBUG("Running algorithm");
-
+
if (armv4_5_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC)
{
LOG_ERROR("current target isn't an ARMV4/5 target");
return ERROR_TARGET_INVALID;
}
-
+
if (target->state != TARGET_HALTED)
{
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
-
+
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
context[i] = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32);
}
cpsr = buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32);
-
+
for (i = 0; i < num_mem_params; i++)
{
target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
}
-
+
for (i = 0; i < num_reg_params; i++)
{
reg_t *reg = register_get_by_name(armv4_5->core_cache, reg_params[i].reg_name, 0);
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
exit(-1);
}
-
+
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
exit(-1);
}
-
+
armv4_5_set_core_reg(reg, reg_params[i].value);
}
-
+
armv4_5->core_state = armv4_5_algorithm_info->core_state;
if (armv4_5->core_state == ARMV4_5_STATE_ARM)
exit_breakpoint_size = 4;
LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
exit(-1);
}
-
+
if (armv4_5_algorithm_info->core_mode != ARMV4_5_MODE_ANY)
{
LOG_DEBUG("setting core_mode: 0x%2.2x", armv4_5_algorithm_info->core_mode);
LOG_ERROR("can't add breakpoint to finish algorithm execution");
return ERROR_TARGET_FAILURE;
}
-
+
target_resume(target, 0, entry_point, 1, 1);
-
+
target_wait_state(target, TARGET_HALTED, timeout_ms);
if (target->state != TARGET_HALTED)
{
}
return ERROR_TARGET_TIMEOUT;
}
-
+
if (buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point)
{
LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x",
- buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
+ buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
return ERROR_TARGET_TIMEOUT;
}
-
+
breakpoint_remove(target, exit_point);
-
+
for (i = 0; i < num_mem_params; i++)
{
if (mem_params[i].direction != PARAM_OUT)
target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
}
-
+
for (i = 0; i < num_reg_params; i++)
{
if (reg_params[i].direction != PARAM_OUT)
{
-
+
reg_t *reg = register_get_by_name(armv4_5->core_cache, reg_params[i].reg_name, 0);
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
exit(-1);
}
-
+
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
exit(-1);
}
-
+
buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32));
}
}
-
+
for (i = 0; i <= 16; i++)
{
LOG_DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]);
buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32, cpsr);
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
-
+
armv4_5->core_state = core_state;
armv4_5->core_mode = core_mode;
}
int armv4_5_init_arch_info(target_t *target, armv4_5_common_t *armv4_5)
-{
+{
target->arch_info = armv4_5;
armv4_5->common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5->core_state = ARMV4_5_STATE_ARM;
armv4_5->core_mode = ARMV4_5_MODE_USR;
-
+
return ERROR_OK;
}
/* convert ELF header field to host endianness */
#define field16(elf,field)\
((elf->endianness==ELFDATA2LSB)? \
- le_to_h_u16((u8*)&field):be_to_h_u16((u8*)&field))
+ le_to_h_u16((u8*)&field):be_to_h_u16((u8*)&field))
#define field32(elf,field)\
((elf->endianness==ELFDATA2LSB)? \
- le_to_h_u32((u8*)&field):be_to_h_u32((u8*)&field))
+ le_to_h_u32((u8*)&field):be_to_h_u32((u8*)&field))
static int autodetect_image_type(image_t *image, char *url)
{
fileio_t fileio;
u32 read_bytes;
u8 buffer[9];
-
+
/* read the first 4 bytes of image */
if ((retval = fileio_open(&fileio, url, FILEIO_READ, FILEIO_BINARY)) != ERROR_OK)
{
return retval;
}
retval = fileio_read(&fileio, 9, buffer, &read_bytes);
-
+
if (retval==ERROR_OK)
{
if (read_bytes != 9)
}
}
fileio_close(&fileio);
-
+
if (retval!=ERROR_OK)
return retval;
{
return autodetect_image_type(image, url);
}
-
+
return ERROR_OK;
}
u32 cooked_bytes;
int i;
char lpszLine[1023];
-
+
/* we can't determine the number of sections that we'll have to create ahead of time,
* so we locally hold them until parsing is finished */
image_section_t section[IMAGE_MAX_SECTIONS];
section[image->num_sections].base_address = 0x0;
section[image->num_sections].size = 0x0;
section[image->num_sections].flags = 0;
-
+
while (fileio_fgets(fileio, 1023, lpszLine) == ERROR_OK)
{
u32 count;
u32 checksum;
u8 cal_checksum = 0;
u32 bytes_read = 0;
-
+
if (sscanf(&lpszLine[bytes_read], ":%2x%4x%2x", &count, &address, &record_type) != 3)
{
return ERROR_IMAGE_FORMAT_ERROR;
}
bytes_read += 9;
-
+
cal_checksum += (u8)count;
cal_checksum += (u8)(address >> 8);
cal_checksum += (u8)address;
cal_checksum += (u8)record_type;
-
+
if (record_type == 0) /* Data Record */
{
if ((full_address & 0xffff) != address)
(full_address & 0xffff0000) | address;
full_address = (full_address & 0xffff0000) | address;
}
-
+
while (count-- > 0)
{
sscanf(&lpszLine[bytes_read], "%2x", (u32*)&ihex->buffer[cooked_bytes]);
{
/* finish the current section */
image->num_sections++;
-
+
/* copy section information */
image->sections = malloc(sizeof(image_section_t) * image->num_sections);
for (i = 0; i < image->num_sections; i++)
image->sections[i].size = section[i].size;
image->sections[i].flags = section[i].flags;
}
-
+
return ERROR_OK;
}
else if (record_type == 2) /* Linear Address Record */
{
u16 upper_address;
-
+
sscanf(&lpszLine[bytes_read], "%4hx", &upper_address);
cal_checksum += (u8)(upper_address >> 8);
cal_checksum += (u8)upper_address;
bytes_read += 4;
-
+
if ((full_address >> 4) != upper_address)
{
/* we encountered a nonconsecutive location, create a new section,
section[image->num_sections].flags = 0;
section[image->num_sections].private = &ihex->buffer[cooked_bytes];
}
- section[image->num_sections].base_address =
+ section[image->num_sections].base_address =
(full_address & 0xffff) | (upper_address << 4);
full_address = (full_address & 0xffff) | (upper_address << 4);
}
else if (record_type == 3) /* Start Segment Address Record */
{
u32 dummy;
-
+
/* "Start Segment Address Record" will not be supported */
/* but we must consume it, and do not create an error. */
while (count-- > 0)
else if (record_type == 4) /* Extended Linear Address Record */
{
u16 upper_address;
-
+
sscanf(&lpszLine[bytes_read], "%4hx", &upper_address);
cal_checksum += (u8)(upper_address >> 8);
cal_checksum += (u8)upper_address;
bytes_read += 4;
-
+
if ((full_address >> 16) != upper_address)
{
/* we encountered a nonconsecutive location, create a new section,
section[image->num_sections].flags = 0;
section[image->num_sections].private = &ihex->buffer[cooked_bytes];
}
- section[image->num_sections].base_address =
+ section[image->num_sections].base_address =
(full_address & 0xffff) | (upper_address << 16);
full_address = (full_address & 0xffff) | (upper_address << 16);
}
else if (record_type == 5) /* Start Linear Address Record */
{
u32 start_address;
-
+
sscanf(&lpszLine[bytes_read], "%8x", &start_address);
cal_checksum += (u8)(start_address >> 24);
cal_checksum += (u8)(start_address >> 16);
cal_checksum += (u8)(start_address >> 8);
cal_checksum += (u8)start_address;
bytes_read += 8;
-
+
image->start_address_set = 1;
image->start_address = be_to_h_u32((u8*)&start_address);
}
LOG_ERROR("unhandled IHEX record type: %i", record_type);
return ERROR_IMAGE_FORMAT_ERROR;
}
-
+
sscanf(&lpszLine[bytes_read], "%2x", &checksum);
bytes_read += 2;
-
+
if ((u8)checksum != (u8)(~cal_checksum + 1))
{
/* checksum failed */
return ERROR_IMAGE_CHECKSUM;
}
}
-
+
LOG_ERROR("premature end of IHEX file, no end-of-file record found");
return ERROR_IMAGE_FORMAT_ERROR;
}
j++;
}
}
-
+
image->start_address_set = 1;
image->start_address = field32(elf,elf->header->e_entry);
int retval;
*size_read = 0;
-
+
LOG_DEBUG("load segment %d at 0x%x (sz=0x%x)",section,offset,size);
/* read initialized data in current segment if any */
if (!size)
return ERROR_OK;
}
-
+
return ERROR_OK;
}
u32 cooked_bytes;
int i;
char lpszLine[1023];
-
+
/* we can't determine the number of sections that we'll have to create ahead of time,
* so we locally hold them until parsing is finished */
image_section_t section[IMAGE_MAX_SECTIONS];
-
+
mot->buffer = malloc(fileio->size >> 1);
cooked_bytes = 0x0;
image->num_sections = 0;
section[image->num_sections].base_address = 0x0;
section[image->num_sections].size = 0x0;
section[image->num_sections].flags = 0;
-
+
while (fileio_fgets(fileio, 1023, lpszLine) == ERROR_OK)
{
u32 count;
u32 checksum;
u8 cal_checksum = 0;
u32 bytes_read = 0;
-
+
/* get record type and record length */
if (sscanf(&lpszLine[bytes_read], "S%1x%2x", &record_type, &count) != 2)
{
return ERROR_IMAGE_FORMAT_ERROR;
}
-
+
bytes_read += 4;
cal_checksum += (u8)count;
-
+
/* skip checksum byte */
count -=1;
-
+
if (record_type == 0)
{
/* S0 - starting record (optional) */
int iValue;
-
+
while (count-- > 0) {
sscanf(&lpszLine[bytes_read], "%2x", &iValue);
cal_checksum += (u8)iValue;
bytes_read += 4;
count -=2;
break;
-
+
case 2:
/* S2 - 24 bit address data record */
sscanf(&lpszLine[bytes_read], "%6x", &address);
bytes_read += 6;
count -=3;
break;
-
+
case 3:
/* S3 - 32 bit address data record */
sscanf(&lpszLine[bytes_read], "%8x", &address);
bytes_read += 8;
count -=4;
break;
-
+
}
-
+
if (full_address != address)
{
/* we encountered a nonconsecutive location, create a new section,
section[image->num_sections].base_address = address;
full_address = address;
}
-
+
while (count-- > 0)
{
sscanf(&lpszLine[bytes_read], "%2x", (u32*)&mot->buffer[cooked_bytes]);
{
/* S5 is the data count record, we ignore it */
u32 dummy;
-
+
while (count-- > 0)
{
sscanf(&lpszLine[bytes_read], "%2x", &dummy);
{
/* S7, S8, S9 - ending records for 32, 24 and 16bit */
image->num_sections++;
-
+
/* copy section information */
image->sections = malloc(sizeof(image_section_t) * image->num_sections);
for (i = 0; i < image->num_sections; i++)
image->sections[i].size = section[i].size;
image->sections[i].flags = section[i].flags;
}
-
+
return ERROR_OK;
}
else
LOG_ERROR("unhandled S19 record type: %i", record_type);
return ERROR_IMAGE_FORMAT_ERROR;
}
-
+
/* account for checksum, will always be 0xFF */
sscanf(&lpszLine[bytes_read], "%2x", &checksum);
cal_checksum += (u8)checksum;
bytes_read += 2;
-
+
if( cal_checksum != 0xFF )
{
/* checksum failed */
return ERROR_IMAGE_CHECKSUM;
}
}
-
+
LOG_ERROR("premature end of S19 file, no end-of-file record found");
return ERROR_IMAGE_FORMAT_ERROR;
}
int image_open(image_t *image, char *url, char *type_string)
{
int retval = ERROR_OK;
-
+
if ((retval = identify_image_type(image, type_string, url)) != ERROR_OK)
{
return retval;
}
-
+
if (image->type == IMAGE_BINARY)
{
image_binary_t *image_binary;
-
+
image_binary = image->type_private = malloc(sizeof(image_binary_t));
-
+
if ((retval = fileio_open(&image_binary->fileio, url, FILEIO_READ, FILEIO_BINARY)) != ERROR_OK)
{
return retval;
}
-
+
image->num_sections = 1;
image->sections = malloc(sizeof(image_section_t));
image->sections[0].base_address = 0x0;
else if (image->type == IMAGE_IHEX)
{
image_ihex_t *image_ihex;
-
+
image_ihex = image->type_private = malloc(sizeof(image_ihex_t));
-
+
if ((retval = fileio_open(&image_ihex->fileio, url, FILEIO_READ, FILEIO_TEXT)) != ERROR_OK)
{
return retval;
}
-
+
if ((retval = image_ihex_buffer_complete(image)) != ERROR_OK)
{
LOG_ERROR("failed buffering IHEX image, check daemon output for additional information");
else if (image->type == IMAGE_ELF)
{
image_elf_t *image_elf;
-
+
image_elf = image->type_private = malloc(sizeof(image_elf_t));
-
+
if ((retval = fileio_open(&image_elf->fileio, url, FILEIO_READ, FILEIO_BINARY)) != ERROR_OK)
{
return retval;
}
-
+
if ((retval = image_elf_read_headers(image)) != ERROR_OK)
{
fileio_close(&image_elf->fileio);
else if (image->type == IMAGE_MEMORY)
{
image_memory_t *image_memory;
-
+
image->num_sections = 1;
image->sections = malloc(sizeof(image_section_t));
image->sections[0].base_address = 0x0;
image->sections[0].size = 0xffffffff;
image->sections[0].flags = 0;
-
+
image_memory = image->type_private = malloc(sizeof(image_memory_t));
-
+
image_memory->target = get_target_by_num(strtoul(url, NULL, 0));;
image_memory->cache = NULL;
image_memory->cache_address = 0x0;
else if (image->type == IMAGE_SRECORD)
{
image_mot_t *image_mot;
-
+
image_mot = image->type_private = malloc(sizeof(image_mot_t));
-
+
if ((retval = fileio_open(&image_mot->fileio, url, FILEIO_READ, FILEIO_TEXT)) != ERROR_OK)
{
return retval;
}
-
+
if ((retval = image_mot_buffer_complete(image)) != ERROR_OK)
{
LOG_ERROR("failed buffering S19 image, check daemon output for additional information");
image->base_address=0;
image->base_address_set=0;
}
-
+
return retval;
};
if (image->type == IMAGE_BINARY)
{
image_binary_t *image_binary = image->type_private;
-
+
/* only one section in a plain binary */
if (section != 0)
return ERROR_INVALID_ARGUMENTS;
-
+
/* seek to offset */
if ((retval = fileio_seek(&image_binary->fileio, offset)) != ERROR_OK)
{
return retval;
}
-
+
/* return requested bytes */
if ((retval = fileio_read(&image_binary->fileio, size, buffer, size_read)) != ERROR_OK)
{
{
memcpy(buffer, (u8*)image->sections[section].private + offset, size);
*size_read = size;
-
+
return ERROR_OK;
}
else if (image->type == IMAGE_ELF)
{
image_memory_t *image_memory = image->type_private;
u32 address = image->sections[section].base_address + offset;
-
+
*size_read = 0;
-
+
while ((size - *size_read) > 0)
{
u32 size_in_cache;
-
+
if (!image_memory->cache
|| (address < image_memory->cache_address)
|| (address >= (image_memory->cache_address + IMAGE_MEMORY_CACHE_SIZE)))
{
if (!image_memory->cache)
image_memory->cache = malloc(IMAGE_MEMORY_CACHE_SIZE);
-
+
if (target_read_buffer(image_memory->target, address & ~(IMAGE_MEMORY_CACHE_SIZE - 1),
IMAGE_MEMORY_CACHE_SIZE, image_memory->cache) != ERROR_OK)
{
}
image_memory->cache_address = address & ~(IMAGE_MEMORY_CACHE_SIZE - 1);
}
-
+
size_in_cache = (image_memory->cache_address + IMAGE_MEMORY_CACHE_SIZE) - address;
-
+
memcpy(buffer + *size_read,
image_memory->cache + (address - image_memory->cache_address),
(size_in_cache > size) ? size : size_in_cache
);
-
+
*size_read += (size_in_cache > size) ? size : size_in_cache;
address += (size_in_cache > size) ? size : size_in_cache;
}
{
memcpy(buffer, (u8*)image->sections[section].private + offset, size);
*size_read = size;
-
+
return ERROR_OK;
}
else if (image->type == IMAGE_BUILDER)
{
memcpy(buffer, (u8*)image->sections[section].private + offset, size);
*size_read = size;
-
+
return ERROR_OK;
}
-
+
return ERROR_OK;
}
int image_add_section(image_t *image, u32 base, u32 size, int flags, u8 *data)
{
image_section_t *section;
-
+
/* only image builder supports adding sections */
if (image->type != IMAGE_BUILDER)
return ERROR_INVALID_ARGUMENTS;
-
+
/* see if there's a previous section */
if (image->num_sections)
{
section = &image->sections[image->num_sections - 1];
-
+
/* see if it's enough to extend the last section,
* adding data to previous sections or merging is not supported */
if (((section->base_address + section->size) == base) && (section->flags == flags))
return ERROR_OK;
}
}
-
+
/* allocate new section */
image->num_sections++;
image->sections = realloc(image->sections, sizeof(image_section_t) * image->num_sections);
section->flags = flags;
section->private = malloc(sizeof(u8) * size);
memcpy((u8*)section->private, data, size);
-
+
return ERROR_OK;
}
if (image->type == IMAGE_BINARY)
{
image_binary_t *image_binary = image->type_private;
-
+
fileio_close(&image_binary->fileio);
}
else if (image->type == IMAGE_IHEX)
{
image_ihex_t *image_ihex = image->type_private;
-
+
fileio_close(&image_ihex->fileio);
-
+
if (image_ihex->buffer)
{
free(image_ihex->buffer);
else if (image->type == IMAGE_ELF)
{
image_elf_t *image_elf = image->type_private;
-
+
fileio_close(&image_elf->fileio);
if (image_elf->header)
else if (image->type == IMAGE_MEMORY)
{
image_memory_t *image_memory = image->type_private;
-
+
if (image_memory->cache)
{
free(image_memory->cache);
else if (image->type == IMAGE_SRECORD)
{
image_mot_t *image_mot = image->type_private;
-
+
fileio_close(&image_mot->fileio);
-
+
if (image_mot->buffer)
{
free(image_mot->buffer);
else if (image->type == IMAGE_BUILDER)
{
int i;
-
+
for (i = 0; i < image->num_sections; i++)
{
free(image->sections[i].private);
free(image->type_private);
image->type_private = NULL;
}
-
+
if (image->sections)
{
free(image->sections);
image->sections = NULL;
}
-
+
return ERROR_OK;
}
int image_calculate_checksum(u8* buffer, u32 nbytes, u32* checksum)
{
u32 crc = 0xffffffff;
-
+
if (!crc32_table[1])
{
/* Initialize the CRC table and the decoding table. */
crc32_table[i] = c;
}
}
-
+
while (nbytes--)
{
/* as per gdb */
crc = (crc << 8) ^ crc32_table[((crc >> 24) ^ *buffer++) & 255];
+ if ((nbytes%16384)==0)
+ {
+ keep_alive();
+ }
}
-
+
*checksum = crc;
return ERROR_OK;
}
retval=ERROR_FAIL;
goto done;
}
+ if ((t%16384)==0)
+ {
+ keep_alive();
+ }
}
}
Code Review / openocd.git / commitdiff