Previously the adapter speed settings were hard-coded to
connect with low speed then switch over to high speed
regardless what was mentioned in the cfg files. Now the
stm8 target intercept adapter speed settings and configure
the stm8 control registers accordingly.
Change-Id: I7419514e5214e4b43b9d51253cf5b7f04a233533
Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com>
Reviewed-on: http://openocd.zylin.com/5548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
static void stm8_enable_watchpoints(struct target *target);
static int stm8_unset_watchpoint(struct target *target,
struct watchpoint *watchpoint);
static void stm8_enable_watchpoints(struct target *target);
static int stm8_unset_watchpoint(struct target *target,
struct watchpoint *watchpoint);
+static int (*adapter_speed)(int speed);
+extern struct adapter_driver *adapter_driver;
static const struct {
unsigned id;
static const struct {
unsigned id;
+static int stm8_speed(int speed)
+{
+ int retval;
+ uint8_t csr;
+
+ LOG_DEBUG("stm8_speed: %d", speed);
+
+ csr = SAFE_MASK | SWIM_DM;
+ if (speed >= SWIM_FREQ_HIGH)
+ csr |= HS;
+
+ LOG_DEBUG("writing B0 to SWIM_CSR (SAFE_MASK + SWIM_DM + HS:%d)", csr & HS ? 1 : 0);
+ retval = stm8_write_u8(NULL, SWIM_CSR, csr);
+ if (retval != ERROR_OK)
+ return retval;
+ return adapter_speed(speed);
+}
+
static int stm8_init(struct command_context *cmd_ctx, struct target *target)
{
static int stm8_init(struct command_context *cmd_ctx, struct target *target)
{
+ /*
+ * FIXME: this is a temporarily hack that needs better implementation.
+ * Being the only overwrite of adapter_driver, it prevents declaring const
+ * the struct adapter_driver.
+ * intercept adapter_driver->speed() calls
+ */
+ adapter_speed = adapter_driver->speed;
+ adapter_driver->speed = stm8_speed;
+
stm8_build_reg_cache(target);
return ERROR_OK;
stm8_build_reg_cache(target);
return ERROR_OK;
if (!target_was_examined(target)) {
if (!stm8->swim_configured) {
if (!target_was_examined(target)) {
if (!stm8->swim_configured) {
- /* set SWIM_CSR = 0xa0 (enable mem access & mask reset) */
- LOG_DEBUG("writing A0 to SWIM_CSR (SAFE_MASK + SWIM_DM)");
- retval = stm8_write_u8(target, SWIM_CSR, SAFE_MASK + SWIM_DM);
- if (retval != ERROR_OK)
- return retval;
- /* set high speed */
- LOG_DEBUG("writing B0 to SWIM_CSR (SAFE_MASK + SWIM_DM + HS)");
- retval = stm8_write_u8(target, SWIM_CSR, SAFE_MASK + SWIM_DM + HS);
- if (retval != ERROR_OK)
- return retval;
- jtag_config_khz(SWIM_FREQ_HIGH);
stm8->swim_configured = true;
/*
Now is the time to deassert reset if connect_under_reset.
stm8->swim_configured = true;
/*
Now is the time to deassert reset if connect_under_reset.
# Set stm8l type
$_TARGETNAME configure -enable_stm8l
# Set stm8l type
$_TARGETNAME configure -enable_stm8l
-# Set low speed at debug entry
-adapter speed 363
+# Set high speed
+adapter speed 800
+# Set low speed
+#adapter speed 363
# Uncomment this line to enable interrupts while instruction step
#$_TARGETNAME configure -enable_step_irq
# Uncomment this line to enable interrupts while instruction step
#$_TARGETNAME configure -enable_step_irq
-# Set low speed at debug entry
-adapter speed 363
+# Set high speed
+adapter speed 800
+# Set low speed
+#adapter speed 363
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