Commit
d9ba56c295f057e716519a798bf9cdb4898c24f4 did a bunch of
renaming of cortex_a8 to cortex_a, including the names in config
files. However that introduced a regression as the name in target_type
struct remained unchanged.
This adds the last missing bit: actual renaming of the target name as
understood by OpenOCD.
Also change the (hopefully) last instance of using it in the supplied
config files, namely from imx6.cfg.
Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1420
Tested-by: jenkins
Reviewed-by: Chris Johns <chrisj@rtems.org>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
};
struct target_type cortexa8_target = {
};
struct target_type cortexa8_target = {
+ .name = "cortex_a",
+ .deprecated_name = "cortex_a8",
.poll = cortex_a8_poll,
.arch_state = armv7a_arch_state,
.poll = cortex_a8_poll,
.arch_state = armv7a_arch_state,
# core 2 - 0x82154000
# core 3 - 0x82156000
set _TARGETNAME $_CHIPNAME.cpu.0
# core 2 - 0x82154000
# core 3 - 0x82156000
set _TARGETNAME $_CHIPNAME.cpu.0
-target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap \
+target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x82150000
# some TCK cycles are required to activate the DEBUG power domain
-coreid 0 -dbgbase 0x82150000
# some TCK cycles are required to activate the DEBUG power domain
proc imx6_dbginit {target} {
# General Cortex A8/A9 debug initialisation
proc imx6_dbginit {target} {
# General Cortex A8/A9 debug initialisation
}
# Slow speed to be sure it will work
}
# Slow speed to be sure it will work
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