target: arm: disassembler: decode v6T2 ARM ISB instruction 95/3895/2
authorPaul Fertser <fercerpav@gmail.com>
Fri, 2 Dec 2016 17:15:46 +0000 (20:15 +0300)
committerPaul Fertser <fercerpav@gmail.com>
Sat, 13 Jan 2018 08:36:29 +0000 (08:36 +0000)
Change-Id: Iaaa54aee6a74f0b250b83c53e7a3fb7c17718920
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3895
Tested-by: jenkins
src/target/arm_disassembler.c
src/target/arm_disassembler.h

index 1536679..f432f57 100644 (file)
@@ -170,6 +170,18 @@ static int evaluate_pld(uint32_t opcode,
 
                return ERROR_OK;
        }
+       /* ISB */
+       if ((opcode & 0x07f000f0) == 0x05700060) {
+               instruction->type = ARM_ISB;
+
+               snprintf(instruction->text,
+                               128,
+                               "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tISB %s",
+                               address, opcode,
+                               ((opcode & 0x0000000f) == 0xf) ? "SY" : "UNK");
+
+               return ERROR_OK;
+       }
        return evaluate_unknown(opcode, address, instruction);
 }
 
index b73f24a..e9f4d44 100644 (file)
@@ -107,6 +107,7 @@ enum arm_instruction_type {
        ARM_MRRC,
        ARM_PLD,
        ARM_DSB,
+       ARM_ISB,
        ARM_QADD,
        ARM_QDADD,
        ARM_QSUB,