ARM11: remove arm11->target
authorDavid Brownell <dbrownell@users.sourceforge.net>
Thu, 3 Dec 2009 06:57:07 +0000 (22:57 -0800)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Thu, 3 Dec 2009 07:08:42 +0000 (23:08 -0800)
Don't need/want arm11->target; we have arm11->arm.target instead.
Also remove some unused watchpoint stuff.

src/target/arm11.c
src/target/arm11.h
src/target/arm11_dbgtap.c

index 5053414337822bbe7701b73aeb7aaae533f43e6a..1a3e9797b3293f410839f5fc0ac70d6782e48f73 100644 (file)
@@ -127,13 +127,14 @@ static int arm11_check_init(struct arm11_common *arm11, uint32_t *dscr)
                          * the target.
                          */
 
                          * the target.
                          */
 
-                       arm11->target->state    = TARGET_HALTED;
-                       arm11->target->debug_reason     = arm11_get_DSCR_debug_reason(*dscr);
+                       arm11->arm.target->state = TARGET_HALTED;
+                       arm11->arm.target->debug_reason =
+                                       arm11_get_DSCR_debug_reason(*dscr);
                }
                else
                {
                }
                else
                {
-                       arm11->target->state    = TARGET_RUNNING;
-                       arm11->target->debug_reason     = DBG_REASON_NOTHALTED;
+                       arm11->arm.target->state = TARGET_RUNNING;
+                       arm11->arm.target->debug_reason = DBG_REASON_NOTHALTED;
                }
 
                arm11_sc7_clear_vbw(arm11);
                }
 
                arm11_sc7_clear_vbw(arm11);
@@ -1221,8 +1222,6 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp)
 
        armv4_5_init_arch_info(target, &arm11->arm);
 
 
        armv4_5_init_arch_info(target, &arm11->arm);
 
-       arm11->target = target;
-
        arm11->jtag_info.tap = target->tap;
        arm11->jtag_info.scann_size = 5;
        arm11->jtag_info.scann_instr = ARM11_SCAN_N;
        arm11->jtag_info.tap = target->tap;
        arm11->jtag_info.scann_size = 5;
        arm11->jtag_info.scann_instr = ARM11_SCAN_N;
@@ -1313,7 +1312,6 @@ static int arm11_examine(struct target *target)
 
        /** \todo TODO: reserve one brp slot if we allow breakpoints during step */
        arm11->free_brps = arm11->brp;
 
        /** \todo TODO: reserve one brp slot if we allow breakpoints during step */
        arm11->free_brps = arm11->brp;
-       arm11->free_wrps = arm11->wrp;
 
        LOG_DEBUG("IDCODE %08" PRIx32 " IMPLEMENTOR %02x DIDR %08" PRIx32,
                        device_id, implementor, didr);
 
        LOG_DEBUG("IDCODE %08" PRIx32 " IMPLEMENTOR %02x DIDR %08" PRIx32,
                        device_id, implementor, didr);
@@ -1350,7 +1348,8 @@ static int arm11_examine(struct target *target)
 /** Load a register that is marked !valid in the register cache */
 static int arm11_get_reg(struct reg *reg)
 {
 /** Load a register that is marked !valid in the register cache */
 static int arm11_get_reg(struct reg *reg)
 {
-       struct target * target = ((struct arm11_reg_state *)reg->arch_info)->target;
+       struct arm11_reg_state *r = reg->arch_info;
+       struct target *target = r->target;
 
        if (target->state != TARGET_HALTED)
        {
 
        if (target->state != TARGET_HALTED)
        {
@@ -1371,7 +1370,8 @@ static int arm11_get_reg(struct reg *reg)
 /** Change a value in the register cache */
 static int arm11_set_reg(struct reg *reg, uint8_t *buf)
 {
 /** Change a value in the register cache */
 static int arm11_set_reg(struct reg *reg, uint8_t *buf)
 {
-       struct target *target = ((struct arm11_reg_state *)reg->arch_info)->target;
+       struct arm11_reg_state *r = reg->arch_info;
+       struct target *target = r->target;
        struct arm11_common *arm11 = target_to_arm11(target);
 //     const struct arm11_reg_defs *arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
 
        struct arm11_common *arm11 = target_to_arm11(target);
 //     const struct arm11_reg_defs *arm11_reg_info = arm11_reg_defs + ((struct arm11_reg_state *)reg->arch_info)->def_index;
 
index c3f4e8643bfa6fc6aab38551f869734cd6b484d0..e5c92def0e254c65426f5be1dbd0027a48b308ec 100644 (file)
@@ -51,18 +51,13 @@ enum arm11_debug_version
 struct arm11_common
 {
        struct arm      arm;
 struct arm11_common
 {
        struct arm      arm;
-       struct target * target;         /**< Reference back to the owner */
 
        /** Debug module state. */
        struct arm_dpm dpm;
 
 
        /** Debug module state. */
        struct arm_dpm dpm;
 
-       /** \name Processor type detection */
-       /*@{*/
-
        size_t  brp;                    /**< Number of Breakpoint Register Pairs from DIDR      */
        size_t  wrp;                    /**< Number of Watchpoint Register Pairs from DIDR      */
        size_t  brp;                    /**< Number of Breakpoint Register Pairs from DIDR      */
        size_t  wrp;                    /**< Number of Watchpoint Register Pairs from DIDR      */
-
-       /*@}*/
+       size_t  free_brps;              /**< Number of breakpoints allocated */
 
        uint32_t                last_dscr;              /**< Last retrieved DSCR value;
                                                             Use only for debug message generation              */
 
        uint32_t                last_dscr;              /**< Last retrieved DSCR value;
                                                             Use only for debug message generation              */
@@ -77,8 +72,6 @@ struct arm11_common
 
        /*@}*/
 
 
        /*@}*/
 
-       size_t  free_brps;                              /**< keep track of breakpoints allocated by arm11_add_breakpoint() */
-       size_t  free_wrps;                              /**< keep track of breakpoints allocated by arm11_add_watchpoint() */
 
        // GA
        struct reg_cache *core_cache;
 
        // GA
        struct reg_cache *core_cache;
index 6ce308e52ed215416183ac8abe5e58e9afcb32ed..7fd5e3a1e008cb25bc2e60ba32aac7ca033fccba 100644 (file)
@@ -85,7 +85,7 @@ int arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields, tap_state_t
  */
 void arm11_setup_field(struct arm11_common * arm11, int num_bits, void * out_data, void * in_data, struct scan_field * field)
 {
  */
 void arm11_setup_field(struct arm11_common * arm11, int num_bits, void * out_data, void * in_data, struct scan_field * field)
 {
-       field->tap                      = arm11->target->tap;
+       field->tap                      = arm11->arm.target->tap;
        field->num_bits                 = num_bits;
        field->out_value                = out_data;
        field->in_value                 = in_data;
        field->num_bits                 = num_bits;
        field->out_value                = out_data;
        field->in_value                 = in_data;
@@ -102,8 +102,7 @@ void arm11_setup_field(struct arm11_common * arm11, int num_bits, void * out_dat
  */
 void arm11_add_IR(struct arm11_common * arm11, uint8_t instr, tap_state_t state)
 {
  */
 void arm11_add_IR(struct arm11_common * arm11, uint8_t instr, tap_state_t state)
 {
-       struct jtag_tap *tap;
-       tap = arm11->target->tap;
+       struct jtag_tap *tap = arm11->arm.target->tap;
 
        if (buf_get_u32(tap->cur_instr, 0, 5) == instr)
        {
 
        if (buf_get_u32(tap->cur_instr, 0, 5) == instr)
        {

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)