cortex_m: deprecate soft_reset_halt

soft_reset_halt was only really intended for the older arm arch, eg. armv4/5.
Newer arch such as armv7m/mips do not need this as they have better alternatives.

Change-Id: Ifb360680b7e4bfa5365f3c79d82574bded952b45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1442
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 26e556948c0bdd95b05776a649b5feffcd00094e..a7cf18f75d9264deb165145d6dccf50ac6e33e9b 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -632,6 +632,12 @@ static int cortex_m3_soft_reset_halt(struct target *target)
        uint32_t dcb_dhcsr = 0;
        int retval, timeout = 0;
 
        uint32_t dcb_dhcsr = 0;
        int retval, timeout = 0;
 

+       /* soft_reset_halt is deprecated on cortex_m as the same functionality
+        * can be obtained by using 'reset halt' and 'cortex_m reset_config vectreset'
+        * As this reset only used VC_CORERESET it would only ever reset the cortex_m
+        * core, not the peripherals */
+       LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead.");
+

        /* Enter debug state on reset; restore DEMCR in endreset_event() */
        retval = mem_ap_write_u32(swjdp, DCB_DEMCR,
                        TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
        /* Enter debug state on reset; restore DEMCR in endreset_event() */
        retval = mem_ap_write_u32(swjdp, DCB_DEMCR,
                        TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);