It can be sped up later, once it's known the PLLs are active.
Note that modern tools from TI all use adaptive clocking; and
that if that's done with OpenOCD, "too fast" is also a non-issue.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2740
b42882b7-edfa-0310-969c-
e2dbd0fdcd60
-work-area-size 0x4000 \
-work-area-backup 0
+# be absolutely certain the JTAG clock will work with the worst-case
+# CLKIN = 24 MHz (best case: 36 MHz) even when no bootloader turns
+# on the PLL and starts using it. OK to speed up after clock setup.
+jtag_rclk 1500
+$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
-work-area-size 0x4000 \
-work-area-backup 0
+# be absolutely certain the JTAG clock will work with the worst-case
+# CLKIN = 19.2 MHz (best case: 36 MHz) even when no bootloader turns
+# on the PLL and starts using it. OK to speed up after clock setup.
+jtag_rclk 1500
+$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x0000a000 -work-area-size 0x2000
+# be absolutely certain the JTAG clock will work with the worst-case
+# CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
+# on the PLL and starts using it. OK to speed up after clock setup.
+jtag_rclk 1500
+$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
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