target/armv7a_cache_l2x: change prototype of arm7a_handle_l2x_cache_info_command() 70/5070/2
authorPaul Fertser <fercerpav@gmail.com>
Mon, 1 Apr 2019 02:27:58 +0000 (04:27 +0200)
committerTomas Vanek <vanekt@fbl.cz>
Tue, 14 May 2019 18:35:54 +0000 (19:35 +0100)
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of arm7a_handle_l2x_cache_info_command() to pass
CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ib926cd7380ac8b6fb89f64e0a85d81d124633315
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5070
Tested-by: jenkins
src/target/armv7a_cache_l2x.c

index e181f26..0aa6953 100644 (file)
@@ -173,18 +173,18 @@ done:
        return retval;
 }
 
-static int arm7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
+static int arm7a_handle_l2x_cache_info_command(struct command_invocation *cmd,
        struct armv7a_cache_common *armv7a_cache)
 {
        struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
                (armv7a_cache->outer_cache);
 
        if (armv7a_cache->info == -1) {
-               command_print(cmd_ctx, "cache not yet identified");
+               command_print(cmd->ctx, "cache not yet identified");
                return ERROR_OK;
        }
 
-       command_print(cmd_ctx,
+       command_print(cmd->ctx,
                      "L2 unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
                      l2x_cache->base, l2x_cache->way);
 
@@ -235,7 +235,7 @@ COMMAND_HANDLER(arm7a_l2x_cache_info_command)
        if (retval)
                return retval;
 
-       return arm7a_handle_l2x_cache_info_command(CMD_CTX,
+       return arm7a_handle_l2x_cache_info_command(CMD,
                        &armv7a->armv7a_mmu.armv7a_cache);
 }