- Replace ')\(>>\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(>>\)(' with '\1 \2 ('.
- Replace '\(\w\)\(>>\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2369
b42882b7-edfa-0310-969c-
e2dbd0fdcd60
12 files changed:
at91sam7_info = t_bank->driver_priv;
at91sam7_info->cidr = cidr;
at91sam7_info = t_bank->driver_priv;
at91sam7_info->cidr = cidr;
- at91sam7_info->cidr_ext = (cidr>>31)&0x0001;
- at91sam7_info->cidr_nvptyp = (cidr>>28)&0x0007;
- at91sam7_info->cidr_arch = (cidr>>20)&0x00FF;
- at91sam7_info->cidr_sramsiz = (cidr>>16)&0x000F;
- at91sam7_info->cidr_nvpsiz2 = (cidr>>12)&0x000F;
- at91sam7_info->cidr_nvpsiz = (cidr>>8)&0x000F;
- at91sam7_info->cidr_eproc = (cidr>>5)&0x0007;
+ at91sam7_info->cidr_ext = (cidr >> 31)&0x0001;
+ at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007;
+ at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF;
+ at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F;
+ at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F;
+ at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F;
+ at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
at91sam7_info->cidr_version = cidr&0x001F;
/* calculate master clock frequency */
at91sam7_info->cidr_version = cidr&0x001F;
/* calculate master clock frequency */
- arch = (cidr>>20)&0x00FF;
+ arch = (cidr >> 20)&0x00FF;
- switch ((cidr>>8)&0x000F)
+ switch ((cidr >> 8)&0x000F)
{
case FLASH_SIZE_8KB:
break;
{
case FLASH_SIZE_8KB:
break;
at91sam7_info = t_bank->driver_priv;
at91sam7_info->cidr = cidr;
at91sam7_info = t_bank->driver_priv;
at91sam7_info->cidr = cidr;
- at91sam7_info->cidr_ext = (cidr>>31)&0x0001;
- at91sam7_info->cidr_nvptyp = (cidr>>28)&0x0007;
- at91sam7_info->cidr_arch = (cidr>>20)&0x00FF;
- at91sam7_info->cidr_sramsiz = (cidr>>16)&0x000F;
- at91sam7_info->cidr_nvpsiz2 = (cidr>>12)&0x000F;
- at91sam7_info->cidr_nvpsiz = (cidr>>8)&0x000F;
- at91sam7_info->cidr_eproc = (cidr>>5)&0x0007;
+ at91sam7_info->cidr_ext = (cidr >> 31)&0x0001;
+ at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007;
+ at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF;
+ at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F;
+ at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F;
+ at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F;
+ at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
at91sam7_info->cidr_version = cidr&0x001F;
at91sam7_info->target_name = target_name;
at91sam7_info->cidr_version = cidr&0x001F;
at91sam7_info->target_name = target_name;
}
status = at91sam7_get_flash_status(bank->target, bank->bank_number);
}
status = at91sam7_get_flash_status(bank->target, bank->bank_number);
- at91sam7_info->lockbits = (status>>16);
+ at91sam7_info->lockbits = (status >> 16);
at91sam7_info->num_lockbits_on = 0;
for (lock_pos=0; lock_pos<bank->num_sectors; lock_pos++)
{
at91sam7_info->num_lockbits_on = 0;
for (lock_pos=0; lock_pos<bank->num_sectors; lock_pos++)
{
- if ( ((status>>(16+lock_pos))&(0x0001)) == 1)
+ if ( ((status >> (16+lock_pos))&(0x0001)) == 1)
{
at91sam7_info->num_lockbits_on++;
bank->sectors[lock_pos].is_protected = 1;
{
at91sam7_info->num_lockbits_on++;
bank->sectors[lock_pos].is_protected = 1;
/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
status = at91sam7_get_flash_status(bank->target, 0);
/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
status = at91sam7_get_flash_status(bank->target, 0);
- at91sam7_info->securitybit = (status>>4)&0x01;
- at91sam7_info->nvmbits = (status>>8)&0xFF;
+ at91sam7_info->securitybit = (status >> 4)&0x01;
+ at91sam7_info->nvmbits = (status >> 8)&0xFF;
at91sam7_info->num_nvmbits_on = 0;
for (gpnvm_pos=0; gpnvm_pos<at91sam7_info->num_nvmbits; gpnvm_pos++)
{
at91sam7_info->num_nvmbits_on = 0;
for (gpnvm_pos=0; gpnvm_pos<at91sam7_info->num_nvmbits; gpnvm_pos++)
{
- if ( ((status>>(8+gpnvm_pos))&(0x01)) == 1)
+ if ( ((status >> (8+gpnvm_pos))&(0x01)) == 1)
{
at91sam7_info->num_nvmbits_on++;
}
{
at91sam7_info->num_nvmbits_on++;
}
j,
p->sectors[j].offset,
p->sectors[j].size,
j,
p->sectors[j].offset,
p->sectors[j].size,
- p->sectors[j].size>>10,
+ p->sectors[j].size >> 10,
j,
p->sectors[j].offset,
p->sectors[j].size,
j,
p->sectors[j].offset,
p->sectors[j].size,
- p->sectors[j].size>>10,
+ p->sectors[j].size >> 10,
- nvpsiz=(inr(DBGU_CIDR)>>8)&0xf;
+ nvpsiz=(inr(DBGU_CIDR) >> 8)&0xf;
switch (nvpsiz) {
case 3:
switch (nvpsiz) {
case 3:
int page_num;
page_num=0;
int page_num;
page_num=0;
- lockbits=inr(MC_FSR+efc_ofs)>>16;
+ lockbits=inr(MC_FSR+efc_ofs) >> 16;
while (lockbits) {
if (lockbits&1) {
while (lockbits) {
if (lockbits&1) {
device_id = ejtag_info->idcode;
LOG_INFO( "device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)",
device_id,
device_id = ejtag_info->idcode;
LOG_INFO( "device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)",
device_id,
- (unsigned)((device_id>>1)&0x7ff),
- (unsigned)((device_id>>12)&0xff),
- (unsigned)((device_id>>20)&0xfff) );
+ (unsigned)((device_id >> 1)&0x7ff),
+ (unsigned)((device_id >> 12)&0xff),
+ (unsigned)((device_id >> 20)&0xfff) );
- if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
+ if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
LOG_WARNING( "Cannot identify target as a PIC32MX family." );
return ERROR_FLASH_OPERATION_FAILED;
}
LOG_WARNING( "Cannot identify target as a PIC32MX family." );
return ERROR_FLASH_OPERATION_FAILED;
}
device_id = ejtag_info->idcode;
device_id = ejtag_info->idcode;
- if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
+ if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) {
snprintf(buf, buf_size,
"Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
snprintf(buf, buf_size,
"Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
- (unsigned)((device_id>>1)&0x7ff),
+ (unsigned)((device_id >> 1)&0x7ff),
PIC32MX_MANUF_ID);
return ERROR_FLASH_OPERATION_FAILED;
}
PIC32MX_MANUF_ID);
return ERROR_FLASH_OPERATION_FAILED;
}
buf += printed;
buf_size -= printed;
printed = snprintf(buf, buf_size, " Ver: 0x%03x",
buf += printed;
buf_size -= printed;
printed = snprintf(buf, buf_size, " Ver: 0x%03x",
- (unsigned)((device_id>>20)&0xfff));
+ (unsigned)((device_id >> 20)&0xfff));
#include "binarybuffer.h"
#include "binarybuffer.h"
-#define DID0_VER(did0) ((did0>>28)&0x07)
+#define DID0_VER(did0) ((did0 >> 28)&0x07)
static int stellaris_register_commands(struct command_context_s *cmd_ctx);
static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int stellaris_erase(struct flash_bank_s *bank, int first, int last);
static int stellaris_register_commands(struct command_context_s *cmd_ctx);
static int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
static int stellaris_erase(struct flash_bank_s *bank, int first, int last);
if (DID0_VER(stellaris_info->did0) > 0)
{
if (DID0_VER(stellaris_info->did0) > 0)
{
- device_class = (stellaris_info->did0>>16) & 0xFF;
+ device_class = (stellaris_info->did0 >> 16) & 0xFF;
device_class,
StellarisClassname[device_class],
stellaris_info->target_name,
device_class,
StellarisClassname[device_class],
stellaris_info->target_name,
- (int)('A' + ((stellaris_info->did0>>8) & 0xFF)),
+ (int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
(int)((stellaris_info->did0) & 0xFF));
buf += printed;
buf_size -= printed;
(int)((stellaris_info->did0) & 0xFF));
buf += printed;
buf_size -= printed;
stellaris_info->did1,
stellaris_info->did1,
"ARMV7M",
stellaris_info->did1,
stellaris_info->did1,
"ARMV7M",
- (int)((1+((stellaris_info->dc0>>16) & 0xFFFF))/4),
+ (int)((1+((stellaris_info->dc0 >> 16) & 0xFFFF))/4),
(int)((1+(stellaris_info->dc0 & 0xFFFF))*2));
buf += printed;
buf_size -= printed;
(int)((1+(stellaris_info->dc0 & 0xFFFF))*2));
buf += printed;
buf_size -= printed;
LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
stellaris_info->rcc = rcc;
LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
stellaris_info->rcc = rcc;
- sysdiv = (rcc>>23) & 0xF;
- usesysdiv = (rcc>>22) & 0x1;
- bypass = (rcc>>11) & 0x1;
- oscsrc = (rcc>>4) & 0x3;
- /* xtal = (rcc>>6)&0xF; */
+ sysdiv = (rcc >> 23) & 0xF;
+ usesysdiv = (rcc >> 22) & 0x1;
+ bypass = (rcc >> 11) & 0x1;
+ oscsrc = (rcc >> 4) & 0x3;
+ /* xtal = (rcc >> 6)&0xF; */
switch (oscsrc)
{
case 0:
switch (oscsrc)
{
case 0:
{
if ((num==32) && (first==0))
{
{
if ((num==32) && (first==0))
{
- buffer[3]=(value>>24)&0xff;
- buffer[2]=(value>>16)&0xff;
- buffer[1]=(value>>8)&0xff;
- buffer[0]=(value>>0)&0xff;
+ buffer[3]=(value >> 24)&0xff;
+ buffer[2]=(value >> 16)&0xff;
+ buffer[1]=(value >> 8)&0xff;
+ buffer[0]=(value >> 0)&0xff;
case JIM_EXPROP_LTE: wC = wA <= wB; break;
case JIM_EXPROP_GTE: wC = wA >= wB; break;
case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
case JIM_EXPROP_LTE: wC = wA <= wB; break;
case JIM_EXPROP_GTE: wC = wA >= wB; break;
case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
- case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;
+ case JIM_EXPROP_RSHIFT: wC = wA >> wB; break;
case JIM_EXPROP_NUMEQ: wC = wA==wB; break;
case JIM_EXPROP_NUMNE: wC = wA != wB; break;
case JIM_EXPROP_BITAND: wC = wA&wB; break;
case JIM_EXPROP_NUMEQ: wC = wA==wB; break;
case JIM_EXPROP_NUMNE: wC = wA != wB; break;
case JIM_EXPROP_BITAND: wC = wA&wB; break;
wC = _rotl(uA,(unsigned long)wB);
#else
const unsigned int S = sizeof(unsigned long) * 8;
wC = _rotl(uA,(unsigned long)wB);
#else
const unsigned int S = sizeof(unsigned long) * 8;
- wC = (unsigned long)((uA<<wB)|(uA>>(S-wB)));
+ wC = (unsigned long)((uA<<wB)|(uA >> (S-wB)));
wC = _rotr(uA,(unsigned long)wB);
#else
const unsigned int S = sizeof(unsigned long) * 8;
wC = _rotr(uA,(unsigned long)wB);
#else
const unsigned int S = sizeof(unsigned long) * 8;
- wC = (unsigned long)((uA>>wB)|(uA<<(S-wB)));
+ wC = (unsigned long)((uA >> wB)|(uA<<(S-wB)));
}
/* shift out value */
waitIdle();
}
/* shift out value */
waitIdle();
- ZY1000_POKE(ZY1000_JTAG_BASE+0x28, (((value>>i)&1)<<1)|tms);
+ ZY1000_POKE(ZY1000_JTAG_BASE+0x28, (((value >> i)&1)<<1)|tms);
}
waitIdle();
ZY1000_POKE(ZY1000_JTAG_BASE+0x28, 0);
}
waitIdle();
ZY1000_POKE(ZY1000_JTAG_BASE+0x28, 0);
for (i=0; i<repeat-1; i++)
{
sampleShiftRegister();
for (i=0; i<repeat-1; i++)
{
sampleShiftRegister();
- ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value>>i);
+ ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value >> i);
ZY1000_POKE(ZY1000_JTAG_BASE+0x8, (1<<8)|(a<<4)|a);
}
sampleShiftRegister();
ZY1000_POKE(ZY1000_JTAG_BASE+0x8, (1<<8)|(a<<4)|a);
}
sampleShiftRegister();
- ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value>>(repeat-1));
+ ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value >> (repeat-1));
ZY1000_POKE(ZY1000_JTAG_BASE+0x8, (1<<8)|(a<<4)|b);
} else
{
ZY1000_POKE(ZY1000_JTAG_BASE+0x8, (1<<8)|(a<<4)|b);
} else
{
- inBuffer[(j+l)/8]=(value>>l)&0xff;
+ inBuffer[(j+l)/8]=(value >> l)&0xff;
mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF4, &c_cid1);
mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF8, &c_cid2);
mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFFC, &c_cid3);
mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF4, &c_cid1);
mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF8, &c_cid2);
mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFFC, &c_cid3);
- component_start = component_base - 0x1000*(c_pid4>>4);
+ component_start = component_base - 0x1000*(c_pid4 >> 4);
command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", pid4 0x%" PRIx32 ", start address 0x%" PRIx32 "",component_base,c_pid4,component_start);
command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", pid4 0x%" PRIx32 ", start address 0x%" PRIx32 "",component_base,c_pid4,component_start);
- command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1>>4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
+ command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1 >> 4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
command_print(cmd_ctx, "\t\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 ", CID0, 0x%" PRIx32 "",c_cid3,c_cid2,c_cid1,c_cid0);
command_print(cmd_ctx, "\t\tPID3 0x%" PRIx32 ", PID2 0x%" PRIx32 ", PID1 0x%" PRIx32 ", PID0, 0x%" PRIx32 "",c_pid3,c_pid2,c_pid1,c_pid0);
command_print(cmd_ctx, "\t\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 ", CID0, 0x%" PRIx32 "",c_cid3,c_cid2,c_cid1,c_cid0);
command_print(cmd_ctx, "\t\tPID3 0x%" PRIx32 ", PID2 0x%" PRIx32 ", PID1 0x%" PRIx32 ", PID0, 0x%" PRIx32 "",c_pid3,c_pid2,c_pid1,c_pid0);
- /* For CoreSight components, (c_cid1>>4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
+ /* For CoreSight components, (c_cid1 >> 4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
extern int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, arm_instruction_t *instruction);
extern int arm_access_size(arm_instruction_t *instruction);
extern int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, arm_instruction_t *instruction);
extern int arm_access_size(arm_instruction_t *instruction);
-#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000)>>28])
+#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])
#endif /* ARM_DISASSEMBLER_H */
#endif /* ARM_DISASSEMBLER_H */
int i;
for (i=0; i<4; i++)
{
int i;
for (i=0; i<4; i++)
{
- char c=(l>>(i*8))&0xff;
+ char c=(l >> (i*8))&0xff;
val=65535;
}
data[i*2]=val&0xff;
val=65535;
}
data[i*2]=val&0xff;
- data[i*2+1]=(val>>8)&0xff;
+ data[i*2+1]=(val >> 8)&0xff;
}
free(buckets);
writeData(f, data, length * 2);
}
free(buckets);
writeData(f, data, length * 2);
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