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cfg: add support for STM3220G-EVAL onboard STLINK
authorSpencer Oliver <spen@spen-soft.co.uk>
Mon, 26 Mar 2012 16:22:27 +0000 (17:22 +0100)
committerSpencer Oliver <spen@spen-soft.co.uk>
Fri, 30 Mar 2012 16:02:36 +0000 (16:02 +0000)
Change-Id: Icd7a1baf6f2623e5b57d29c4602a2762af730936
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/541
Tested-by: jenkins
tcl/board/stm3220g_eval_stlink.cfg [new file with mode: 0644] patch | blob

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
new file mode 100644 (file)
index 0000000..6ac3751
--- /dev/null
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -0,0 +1,15 @@
+# STM3220G-EVAL: This is an STM32F2 eval board with a single STM32F207IGH6
+# (128KB) chip.
+# http://www.st.com/internet/evalboard/product/250374.jsp
+#
+# This is for using the onboard STLINK/V2
+
+source [find interface/stlink-v2.cfg]
+
+# increase working area to 128KB
+set WORKAREASIZE 0x20000
+
+# chip name
+set CHIPNAME STM32F207IGH6
+
+source [find target/stm32f2x_stlink.cfg]
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