Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages
Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end
Change LOG_USER_N calls that end with \n to LOG_USER
16 files changed:
unsigned long chip = 0, ecc = 0;
struct at91sam9_nand *info = NULL;
unsigned long chip = 0, ecc = 0;
struct at91sam9_nand *info = NULL;
- LOG_DEBUG("AT91SAM9 NAND Device Command\n");
+ LOG_DEBUG("AT91SAM9 NAND Device Command");
if (CMD_ARGC < 3 || CMD_ARGC > 4) {
LOG_ERROR("parameters: %s target chip_addr", CMD_ARGV[0]);
if (CMD_ARGC < 3 || CMD_ARGC > 4) {
LOG_ERROR("parameters: %s target chip_addr", CMD_ARGV[0]);
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
- LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
+ LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
/* mass erase */
if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
/* mass erase */
if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
- LOG_DEBUG("performing mass erase.\n");
+ LOG_DEBUG("performing mass erase.");
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
return ERROR_FLASH_OPERATION_FAILED;
}
return ERROR_FLASH_OPERATION_FAILED;
}
- LOG_DEBUG("mass erase successful.\n");
+ LOG_DEBUG("mass erase successful.");
return ERROR_OK;
} else {
unsigned long adr;
return ERROR_OK;
} else {
unsigned long adr;
return ERROR_FLASH_SECTOR_NOT_ERASED;
}
return ERROR_FLASH_SECTOR_NOT_ERASED;
}
- LOG_DEBUG("erased sector at address 0x%08lX\n", adr);
+ LOG_DEBUG("erased sector at address 0x%08lX", adr);
- LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x));
+ LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
aduc702x_set_write_enable(target, 0);
aduc702x_set_write_enable(target, 0);
uint32_t rcen;
v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
uint32_t rcen;
v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
- LOG_USER_N("(main xtal enabled: %s)\n",
+ LOG_USER("(main xtal enabled: %s)",
_yes_or_no(v));
v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
_yes_or_no(v));
v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
- LOG_USER_N("(main osc bypass: %s)\n",
+ LOG_USER("(main osc bypass: %s)",
_yes_or_no(v));
rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 2, 1);
_yes_or_no(v));
rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 2, 1);
- LOG_USER_N("(onchip RC-OSC enabled: %s)\n",
+ LOG_USER("(onchip RC-OSC enabled: %s)",
_yes_or_no(rcen));
v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
_yes_or_no(rcen));
v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
- LOG_USER_N("(onchip RC-OSC freq: %s)\n",
+ LOG_USER("(onchip RC-OSC freq: %s)",
_rc_freq[v]);
pChip->cfg.rc_freq = 0;
_rc_freq[v]);
pChip->cfg.rc_freq = 0;
}
v = sam3_reg_fieldname(pChip,"MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
}
v = sam3_reg_fieldname(pChip,"MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
- LOG_USER_N("(startup clks, time= %f uSecs)\n",
+ LOG_USER("(startup clks, time= %f uSecs)",
((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
- LOG_USER_N("(mainosc source: %s)\n",
+ LOG_USER("(mainosc source: %s)",
v ? "external xtal" : "internal RC");
v = sam3_reg_fieldname(pChip,"CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
v ? "external xtal" : "internal RC");
v = sam3_reg_fieldname(pChip,"CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
- LOG_USER_N("(clock failure enabled: %s)\n",
+ LOG_USER("(clock failure enabled: %s)",
LOG_USER_N("\n");
v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
LOG_USER_N("\n");
v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
- LOG_USER_N("%s\n", eproc_names[v]);
+ LOG_USER("%s", eproc_names[v]);
v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
- LOG_USER_N("%s\n", nvpsize[v]);
+ LOG_USER("%s", nvpsize[v]);
v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
- LOG_USER_N("%s\n", nvpsize2[v]);
+ LOG_USER("%s", nvpsize2[v]);
v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16,4);
v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16,4);
- LOG_USER_N("%s\n", sramsize[ v ]);
+ LOG_USER("%s", sramsize[ v ]);
v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
cp = _unknown;
v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
cp = _unknown;
- LOG_USER_N("%s\n", cp);
v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
- LOG_USER_N("%s\n", nvptype[ v ]);
+ LOG_USER("%s", nvptype[ v ]);
v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
- LOG_USER_N("(exists: %s)\n", _yes_or_no(v));
+ LOG_USER("(exists: %s)", _yes_or_no(v));
v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
- LOG_USER_N("(main ready: %s)\n", _yes_or_no(v));
+ LOG_USER("(main ready: %s)", _yes_or_no(v));
v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
v = (v * pChip->cfg.slow_freq) / 16;
pChip->cfg.mainosc_freq = v;
v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
v = (v * pChip->cfg.slow_freq) / 16;
pChip->cfg.mainosc_freq = v;
- LOG_USER_N("(%3.03f Mhz (%d.%03dkhz slowclk)\n",
+ LOG_USER("(%3.03f Mhz (%d.%03dkhz slowclk)",
_tomhz(v),
pChip->cfg.slow_freq / 1000,
pChip->cfg.slow_freq % 1000);
_tomhz(v),
pChip->cfg.slow_freq / 1000,
pChip->cfg.slow_freq % 1000);
LOG_USER_N("\n");
pChip->cfg.plla_freq = 0;
if (mula == 0) {
LOG_USER_N("\n");
pChip->cfg.plla_freq = 0;
if (mula == 0) {
- LOG_USER_N("\tPLLA Freq: (Disabled,mula = 0)\n");
+ LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
- LOG_USER_N("\tPLLA Freq: (Disabled,diva = 0)\n");
+ LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
} else if (diva == 1) {
pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1));
} else if (diva == 1) {
pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1));
- LOG_USER_N("\tPLLA Freq: %3.03f MHz\n",
+ LOG_USER("\tPLLA Freq: %3.03f MHz",
_tomhz(pChip->cfg.plla_freq));
}
}
_tomhz(pChip->cfg.plla_freq));
}
}
- LOG_USER_N("%s (%3.03f Mhz)\n",
+ LOG_USER("%s (%3.03f Mhz)",
cp,
_tomhz(fin));
pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
cp,
_tomhz(fin));
pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
- LOG_USER_N("(%s)\n", cp);
fin = fin / pdiv;
// sam3 has a *SINGLE* clock -
// other at91 series parts have divisors for these.
pChip->cfg.cpu_freq = fin;
pChip->cfg.mclk_freq = fin;
pChip->cfg.fclk_freq = fin;
fin = fin / pdiv;
// sam3 has a *SINGLE* clock -
// other at91 series parts have divisors for these.
pChip->cfg.cpu_freq = fin;
pChip->cfg.mclk_freq = fin;
pChip->cfg.fclk_freq = fin;
- LOG_USER_N("\t\tResult CPU Freq: %3.03f\n",
+ LOG_USER("\t\tResult CPU Freq: %3.03f",
// display all regs
LOG_DEBUG("Start: %s", pReg->name);
regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg);
// display all regs
LOG_DEBUG("Start: %s", pReg->name);
regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg);
- LOG_USER_N("%*s: [0x%08x] -> 0x%08x\n",
+ LOG_USER("%*s: [0x%08x] -> 0x%08x",
REG_NAME_WIDTH,
pReg->name,
pReg->address,
REG_NAME_WIDTH,
pReg->name,
pReg->address,
LOG_DEBUG("End: %s", pReg->name);
pReg++;
}
LOG_DEBUG("End: %s", pReg->name);
pReg++;
}
- LOG_USER_N(" rc-osc: %3.03f MHz\n", _tomhz(pChip->cfg.rc_freq));
- LOG_USER_N(" mainosc: %3.03f MHz\n", _tomhz(pChip->cfg.mainosc_freq));
- LOG_USER_N(" plla: %3.03f MHz\n", _tomhz(pChip->cfg.plla_freq));
- LOG_USER_N(" cpu-freq: %3.03f MHz\n", _tomhz(pChip->cfg.cpu_freq));
- LOG_USER_N("mclk-freq: %3.03f MHz\n", _tomhz(pChip->cfg.mclk_freq));
+ LOG_USER(" rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq));
+ LOG_USER(" mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq));
+ LOG_USER(" plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq));
+ LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
+ LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
- LOG_USER_N(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x\n",
+ LOG_USER(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x",
pChip->cfg.unique_id[0],
pChip->cfg.unique_id[1],
pChip->cfg.unique_id[2],
pChip->cfg.unique_id[0],
pChip->cfg.unique_id[1],
pChip->cfg.unique_id[2],
LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can this chip?)",
(unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
// Help the victim, print details about the chip
LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can this chip?)",
(unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
// Help the victim, print details about the chip
- LOG_INFO_N("SAM3 CHIPID_CIDR: 0x%08x decodes as follows\n",
+ LOG_INFO("SAM3 CHIPID_CIDR: 0x%08x decodes as follows",
pPrivate->pChip->cfg.CHIPID_CIDR);
sam3_explain_chipid_cidr(pPrivate->pChip);
return ERROR_FAIL;
pPrivate->pChip->cfg.CHIPID_CIDR);
sam3_explain_chipid_cidr(pPrivate->pChip);
return ERROR_FAIL;
r = sam3_GetInfo(pChip);
if (r != ERROR_OK) {
r = sam3_GetInfo(pChip);
if (r != ERROR_OK) {
- LOG_DEBUG("Sam3Info, Failed %d\n",r);
+ LOG_DEBUG("Sam3Info, Failed %d",r);
/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
status = at91sam7_get_flash_status(bank->target, 0);
/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
status = at91sam7_get_flash_status(bank->target, 0);
- LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32 " \n", flashcmd, bit, status);
+ LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32, flashcmd, bit, status);
/* check protect state */
at91sam7_protect_check(bank);
/* check protect state */
at91sam7_protect_check(bank);
{
/* We do not print the connection closed error message */
Jim_MakeErrorMessage(interp);
{
/* We do not print the connection closed error message */
Jim_MakeErrorMessage(interp);
- LOG_USER_N("%s\n", Jim_GetString(Jim_GetResult(interp), NULL));
+ LOG_USER("%s", Jim_GetString(Jim_GetResult(interp), NULL));
}
if (retval == ERROR_OK)
{
}
if (retval == ERROR_OK)
{
buff[chunk] = 0;
LOG_USER_N("%s", buff);
}
buff[chunk] = 0;
LOG_USER_N("%s", buff);
}
- LOG_USER_N("%s", "\n");
if (next - last < HELP_LINE_WIDTH(n))
cp = next;
command_help_show_indent(n);
if (next - last < HELP_LINE_WIDTH(n))
cp = next;
command_help_show_indent(n);
- LOG_USER_N("%.*s", (int)(cp - last), last);
- LOG_USER_N("\n");
+ LOG_USER("%.*s", (int)(cp - last), last);
#define LOG_INFO(expr ...) \
log_printf_lf (LOG_LVL_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_INFO(expr ...) \
log_printf_lf (LOG_LVL_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
-#define LOG_INFO_N(expr ...) \
- log_printf (LOG_LVL_INFO, __FILE__, __LINE__, __FUNCTION__, expr)
-
#define LOG_WARNING(expr ...) \
log_printf_lf (LOG_LVL_WARNING, __FILE__, __LINE__, __FUNCTION__, expr)
#define LOG_WARNING(expr ...) \
log_printf_lf (LOG_LVL_WARNING, __FILE__, __LINE__, __FUNCTION__, expr)
if (result == 0)
{
unsigned int u_tg = buf_get_u32(usb_in_buffer, 0, 16);
if (result == 0)
{
unsigned int u_tg = buf_get_u32(usb_in_buffer, 0, 16);
- LOG_INFO("U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s\n",
+ LOG_INFO("U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s",
(int)(buf_get_u32(usb_in_buffer + 0, 0, 16)),
(int)(buf_get_u32(usb_in_buffer + 2, 0, 16)),
(int)(buf_get_u32(usb_in_buffer + 4, 0, 16)),
(int)(buf_get_u32(usb_in_buffer + 0, 0, 16)),
(int)(buf_get_u32(usb_in_buffer + 2, 0, 16)),
(int)(buf_get_u32(usb_in_buffer + 4, 0, 16)),
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
- LOG_INFO("gpio_data_register = %p\n", gpio_data_register);
- LOG_INFO("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
+ LOG_INFO("gpio_data_register = %p", gpio_data_register);
+ LOG_INFO("gpio_data_direction_reg = %p", gpio_data_direction_register);
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and
} else {
/* drat, give the user a meaningfull message.
* telling the use we tried *BOTH* methods. */
} else {
/* drat, give the user a meaningfull message.
* telling the use we tried *BOTH* methods. */
- LOG_WARNING("Unable to open FTDI Device tried: '%s' and '%s'\n",
+ LOG_WARNING("Unable to open FTDI Device tried: '%s' and '%s'",
ft2232_device_desc,
ft2232_device_desc_A);
}
ft2232_device_desc,
ft2232_device_desc_A);
}
- LOG_DEBUG(": %d/%d\n", command_buffer_size, reply_buffer_size);
+ LOG_DEBUG(": %d/%d", command_buffer_size, reply_buffer_size);
usb_err = usb_bulk_write(
pHDev_param,
usb_err = usb_bulk_write(
pHDev_param,
- LOG_DEBUG("Opened device, pHDev = %p\n", pHDev);
+ LOG_DEBUG("Opened device, pHDev = %p", pHDev);
/* usb_set_configuration required under win32 */
usb_set_configuration(pHDev, dev->config[0].bConfigurationValue);
/* usb_set_configuration required under win32 */
usb_set_configuration(pHDev, dev->config[0].bConfigurationValue);
- LOG_DEBUG("interface claimed!\n");
+ LOG_DEBUG("interface claimed!");
break;
}
} while (--retries);
break;
}
} while (--retries);
LOG_ERROR("USB read error: %s", usb_strerror());
return(ERROR_FAIL);
}
LOG_ERROR("USB read error: %s", usb_strerror());
return(ERROR_FAIL);
}
- LOG_DEBUG(INTERFACE_NAME" firmware version: %d.%d.%d\n", reply_buffer[0], reply_buffer[1], reply_buffer[2]);
+ LOG_DEBUG(INTERFACE_NAME" firmware version: %d.%d.%d", reply_buffer[0], reply_buffer[1], reply_buffer[2]);
if ((reply_buffer[0] != 0) || (reply_buffer[1] != 0) || (reply_buffer[2] != 3)) {
if ((reply_buffer[0] != 0) || (reply_buffer[1] != 0) || (reply_buffer[2] != 3)) {
- LOG_WARNING("The rlink device is not of the version that the developers have played with. It may or may not work.\n");
+ LOG_WARNING("The rlink device is not of the version that the developers have played with. It may or may not work.");
}
/* Probe port E for adapter presence */
}
/* Probe port E for adapter presence */
);
if ((reply_buffer[0] & ST7_PE_ADAPTER_SENSE_IN) != 0) {
);
if ((reply_buffer[0] & ST7_PE_ADAPTER_SENSE_IN) != 0) {
- LOG_WARNING("target detection problem\n");
+ LOG_WARNING("target detection problem");
if ((reply_buffer[0] & ST7_PE_ADAPTER_SENSE_IN) == 0) {
if ((reply_buffer[0] & ST7_PE_ADAPTER_SENSE_IN) == 0) {
- LOG_WARNING("target not plugged in\n");
+ LOG_WARNING("target not plugged in");
}
/* float ports A and B */
}
/* float ports A and B */
DWORD dw_bytes_written;
#ifdef _DEBUG_JTAG_IO_
DWORD dw_bytes_written;
#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("usb_blaster_buf_write %02X (%d)\n", buf[0], size);
+ LOG_DEBUG("usb_blaster_buf_write %02X (%d)", buf[0], size);
#endif
status = FT_Write(ftdih, buf, size, &dw_bytes_written);
if (status != FT_OK)
#endif
status = FT_Write(ftdih, buf, size, &dw_bytes_written);
if (status != FT_OK)
#elif BUILD_USB_BLASTER_LIBFTDI == 1
int retval;
#ifdef _DEBUG_JTAG_IO_
#elif BUILD_USB_BLASTER_LIBFTDI == 1
int retval;
#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("usb_blaster_buf_write %02X (%d)\n", buf[0], size);
+ LOG_DEBUG("usb_blaster_buf_write %02X (%d)", buf[0], size);
#endif
retval = ftdi_write_data(&ftdic, buf, size);
if (retval < 0)
#endif
retval = ftdi_write_data(&ftdic, buf, size);
if (retval < 0)
return ERROR_JTAG_DEVICE_ERROR;
}
#ifdef _DEBUG_JTAG_IO_
return ERROR_JTAG_DEVICE_ERROR;
}
#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("usb_blaster_buf_read %02X (%lu)\n", buf[0], dw_bytes_read);
+ LOG_DEBUG("usb_blaster_buf_read %02X (%lu)", buf[0], dw_bytes_read);
#endif
*bytes_read = dw_bytes_read;
return ERROR_OK;
#endif
*bytes_read = dw_bytes_read;
return ERROR_OK;
*bytes_read += retval;
}
#ifdef _DEBUG_JTAG_IO_
*bytes_read += retval;
}
#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("usb_blaster_buf_read %02X (%d)\n", buf[0], *bytes_read);
+ LOG_DEBUG("usb_blaster_buf_read %02X (%d)", buf[0], *bytes_read);
#endif
return ERROR_OK;
#endif
#endif
return ERROR_OK;
#endif
static void usb_blaster_write(int tck, int tms, int tdi)
{
#ifdef _DEBUG_JTAG_IO_
static void usb_blaster_write(int tck, int tms, int tdi)
{
#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("---- usb_blaster_write(%d,%d,%d)\n", tck, tms, tdi);
+ LOG_DEBUG("---- usb_blaster_write(%d,%d,%d)", tck, tms, tdi);
#endif
out_value &= ~(TCK | TMS | TDI);
if (tck)
#endif
out_value &= ~(TCK | TMS | TDI);
if (tck)
if (Jim_EvalObj(jteap->interp, jteap->body) != JIM_OK)
{
Jim_MakeErrorMessage(jteap->interp);
if (Jim_EvalObj(jteap->interp, jteap->body) != JIM_OK)
{
Jim_MakeErrorMessage(jteap->interp);
- LOG_USER_N("%s\n", Jim_GetString(Jim_GetResult(jteap->interp), NULL));
+ LOG_USER("%s", Jim_GetString(Jim_GetResult(jteap->interp), NULL));
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR writing index\n");
+ LOG_DEBUG("ERROR writing index");
retval = arm946e_write_cp15(target, 0x35, 0x1);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x35, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR cleaning cache line\n");
+ LOG_DEBUG("ERROR cleaning cache line");
retval = arm946e_write_cp15(target, 0x1a, 0x1);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x1a, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing cache line\n");
+ LOG_DEBUG("ERROR flushing cache line");
retval = arm946e_write_cp15(target, 0x0f, 0x1);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x0f, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing I$\n");
+ LOG_DEBUG("ERROR flushing I$");
retval = arm946e_write_cp15(target, 0x02, ctr_reg);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x02, ctr_reg);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR enabling cache\n");
+ LOG_DEBUG("ERROR enabling cache");
}
} /* if preserve_cache */
}
}
} /* if preserve_cache */
}
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR writing index\n");
+ LOG_DEBUG("ERROR writing index");
retval = arm946e_write_cp15(target, 0x35, 0x1);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x35, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR cleaning cache line\n");
+ LOG_DEBUG("ERROR cleaning cache line");
retval = arm946e_write_cp15(target, 0x1c, 0x1);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x1c, 0x1);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing cache line\n");
+ LOG_DEBUG("ERROR flushing cache line");
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR writing index\n");
+ LOG_DEBUG("ERROR writing index");
retval = arm946e_write_cp15(target, 0x1d, 0x0);
if (retval != ERROR_OK)
{
retval = arm946e_write_cp15(target, 0x1d, 0x0);
if (retval != ERROR_OK)
{
- LOG_DEBUG("ERROR flushing cache line\n");
+ LOG_DEBUG("ERROR flushing cache line");
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_PRACC)
break;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
if (ejtag_ctrl & EJTAG_CTRL_PRACC)
break;
- LOG_DEBUG("DEBUGMODULE: No memory access in progress!\n");
+ LOG_DEBUG("DEBUGMODULE: No memory access in progress!");
return ERROR_JTAG_DEVICE_ERROR;
}
return ERROR_JTAG_DEVICE_ERROR;
}
bytes_to_read -= bytes_read;
}
bytes_to_read -= bytes_read;
}
- LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, *value);
+ LOG_DEBUG("reg #%i: 0x%8.8x", reg, *value);
data[4] = (value & 0xff000000) >> 24;
bytes_written = write(oocd_trace->tty_fd, data, 5);
data[4] = (value & 0xff000000) >> 24;
bytes_written = write(oocd_trace->tty_fd, data, 5);
- LOG_DEBUG("reg #%i: 0x%8.8x\n", reg, value);
+ LOG_DEBUG("reg #%i: 0x%8.8x", reg, value);
* read up any leftover characters to ensure communication is in sync */
while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0)
{
* read up any leftover characters to ensure communication is in sync */
while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0)
{
- LOG_DEBUG("%zi bytes read\n", bytes_read);
+ LOG_DEBUG("%zi bytes read", bytes_read);
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