target: remove unused "bitfield" infrastructure

We have too many different registers, and too many version and
context dependent interpretations, for this type of bitfield
management to be scalable.

(Anyone who really wants bitfield interpretation *can* do that
in Tcl code...)

There are ... quite a few copies of the same ARM dummy registers.
There should eventually be one copy; this many is craziness.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 24c6b8f4afb4b261ccf9bea8ee5d0c584e1c95a2..a6f0d3cc7831feabd0a49a3b7a14dacdacfef764 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -246,18 +246,35 @@ enum arm11_regcache_ids
 
 #define ARM11_GDB_REGISTER_COUNT       26
 
-static uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+/* FIXME these are *identical* to the ARMv4_5 dummies ...  except
+ * for their names, and being static vs global, and having different
+ * addresses.  Ditto ARMv7a and ARMv7m dummies.
+ */
+
+static uint8_t arm11_gdb_dummy_fp_value[12];
 
 static struct reg arm11_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point register",
+       .value = arm11_gdb_dummy_fp_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 96,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
-static uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0};
+static uint8_t arm11_gdb_dummy_fps_value[4];
 
 static struct reg arm11_gdb_dummy_fps_reg =
 {
-       "GDB dummy floating-point status register", arm11_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point status register",
+       .value = arm11_gdb_dummy_fps_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 32,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
 
@@ -1979,8 +1996,6 @@ static int arm11_build_reg_cache(struct target *target)
                r->value                        = (uint8_t *)(arm11->reg_values + i);
                r->dirty                        = 0;
                r->valid                        = 0;
-               r->bitfield_desc        = NULL;
-               r->num_bitfields        = 0;
                r->arch_type            = arm11_regs_arch_type;
                r->arch_info            = rs;
 

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 6e3eff68e79b68c96eb48a8d6fe468dff70fc01d..aa05e83158c64a3813b3bd495dbbd643faf2eb76 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -32,22 +32,6 @@
 #include "binarybuffer.h"
 
 
-struct bitfield_desc armv4_5_psr_bitfield_desc[] =
-{
-       {"M[4:0]", 5},
-       {"T", 1},
-       {"F", 1},
-       {"I", 1},
-       {"reserved", 16},
-       {"J", 1},
-       {"reserved", 2},
-       {"Q", 1},
-       {"V", 1},
-       {"C", 1},
-       {"Z", 1},
-       {"N", 1},
-};
-
 char* armv4_5_core_reg_list[] =
 {
        "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13_usr", "lr_usr", "pc",
@@ -157,14 +141,26 @@ uint8_t armv4_5_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
 
 struct reg armv4_5_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", armv4_5_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point register",
+       .value = armv4_5_gdb_dummy_fp_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 96,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
 uint8_t armv4_5_gdb_dummy_fps_value[] = {0, 0, 0, 0};
 
 struct reg armv4_5_gdb_dummy_fps_reg =
 {
-       "GDB dummy floating-point status register", armv4_5_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point status register",
+       .value = armv4_5_gdb_dummy_fps_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 32,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
 int armv4_5_get_core_reg(struct reg *reg)
@@ -278,8 +274,6 @@ struct reg_cache* armv4_5_build_reg_cache(struct target *target, struct arm *arm
                reg_list[i].value = calloc(1, 4);
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
                reg_list[i].arch_type = armv4_5_core_reg_arch_type;
                reg_list[i].arch_info = &arch_info[i];
        }

diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 0474a5608163e950c1e06f855b4284e215365ede..c94d3b0f3b8aea6c76dd520db8dbf461f1fa825d 100644 (file)
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -35,25 +35,6 @@
 #include <string.h>
 #include <unistd.h>
 
-struct bitfield_desc armv7a_psr_bitfield_desc[] =
-{
-       {"M[4:0]", 5},
-       {"T", 1},
-       {"F", 1},
-       {"I", 1},
-       {"A", 1},
-       {"E", 1},
-       {"IT[7:2]", 6},
-       {"GE[3:0]", 4},
-       {"reserved(DNM)", 4},
-       {"J", 1},
-       {"IT[0:1]", 2},
-       {"Q", 1},
-       {"V", 1},
-       {"C", 1},
-       {"Z", 1},
-       {"N", 1},
-};
 
 char* armv7a_core_reg_list[] =
 {
@@ -165,12 +146,20 @@ int armv7a_core_reg_map[8][17] =
        }
 };
 
+/* FIXME this dummy is IDENTICAL to the armv4_5, arm11, and armv7m
+ * ones... except for naming/scoping
+ */
 uint8_t armv7a_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
 
 struct reg armv7a_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", armv7a_gdb_dummy_fp_value,
-                       0, 1, 96, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point register",
+       .value = armv7a_gdb_dummy_fp_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 96,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
 void armv7a_show_fault_registers(struct target *target)

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index f33964521c0f358f14975c40d44e21e903a47780..ff97a4cb7264c55281b0d8c8a0ab5489762d0079 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -57,20 +57,33 @@ static char *armv7m_exception_strings[] =
        "DebugMonitor", "RESERVED", "PendSV", "SysTick"
 };
 
-static uint8_t armv7m_gdb_dummy_fp_value[12] = {
-       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-};
+/* FIXME these dummies are IDENTICAL to the armv4_5, arm11, and armv7a
+ * ones... except for naming/scoping
+ */
+static uint8_t armv7m_gdb_dummy_fp_value[12];
 
 static struct reg armv7m_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", armv7m_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point register",
+       .value = armv7m_gdb_dummy_fp_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 96,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
-static uint8_t armv7m_gdb_dummy_fps_value[] = {0, 0, 0, 0};
+static uint8_t armv7m_gdb_dummy_fps_value[4];
 
 static struct reg armv7m_gdb_dummy_fps_reg =
 {
-       "GDB dummy floating-point status register", armv7m_gdb_dummy_fps_value, 0, 1, 32, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point status register",
+       .value = armv7m_gdb_dummy_fps_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 32,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
 #ifdef ARMV7_GDB_HACKS
@@ -78,7 +91,13 @@ uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0};
 
 struct reg armv7m_gdb_dummy_cpsr_reg =
 {
-       "GDB dummy cpsr register", armv7m_gdb_dummy_cpsr_value, 0, 1, 32, NULL, 0, NULL, 0
+       .name = "GDB dummy cpsr register",
+       .value = armv7m_gdb_dummy_cpsr_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 32,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 #endif
 
@@ -563,8 +582,6 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target)
                reg_list[i].value = calloc(1, 4);
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
                reg_list[i].arch_type = armv7m_core_reg_arch_type;
                reg_list[i].arch_info = &arch_info[i];
        }

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index e73cb7f312e8245b1594dc81a1a4498291827fb4..292504beb032aea0f4d0695a0796b040a7b36c95 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -201,8 +201,6 @@ embeddedice_build_reg_cache(struct target *target, struct arm7_9_common *arm7_9)
                reg_list[i].size = eice_regs[i].width;
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
                reg_list[i].value = calloc(1, 4);
                reg_list[i].arch_info = &arch_info[i];
                reg_list[i].arch_type = embeddedice_reg_arch_type;

diff --git a/src/target/etb.c b/src/target/etb.c
index 2e8e7ca4bb6027cd6b972b6a69824de43f441976..e65cd5a35689ebd80a0616337567bb1ed46e447b 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -150,8 +150,6 @@ struct reg_cache* etb_build_reg_cache(struct etb *etb)
                reg_list[i].size = 32;
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
                reg_list[i].value = calloc(1, 4);
                reg_list[i].arch_info = &arch_info[i];
                reg_list[i].arch_type = etb_reg_arch_type;

diff --git a/src/target/mips32.c b/src/target/mips32.c
index fe22dd57a4331eafd7af823af8d4a13d55d6a51f..6432a9034353f64a9fc25b056019cf267f626c0c 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -90,7 +90,13 @@ uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0};
 
 struct reg mips32_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", mips32_gdb_dummy_fp_value, 0, 1, 32, NULL, 0, NULL, 0
+       .name = "GDB dummy floating-point register",
+       .value = mips32_gdb_dummy_fp_value,
+       .dirty = 0,
+       .valid = 1,
+       .size = 32,
+       .arch_info = NULL,
+       .arch_type = 0,
 };
 
 int mips32_core_reg_arch_type = -1;
@@ -306,8 +312,6 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
                reg_list[i].value = calloc(1, 4);
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
-               reg_list[i].bitfield_desc = NULL;
-               reg_list[i].num_bitfields = 0;
                reg_list[i].arch_type = mips32_core_reg_arch_type;
                reg_list[i].arch_info = &arch_info[i];
        }

diff --git a/src/target/register.h b/src/target/register.h
index a907dc27e3221fc569ad945eaededd40c9958f4a..c21edf64982815ee03009dd8b6d5798ef4a63224 100644 (file)
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -27,12 +27,6 @@
 
 struct target;
 
-struct bitfield_desc
-{
-       char *name;
-       int num_bits;
-};
-
 struct reg
 {
        char *name;
@@ -40,8 +34,6 @@ struct reg
        int dirty;
        int valid;
        uint32_t size;
-       struct bitfield_desc *bitfield_desc;
-       int num_bitfields;
        void *arch_info;
        int arch_type;
 };

diff --git a/src/target/xscale.c b/src/target/xscale.c
index ca3ea2ae89ffe4a31029e632fcf9b031eb1d7f1c..10ccf5dd19a294229559990c347cf4a7b4abb9e6 100644 (file)
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2849,8 +2849,6 @@ static void xscale_build_reg_cache(struct target *target)
                (*cache_p)->reg_list[i].dirty = 0;
                (*cache_p)->reg_list[i].valid = 0;
                (*cache_p)->reg_list[i].size = 32;
-               (*cache_p)->reg_list[i].bitfield_desc = NULL;
-               (*cache_p)->reg_list[i].num_bitfields = 0;
                (*cache_p)->reg_list[i].arch_info = &arch_info[i];
                (*cache_p)->reg_list[i].arch_type = xscale_reg_arch_type;
                arch_info[i] = xscale_reg_arch_info[i];