- added str912 test example, and test result

git-svn-id: svn://svn.berlios.de/openocd/trunk@410 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/testing/examples/STR912Test/inc/typedefs.h b/testing/examples/STR912Test/inc/typedefs.h
new file mode 100644 (file)
index 0000000..2eaea9b
--- /dev/null
+++ b/testing/examples/STR912Test/inc/typedefs.h
@@ -0,0 +1,50 @@
+/****************************************************************************
+*  Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+*  Redistribution and use in source and binary forms, with or without 
+*  modification, are permitted provided that the following conditions 
+*  are met:
+*  
+*  1. Redistributions of source code must retain the above copyright 
+*     notice, this list of conditions and the following disclaimer.
+*  2. Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in the 
+*     documentation and/or other materials provided with the distribution.
+*  3. Neither the name of the author nor the names of its contributors may 
+*     be used to endorse or promote products derived from this software 
+*     without specific prior written permission.
+*
+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+*  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 
+*  THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 
+*  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 
+*  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 
+*  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 
+*  AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
+*  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 
+*  THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 
+*  SUCH DAMAGE.
+*
+****************************************************************************
+*  History:
+*
+*  30.03.06  mifi   First Version for Insight tutorial
+****************************************************************************/
+#ifndef __TYPEDEFS_H__
+#define __TYPEDEFS_H__
+
+/*
+ * Some types to use Windows like source
+ */
+typedef char            CHAR;    /* 8-bit signed data    */
+typedef unsigned char   BYTE;    /* 8-bit unsigned data  */
+typedef unsigned short  WORD;    /* 16-bit unsigned data */
+typedef long            LONG;    /* 32-bit signed data   */
+typedef unsigned long   ULONG;   /* 32-bit unsigned data */
+typedef unsigned long   DWORD;   /* 32-bit unsigned data */
+
+
+#endif /* !__TYPEDEFS_H__ */
+/*** EOF ***/

diff --git a/testing/examples/STR912Test/makefile b/testing/examples/STR912Test/makefile
new file mode 100644 (file)
index 0000000..00e1fca
--- /dev/null
+++ b/testing/examples/STR912Test/makefile
@@ -0,0 +1,146 @@
+#\r
+#       !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!    \r
+#\r
+##############################################################################################\r
+# \r
+# On command line:\r
+#\r
+# make all = Create project\r
+#\r
+# make clean = Clean project files.\r
+#\r
+# To rebuild project do "make clean" and "make all".\r
+#\r
+\r
+##############################################################################################\r
+# Start of default section\r
+#\r
+\r
+TRGT = arm-elf-\r
+CC   = $(TRGT)gcc\r
+CP   = $(TRGT)objcopy\r
+AS   = $(TRGT)gcc -x assembler-with-cpp\r
+BIN  = $(CP) -O ihex \r
+\r
+MCU  = arm9e\r
+\r
+# List all default C defines here, like -D_DEBUG=1\r
+DDEFS = \r
+\r
+# List all default ASM defines here, like -D_DEBUG=1\r
+DADEFS = \r
+\r
+# List all default directories to look for include files here\r
+DINCDIR = \r
+\r
+# List the default directory to look for the libraries here\r
+DLIBDIR =\r
+\r
+# List all default libraries here\r
+DLIBS = \r
+\r
+#\r
+# End of default section\r
+##############################################################################################\r
+\r
+##############################################################################################\r
+# Start of user section\r
+#\r
+\r
+# Define project name here\r
+PROJECT = test\r
+\r
+# Define linker script file here\r
+LDSCRIPT_RAM = ./prj/str912_ram.ld\r
+LDSCRIPT_ROM = ./prj/str912_rom.ld\r
+\r
+# List all user C define here, like -D_DEBUG=1\r
+UDEFS = \r
+\r
+# Define ASM defines here\r
+UADEFS = \r
+\r
+# List C source files here\r
+SRC  = ./src/main.c\r
+\r
+# List ASM source files here\r
+ASRC = ./src/startup.s\r
+\r
+# List all user directories here\r
+UINCDIR = ./inc\r
+\r
+# List the user directory to look for the libraries here\r
+ULIBDIR =\r
+\r
+# List all user libraries here\r
+ULIBS = \r
+\r
+# Define optimisation level here\r
+OPT = -O0\r
+\r
+#\r
+# End of user defines\r
+##############################################################################################\r
+\r
+\r
+INCDIR  = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))\r
+LIBDIR  = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))\r
+DEFS    = $(DDEFS) $(UDEFS)\r
+ADEFS   = $(DADEFS) $(UADEFS)\r
+OBJS    = $(ASRC:.s=.o) $(SRC:.c=.o)\r
+LIBS    = $(DLIBS) $(ULIBS)\r
+MCFLAGS = -mcpu=$(MCU)\r
+\r
+ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)\r
+CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)\r
+LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)\r
+LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)\r
+\r
+# Generate dependency information\r
+CPFLAGS += -MD -MP -MF .dep/$(@F).d\r
+\r
+#\r
+# makefile rules\r
+#\r
+\r
+all: RAM ROM\r
+\r
+RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex\r
+\r
+ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex\r
+\r
+%o : %c\r
+       $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@\r
+\r
+%o : %s\r
+       $(AS) -c $(ASFLAGS) $< -o $@\r
+\r
+%ram.elf: $(OBJS)\r
+       $(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@\r
+\r
+%rom.elf: $(OBJS)\r
+       $(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@\r
+\r
+%hex: %elf\r
+       $(BIN) $< $@\r
+\r
+clean:\r
+       -rm -f $(OBJS)\r
+       -rm -f $(PROJECT)_ram.elf\r
+       -rm -f $(PROJECT)_ram.map\r
+       -rm -f $(PROJECT)_ram.hex\r
+       -rm -f $(PROJECT)_rom.elf\r
+       -rm -f $(PROJECT)_rom.map\r
+       -rm -f $(PROJECT)_rom.hex\r
+       -rm -f $(SRC:.c=.c.bak)\r
+       -rm -f $(SRC:.c=.lst)\r
+       -rm -f $(ASRC:.s=.s.bak)\r
+       -rm -f $(ASRC:.s=.lst)\r
+       -rm -fR .dep\r
+\r
+# \r
+# Include the dependency files, should be the last of the makefile\r
+#\r
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)\r
+\r
+# *** EOF ***
\ No newline at end of file

diff --git a/testing/examples/STR912Test/prj/eclipse_ram.gdb b/testing/examples/STR912Test/prj/eclipse_ram.gdb
new file mode 100644 (file)
index 0000000..56a7091
--- /dev/null
+++ b/testing/examples/STR912Test/prj/eclipse_ram.gdb
@@ -0,0 +1,21 @@
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+monitor arm7_9 sw_bkpts enable\r
+\r
+# Set SRAM size to 96 KB\r
+monitor mww 0x5C002034 0x0197\r
+monitor mdw 0x5C002034\r
+\r
+# Set Flash, Bank0 size to 512 KB\r
+monitor mww 0x54000000 0xf\r
+\r
+load\r
+break main\r
+continue\r
+\r
+\r
+\r
+\r

diff --git a/testing/examples/STR912Test/prj/eclipse_rom.gdb b/testing/examples/STR912Test/prj/eclipse_rom.gdb
new file mode 100644 (file)
index 0000000..87d1abc
--- /dev/null
+++ b/testing/examples/STR912Test/prj/eclipse_rom.gdb
@@ -0,0 +1,21 @@
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+monitor arm7_9 force_hw_bkpts enable\r
+\r
+# Set SRAM size to 96 KB\r
+monitor mww 0x5C002034 0x0197\r
+monitor mdw 0x5C002034\r
+\r
+# Set Flash, Bank0 size to 512 KB\r
+monitor mww 0x54000000 0xf\r
+\r
+load\r
+break main\r
+continue\r
+\r
+\r
+\r
+\r

diff --git a/testing/examples/STR912Test/prj/str912_jtagkey.cfg b/testing/examples/STR912Test/prj/str912_jtagkey.cfg
new file mode 100644 (file)
index 0000000..7ba8dd2
--- /dev/null
+++ b/testing/examples/STR912Test/prj/str912_jtagkey.cfg
@@ -0,0 +1,45 @@
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+# tell gdb our flash memory map\r
+# and enable flash programming\r
+gdb_memory_map enable\r
+gdb_flash_program enable\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 1\r
+\r
+jtag_nsrst_delay 100\r
+jtag_ntrst_delay 100\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config trst_and_srst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 8 0x1 0x1 0xfe\r
+jtag_device 4 0x1 0xf 0xe\r
+jtag_device 5 0x1 0x1 0x1e\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm966e little reset_halt 1 arm966e\r
+run_and_halt_time 0 30\r
+\r
+target_script 0 gdb_program_config .\prj\str912_program.script\r
+\r
+working_area 0 0x50000000 16384 nobackup\r
+\r
+#flash bank str7x <base> <size> 0 0 <target#> <variant>\r
+flash bank str9x 0x00000000 0x00080000 0 0 0\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r

diff --git a/testing/examples/STR912Test/prj/str912_program.script b/testing/examples/STR912Test/prj/str912_program.script
new file mode 100644 (file)
index 0000000..07e366d
--- /dev/null
+++ b/testing/examples/STR912Test/prj/str912_program.script
@@ -0,0 +1,9 @@
+str9x flash_config 0 4 2 0 0x80000\r
+flash protect 0 0 7 off\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r

diff --git a/testing/examples/STR912Test/prj/str912_ram.ld b/testing/examples/STR912Test/prj/str912_ram.ld
new file mode 100644 (file)
index 0000000..0974b39
--- /dev/null
+++ b/testing/examples/STR912Test/prj/str912_ram.ld
@@ -0,0 +1,218 @@
+/***********************************************************************************\r
+*      Copyright 2005 Anglia Design\r
+*      This demo code and associated components are provided as is and has no warranty,\r
+*      implied or otherwise.  You are free to use/modify any of the provided\r
+*      code at your own risk in your applications with the expressed limitation\r
+*      of liability (see below)\r
+* \r
+*      LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY\r
+*      LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR\r
+*      INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER\r
+*      THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
+*\r
+*      Author                  : Spencer Oliver\r
+*      Web                     : www.anglia-designs.com\r
+*\r
+***********************************************************************************/\r
+\r
+/* Stack Sizes */\r
+\r
+       _STACKSIZE     = 1024;\r
+       _STACKSIZE_IRQ = 256;\r
+       _STACKSIZE_FIQ = 0;\r
+       _STACKSIZE_SVC = 1024;\r
+       _STACKSIZE_ABT = 0;\r
+       _STACKSIZE_UND = 0;\r
+       _HEAPSIZE      = 1024;\r
+\r
+/* Memory Definitions */\r
+\r
+MEMORY\r
+{\r
+       DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000\r
+}\r
+\r
+/* Section Definitions */\r
+\r
+SECTIONS\r
+{\r
+       /* first section is .text which is used for code */\r
+\r
+       .text :\r
+       {\r
+               KEEP(*(.vectors))\r
+               KEEP(*(.init))\r
+               *(.text .text.*)\r
+               *(.gnu.linkonce.t.*)\r
+               *(.glue_7t .glue_7)\r
+               KEEP(*(.fini))\r
+               *(.gcc_except_table)\r
+       } >DATA =0\r
+       . = ALIGN(4);\r
+\r
+       /* .ctors .dtors are used for c++ constructors/destructors */\r
+       \r
+       .ctors :\r
+       {\r
+               PROVIDE(__ctors_start__ = .);\r
+               KEEP(*(SORT(.ctors.*)))\r
+               KEEP(*(.ctors))\r
+               PROVIDE(__ctors_end__ = .);\r
+       } >DATA\r
+\r
+       .dtors :\r
+       {\r
+               PROVIDE(__dtors_start__ = .); \r
+               KEEP(*(SORT(.dtors.*)))\r
+               KEEP(*(.dtors))\r
+               PROVIDE(__dtors_end__ = .);\r
+       } >DATA\r
+       \r
+       /* .rodata section which is used for read-only data (constants) */\r
+\r
+       .rodata :\r
+       {\r
+               *(.rodata .rodata.*)\r
+               *(.gnu.linkonce.r.*)\r
+       } >DATA\r
+       . = ALIGN(4);\r
+\r
+       _etext = .;\r
+       PROVIDE (etext = .);\r
+\r
+       /* .data section which is used for initialized data */\r
+\r
+       .data : AT (_etext)\r
+       {\r
+               *(.data .data.*)\r
+               *(.gnu.linkonce.d.*)\r
+               SORT(CONSTRUCTORS)\r
+       } >DATA\r
+       . = ALIGN(4);\r
+       \r
+       __data_start = .;\r
+       _edata = .;\r
+       PROVIDE (edata = .);\r
+\r
+       /* .bss section which is used for uninitialized data */\r
+\r
+       .bss :\r
+       {\r
+               __bss_start = .;\r
+               __bss_start__ = .;\r
+               *(.bss .bss.*)\r
+               *(.gnu.linkonce.b.*)\r
+               *(COMMON)\r
+               . = ALIGN(4);\r
+       } >DATA\r
+       . = ALIGN(4);\r
+       __bss_end__ = .;\r
+       \r
+       _end = .;\r
+       PROVIDE(end = .);\r
+\r
+       /* .heap section which is used for memory allocation */\r
+       \r
+       .heap (NOLOAD) :\r
+       {\r
+               __heap_start__ = .;\r
+               *(.heap)\r
+               . = MAX(__heap_start__ + _HEAPSIZE , .);\r
+       } >DATA\r
+       __heap_end__ = __heap_start__ + SIZEOF(.heap);\r
+       \r
+       /* .stack section - user mode stack */\r
+       \r
+       .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_start__ = .;\r
+               *(.stack)\r
+               . = MAX(__stack_start__ + _STACKSIZE , .);\r
+       } >DATA\r
+       __stack_end__ = __stack_start__ + SIZEOF(.stack);\r
+\r
+       /* .stack_irq section */\r
+       \r
+       .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_irq_start__ = .;\r
+               *(.stack_irq)\r
+               . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);\r
+       } >DATA\r
+       __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);\r
+\r
+       /* .stack_fiq section */\r
+       \r
+       .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_fiq_start__ = .;\r
+               *(.stack_fiq)\r
+           . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);\r
+       } >DATA\r
+       __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);\r
+\r
+       /* .stack_svc section */\r
+       \r
+       .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_svc_start__ = .;\r
+               *(.stack_svc)\r
+               . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);\r
+       } >DATA\r
+       __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);\r
+\r
+       /* .stack_abt section */\r
+       \r
+       .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_abt_start__ = .;\r
+               *(.stack_abt)\r
+               . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);\r
+       } >DATA\r
+       __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);\r
+\r
+       /* .stack_und section */\r
+       \r
+       .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_und_start__ = .;\r
+               *(.stack_und)\r
+       . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);\r
+       } >DATA\r
+       __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);\r
+       \r
+       /* Stabs debugging sections.  */\r
+       .stab          0 : { *(.stab) }\r
+       .stabstr       0 : { *(.stabstr) }\r
+       .stab.excl     0 : { *(.stab.excl) }\r
+       .stab.exclstr  0 : { *(.stab.exclstr) }\r
+       .stab.index    0 : { *(.stab.index) }\r
+       .stab.indexstr 0 : { *(.stab.indexstr) }\r
+       .comment       0 : { *(.comment) }\r
+       /* DWARF debug sections.\r
+               Symbols in the DWARF debugging sections are relative to the beginning\r
+               of the section so we begin them at 0.  */\r
+       /* DWARF 1 */\r
+       .debug          0 : { *(.debug) }\r
+       .line           0 : { *(.line) }\r
+       /* GNU DWARF 1 extensions */\r
+       .debug_srcinfo  0 : { *(.debug_srcinfo) }\r
+       .debug_sfnames  0 : { *(.debug_sfnames) }\r
+       /* DWARF 1.1 and DWARF 2 */\r
+       .debug_aranges  0 : { *(.debug_aranges) }\r
+       .debug_pubnames 0 : { *(.debug_pubnames) }\r
+       /* DWARF 2 */\r
+       .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+       .debug_abbrev   0 : { *(.debug_abbrev) }\r
+       .debug_line     0 : { *(.debug_line) }\r
+       .debug_frame    0 : { *(.debug_frame) }\r
+       .debug_str      0 : { *(.debug_str) }\r
+       .debug_loc      0 : { *(.debug_loc) }\r
+       .debug_macinfo  0 : { *(.debug_macinfo) }\r
+       /* SGI/MIPS DWARF 2 extensions */\r
+       .debug_weaknames 0 : { *(.debug_weaknames) }\r
+       .debug_funcnames 0 : { *(.debug_funcnames) }\r
+       .debug_typenames 0 : { *(.debug_typenames) }\r
+       .debug_varnames  0 : { *(.debug_varnames) }     \r
+}\r
+\r

diff --git a/testing/examples/STR912Test/prj/str912_rom.ld b/testing/examples/STR912Test/prj/str912_rom.ld
new file mode 100644 (file)
index 0000000..8cbb7f7
--- /dev/null
+++ b/testing/examples/STR912Test/prj/str912_rom.ld
@@ -0,0 +1,249 @@
+/***********************************************************************************\r
+*      Copyright 2005 Anglia Design\r
+*      This demo code and associated components are provided as is and has no warranty,\r
+*      implied or otherwise.  You are free to use/modify any of the provided\r
+*      code at your own risk in your applications with the expressed limitation\r
+*      of liability (see below)\r
+* \r
+*      LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY\r
+*      LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR\r
+*      INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER\r
+*      THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.\r
+*\r
+*      Author                  : Spencer Oliver\r
+*      Web                     : www.anglia-designs.com\r
+*\r
+***********************************************************************************/\r
+\r
+/* Stack Sizes */\r
+\r
+       _STACKSIZE     = 1024;\r
+       _STACKSIZE_IRQ = 256;\r
+       _STACKSIZE_FIQ = 0;\r
+       _STACKSIZE_SVC = 1024;\r
+       _STACKSIZE_ABT = 0;\r
+       _STACKSIZE_UND = 0;\r
+       _HEAPSIZE      = 1024;\r
+\r
+/* Memory Definitions */\r
+\r
+MEMORY\r
+{\r
+       CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000\r
+       DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000\r
+}\r
+\r
+/* Section Definitions */\r
+\r
+SECTIONS\r
+{\r
+       /* first section is .text which is used for code */\r
+\r
+       .text :\r
+       {\r
+               CREATE_OBJECT_SYMBOLS\r
+               KEEP(*(.vectors))\r
+               KEEP(*(.init))\r
+               *(.text .text.*)\r
+               *(.gnu.linkonce.t.*)\r
+               *(.glue_7t) *(.glue_7) *(.vfp11_veneer)\r
+               KEEP(*(.fini))\r
+               *(.gcc_except_table)\r
+       } >CODE =0\r
+       . = ALIGN(4);\r
+\r
+       /* .ctors .dtors are used for c++ constructors/destructors */\r
+       \r
+       .ctors :\r
+       {\r
+               PROVIDE(__ctors_start__ = .);\r
+               KEEP(*(SORT(.ctors.*)))\r
+               KEEP(*(.ctors))\r
+               PROVIDE(__ctors_end__ = .);\r
+       } >CODE\r
+\r
+       .dtors :\r
+       {\r
+               PROVIDE(__dtors_start__ = .); \r
+               KEEP(*(SORT(.dtors.*)))\r
+               KEEP(*(.dtors))\r
+               PROVIDE(__dtors_end__ = .);\r
+       } >CODE\r
+       \r
+       /* .rodata section which is used for read-only data (constants) */\r
+\r
+       .rodata :\r
+       {\r
+               *(.rodata .rodata.*)\r
+               *(.gnu.linkonce.r.*)\r
+       } >CODE\r
+       . = ALIGN(4);\r
+\r
+       .init_array :\r
+       {\r
+               *(.init)\r
+        *(.fini)\r
+               PROVIDE_HIDDEN (__preinit_array_start = .);\r
+               KEEP (*(.preinit_array))\r
+               PROVIDE_HIDDEN (__preinit_array_end = .);\r
+               PROVIDE_HIDDEN (__init_array_start = .);\r
+               KEEP (*(SORT(.init_array.*)))\r
+               KEEP (*(.init_array))\r
+               PROVIDE_HIDDEN (__init_array_end = .);\r
+               PROVIDE_HIDDEN (__fini_array_start = .);\r
+               KEEP (*(.fini_array))\r
+               KEEP (*(SORT(.fini_array.*)))\r
+               PROVIDE_HIDDEN (__fini_array_end = .);\r
+       } >CODE\r
+\r
+       . = ALIGN(4);\r
+\r
+       /* .ARM.exidx is sorted, so has to go in its own output section.  */\r
+       __exidx_start = .;\r
+       .ARM.exidx :\r
+       {\r
+               *(.ARM.exidx* .gnu.linkonce.armexidx.*)\r
+       } >CODE\r
+       __exidx_end = .;\r
+\r
+       _etext = .;\r
+       PROVIDE (etext = .);\r
+\r
+       /* .data section which is used for initialized data */\r
+\r
+       .data : AT (_etext)\r
+       {\r
+               __data_start = .;\r
+               *(.data .data.*)\r
+               *(.gnu.linkonce.d.*)\r
+               SORT(CONSTRUCTORS)\r
+               . = ALIGN(4);\r
+               *(.fastrun .fastrun.*)\r
+       } >DATA\r
+       . = ALIGN(4);\r
+       \r
+       _edata = .;\r
+       PROVIDE (edata = .);\r
+\r
+       /* .bss section which is used for uninitialized data */\r
+\r
+       .bss :\r
+       {\r
+               __bss_start = .;\r
+               __bss_start__ = .;\r
+               *(.bss .bss.*)\r
+               *(.gnu.linkonce.b.*)\r
+               *(COMMON)\r
+               . = ALIGN(4);\r
+       } >DATA\r
+       . = ALIGN(4);\r
+       __bss_end__ = .;\r
+       \r
+       _end = .;\r
+       PROVIDE(end = .);\r
+\r
+       /* .heap section which is used for memory allocation */\r
+       \r
+       .heap (NOLOAD) :\r
+       {\r
+               __heap_start__ = .;\r
+               *(.heap)\r
+               . = MAX(__heap_start__ + _HEAPSIZE , .);\r
+       } >DATA\r
+       __heap_end__ = __heap_start__ + SIZEOF(.heap);\r
+       \r
+       /* .stack section - user mode stack */\r
+       \r
+       .stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_start__ = .;\r
+               *(.stack)\r
+               . = MAX(__stack_start__ + _STACKSIZE , .);\r
+       } >DATA\r
+       __stack_end__ = __stack_start__ + SIZEOF(.stack);\r
+\r
+       /* .stack_irq section */\r
+       \r
+       .stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_irq_start__ = .;\r
+               *(.stack_irq)\r
+               . = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);\r
+       } >DATA\r
+       __stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);\r
+\r
+       /* .stack_fiq section */\r
+       \r
+       .stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_fiq_start__ = .;\r
+               *(.stack_fiq)\r
+           . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);\r
+       } >DATA\r
+       __stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);\r
+\r
+       /* .stack_svc section */\r
+       \r
+       .stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_svc_start__ = .;\r
+               *(.stack_svc)\r
+               . = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);\r
+       } >DATA\r
+       __stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);\r
+\r
+       /* .stack_abt section */\r
+       \r
+       .stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_abt_start__ = .;\r
+               *(.stack_abt)\r
+               . = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);\r
+       } >DATA\r
+       __stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);\r
+\r
+       /* .stack_und section */\r
+       \r
+       .stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :\r
+       {\r
+               __stack_und_start__ = .;\r
+               *(.stack_und)\r
+       . = MAX(__stack_und_start__ + _STACKSIZE_UND , .);\r
+       } >DATA\r
+       __stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);\r
+  \r
+       /* Stabs debugging sections.  */\r
+       .stab          0 : { *(.stab) }\r
+       .stabstr       0 : { *(.stabstr) }\r
+       .stab.excl     0 : { *(.stab.excl) }\r
+       .stab.exclstr  0 : { *(.stab.exclstr) }\r
+       .stab.index    0 : { *(.stab.index) }\r
+       .stab.indexstr 0 : { *(.stab.indexstr) }\r
+       .comment       0 : { *(.comment) }\r
+       /* DWARF debug sections.\r
+               Symbols in the DWARF debugging sections are relative to the beginning\r
+               of the section so we begin them at 0.  */\r
+       /* DWARF 1 */\r
+       .debug          0 : { *(.debug) }\r
+       .line           0 : { *(.line) }\r
+       /* GNU DWARF 1 extensions */\r
+       .debug_srcinfo  0 : { *(.debug_srcinfo) }\r
+       .debug_sfnames  0 : { *(.debug_sfnames) }\r
+       /* DWARF 1.1 and DWARF 2 */\r
+       .debug_aranges  0 : { *(.debug_aranges) }\r
+       .debug_pubnames 0 : { *(.debug_pubnames) }\r
+       /* DWARF 2 */\r
+       .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+       .debug_abbrev   0 : { *(.debug_abbrev) }\r
+       .debug_line     0 : { *(.debug_line) }\r
+       .debug_frame    0 : { *(.debug_frame) }\r
+       .debug_str      0 : { *(.debug_str) }\r
+       .debug_loc      0 : { *(.debug_loc) }\r
+       .debug_macinfo  0 : { *(.debug_macinfo) }\r
+       /* SGI/MIPS DWARF 2 extensions */\r
+       .debug_weaknames 0 : { *(.debug_weaknames) }\r
+       .debug_funcnames 0 : { *(.debug_funcnames) }\r
+       .debug_typenames 0 : { *(.debug_typenames) }\r
+       .debug_varnames  0 : { *(.debug_varnames) }     \r
+}\r
+\r

diff --git a/testing/examples/STR912Test/src/main.c b/testing/examples/STR912Test/src/main.c
new file mode 100644 (file)
index 0000000..4579f17
--- /dev/null
+++ b/testing/examples/STR912Test/src/main.c
@@ -0,0 +1,91 @@
+/****************************************************************************
+*  Copyright (c) 2006 by Michael Fischer. All rights reserved.
+*
+*  Redistribution and use in source and binary forms, with or without 
+*  modification, are permitted provided that the following conditions 
+*  are met:
+*  
+*  1. Redistributions of source code must retain the above copyright 
+*     notice, this list of conditions and the following disclaimer.
+*  2. Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in the 
+*     documentation and/or other materials provided with the distribution.
+*  3. Neither the name of the author nor the names of its contributors may 
+*     be used to endorse or promote products derived from this software 
+*     without specific prior written permission.
+*
+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
+*  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 
+*  THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 
+*  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 
+*  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 
+*  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 
+*  AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
+*  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 
+*  THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 
+*  SUCH DAMAGE.
+*
+****************************************************************************
+*  History:
+*
+*  30.03.06  mifi   First Version for Insight tutorial
+*  26.01.08  mifi   Added variable "d" to test const variable.
+****************************************************************************/
+#define __MAIN_C__
+
+/*
+ * I use the include only, to show
+ * how to setup a include dir in the makefile
+ */
+#include "typedefs.h"
+
+/*=========================================================================*/
+/*  DEFINE: All Structures and Common Constants                            */
+/*=========================================================================*/
+
+/*=========================================================================*/
+/*  DEFINE: Prototypes                                                     */
+/*=========================================================================*/
+
+/*=========================================================================*/
+/*  DEFINE: Definition of all local Data                                   */
+/*=========================================================================*/
+static const DWORD d = 7;
+
+/*=========================================================================*/
+/*  DEFINE: Definition of all local Procedures                             */
+/*=========================================================================*/
+
+/*=========================================================================*/
+/*  DEFINE: All code exported                                              */
+/*=========================================================================*/
+/***************************************************************************/
+/*  main                                                                   */
+/***************************************************************************/
+int main (void)
+{
+  DWORD a = 1;
+  DWORD b = 2;
+  DWORD c = 0;
+  
+  a = a + d;
+    
+  while (1)
+  {
+    a++;
+    b++;
+    c = a + b;
+  }
+  
+  /*
+   * This return here make no sense.
+   * But to prevent the compiler warning:
+   * "return type of 'main' is not 'int'
+   * we use an int as return :-)
+   */ 
+  return(0);
+}
+
+/*** EOF ***/

diff --git a/testing/examples/STR912Test/src/startup.s b/testing/examples/STR912Test/src/startup.s
new file mode 100644 (file)
index 0000000..15f03d2
--- /dev/null
+++ b/testing/examples/STR912Test/src/startup.s
@@ -0,0 +1,222 @@
+/***********************************************************************************
+*      Copyright 2005 Anglia Design
+*      This demo code and associated components are provided as is and has no warranty,
+*      implied or otherwise.  You are free to use/modify any of the provided
+*      code at your own risk in your applications with the expressed limitation
+*      of liability (see below)
+* 
+*      LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY
+*      LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR
+*      INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER
+*      THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
+*
+*      Author  : Spencer Oliver
+*      Web             : www.anglia-designs.com
+*
+*     mifi, 22.01.2008, small changes by the init of the C++ eabi constructors. 
+*                       Here I have replaced the eabi init by the normal init.
+*                       Thanks to Spen for the startup code. 
+***********************************************************************************/
+
+/**** Startup Code (executed after Reset) ****/
+
+/* Frequency values kHz */
+/* set to suit target hardware */
+
+       .equ    FOSC,                   25000
+       
+/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
+
+       .equ    Mode_USR,               0x10
+       .equ    Mode_FIQ,               0x11
+       .equ    Mode_IRQ,               0x12
+       .equ    Mode_SVC,               0x13
+       .equ    Mode_ABT,               0x17
+       .equ    Mode_UND,               0x1B
+       .equ    Mode_SYS,               0x1F                    /* available on ARM Arch 4 and later */
+
+       .equ    I_Bit,                  0x80                    /* when I bit is set, IRQ is disabled */
+       .equ    F_Bit,                  0x40                    /* when F bit is set, FIQ is disabled */
+
+       .equ    SRAM32,                 0x00
+       .equ    SRAM64,                 0x08
+       .equ    SRAM96,                 0x10
+
+/* --- System memory locations */
+
+       .equ    SCRO_AHB_UMB,           0x5C002034              /* System configuration register 0 (unbuffered) */
+
+       .equ    FMI_BASE_UMB,           0x54000000              /* Flash FMI base address (unbuffered) */
+       .equ    BBSR_off_addr,          0x00
+       .equ    NBBSR_off_addr,         0x04
+       .equ    BBADR_off_addr,         0x0C
+       .equ    NBBADR_off_addr,        0x10
+       .equ    CR_off_addr,            0x18
+
+.ifndef LIBUFF
+       .equ    LIBUFF, 0
+.endif
+
+/* Startup Code must be linked first at Address at which it expects to run. */
+
+       .text
+       .arm
+       .section .init, "ax"
+       
+       .global _start
+       .global _Main_Crystal
+
+/* After remap this will be our reset handler */
+
+_start:
+               LDR     pc, =NextInst
+NextInst:
+
+               NOP             /* Wait for OSC stabilization */
+               NOP
+               NOP
+               NOP
+               NOP
+               NOP
+               NOP
+               NOP
+               NOP
+
+/* Enable buffered mode */
+
+.if LIBUFF
+               MRC             p15, 0, r0, c1, c0, 0           /* Read CP15 register 1 into r0 */
+               ORR             r0, r0, #0x8                            /* Enable Write Buffer on AHB */
+               MCR             p15, 0, r0, c1, c0, 0           /* Write CP15 register 1 */
+.endif
+
+/* Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000, */
+/* when the bank 0 is the boot bank, then enable the Bank 1. */
+
+               LDR             r0, =FMI_BASE_UMB
+               LDR             r1, =0x4                                        /* configure 512KB Boot bank 0 */
+               STR             r1, [r0, #BBSR_off_addr]
+
+               LDR             r1, =0x2                                        /* configure 32KB Non Boot bank 1 */
+               STR             r1, [r0, #NBBSR_off_addr]
+
+               LDR             r1, =(0x00000000 >> 2)          /* Boot Bank Base Address */
+               STR             r1, [r0, #BBADR_off_addr]
+
+               LDR             r1, =(0x00080000 >> 2)          /* Non Boot Bank Base Address */
+               STR             r1, [r0, #NBBADR_off_addr]
+
+               LDR             r1, =0x18                                       /* Flash Banks 0 1 enabled */
+               STR             r1, [r0, #CR_off_addr]
+               
+/* Enable 96K RAM */
+
+               LDR             r0, =SCRO_AHB_UMB
+#              LDR             r1, =0x0196                             /* prefetch disabled, default enabled */
+               LDR             r1, =0x0187|SRAM96
+               STR             r1, [r0]
+
+/* Set bits 17-18 (Instruction/Data TCM order) of the */
+/* Core Configuration Control Register */
+ 
+               MOV             r0, #0x60000
+               MCR             p15, 0x1, r0, c15, c1, 0
+  
+/* Setup Stack for each mode */
+
+/* Enter Abort Mode and set its Stack Pointer */
+
+               MSR             cpsr_c, #Mode_ABT|I_Bit|F_Bit
+               LDR             sp, =__stack_abt_end__
+
+/* Enter Undefined Instruction Mode and set its Stack Pointer */
+
+               MSR             cpsr_c, #Mode_UND|I_Bit|F_Bit
+               LDR             sp, =__stack_und_end__
+
+/* Enter Supervisor Mode and set its Stack Pointer */
+
+               MSR             cpsr_c, #Mode_SVC|I_Bit|F_Bit
+               LDR             sp, =__stack_svc_end__
+
+/* Enter FIQ Mode and set its Stack Pointer */
+
+               MSR             cpsr_c, #Mode_FIQ|I_Bit|F_Bit
+               LDR             sp, =__stack_fiq_end__
+
+/* Enter IRQ Mode and set its Stack Pointer */
+
+               MSR             cpsr_c, #Mode_IRQ|I_Bit|F_Bit
+               LDR             sp, =__stack_irq_end__
+
+/* Enter System/User Mode and set its Stack Pointer */
+
+               MSR             cpsr_c, #Mode_SYS
+               LDR             sp, =__stack_end__
+
+/* Setup a default Stack Limit (when compiled with "-mapcs-stack-check") */
+
+               LDR             sl, =__bss_end__
+
+/* Relocate .data section (Copy from ROM to RAM) */
+
+               LDR             r1, =_etext
+               LDR             r2, =__data_start
+               LDR             r3, =_edata
+LoopRel:
+               CMP             r2, r3
+               LDRLO   r0, [r1], #4
+               STRLO   r0, [r2], #4
+               BLO             LoopRel
+
+/* Clear .bss section (Zero init) */
+
+               MOV             r0, #0
+               LDR             r1, =__bss_start__
+               LDR             r2, =__bss_end__
+LoopZI:
+               CMP             r1, r2
+               STRLO   r0, [r1], #4
+               BLO             LoopZI
+               
+/* Call C++ constructors */
+
+               LDR             r0, =__ctors_start__
+               LDR             r1, =__ctors_end__
+ctor_loop:
+               CMP             r0, r1
+               BEQ             ctor_end
+               LDR             r2, [r0], #4
+               STMFD   sp!, {r0-r1}
+               BLX             r2
+               LDMFD           sp!, {r0-r1}
+               B               ctor_loop
+ctor_end:
+
+/* Need to set up standard file handles */
+/* Only used under simulator, normally overide syscall.c */
+
+#              BL              initialise_monitor_handles
+
+/* if we use debug version of str9lib this will call the init function */
+               
+               BL              libdebug
+libdebug:              
+
+/* Enter the C code, use B instruction so as to never return */
+/* use BL main if you want to use c++ destructors below */
+
+               B               main
+
+/* Return from main, loop forever. */
+
+#exit_loop:
+#              B               exit_loop
+       
+/* Fosc values, used by libstr9 */
+
+_Main_Crystal: .long   FOSC
+
+       .weak libdebug
+       
+       .end

diff --git a/testing/index.html b/testing/index.html
index 066a0c7ec39050f3188d2faf3fc89679d3a1b537..dc02bb605eb0b420f56e0b7a63b7a5d41e4e7e3d 100644 (file)
--- a/testing/index.html
+++ b/testing/index.html
@@ -84,6 +84,18 @@
                                <td align="center" width="110">320</td>
                                <td align="center" width="110"><b>406</b></td>
                        </tr>
                                <td align="center" width="110">320</td>
                                <td align="center" width="110"><b>406</b></td>
                        </tr>

+                       <tr>
+                               <td width="65"><a href="#bdte-ram">bdte-ram</a></td>
+                               <td width="150">str912 ram debugging</td>
+                               <td align="center" width="110">320</td>
+                               <td align="center" width="110">n/a</td>
+                       </tr>
+                       <tr>
+                               <td width="65"><a href="#bdte-rom">bdte-rom</a></td>
+                               <td width="150">str912 rom debugging</td>
+                               <td align="center" width="110">320</td>
+                               <td align="center" width="110">n/a</td>
+                       </tr>

                </table>
                <p></p>
                <hr>
                </table>
                <p></p>
                <hr>