srst_gates_jtag option. at91sam9260 needs retesting, and possibly srst_gates_jtag...
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Thu, 17 Sep 2009 11:23:41 +0000 (11:23 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Thu, 17 Sep 2009 11:23:41 +0000 (11:23 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60

doc/openocd.texi
src/jtag/jtag.h
src/jtag/tcl.c
src/target/arm7_9_common.c

index 0b6ecf028a18fceddc94e885169c039455d783b0..9f7314b0817b22af7c3b0a42048d996fff3c1b41 100644 (file)
@@ -2018,6 +2018,10 @@ haven't seen hardware with such a bug, and can be worked around).
 @option{combined} implies both @option{srst_pulls_trst} and
 @option{trst_pulls_srst}.
 
+@option{srst_gates_jtag} indicates that asserting SRST gates the
+JTAG clock. This means that no communication can happen on JTAG
+while SRST is asserted. 
+
 The optional @var{trst_type} and @var{srst_type} parameters allow the
 driver mode of each reset line to be specified.  These values only affect
 JTAG interfaces with support for different driver modes, like the Amontec
index b7bfd4cc9d4b3211061c0e0eba96eccf877bf147..f716806b48c7330658203c62c232fa4ebcac6641 100644 (file)
@@ -277,6 +277,7 @@ enum reset_types {
        RESET_TRST_PULLS_SRST = 0x8,
        RESET_TRST_OPEN_DRAIN = 0x10,
        RESET_SRST_PUSH_PULL  = 0x20,
+       RESET_SRST_GATES_JTAG = 0x40,
 };
 
 enum reset_types jtag_get_reset_config(void);
index e6928a2bfaa6b798d18f09c4830480d6fd631398..1658f76a264e0cf2a2c31dc52f465f4ea109d9f7 100644 (file)
@@ -845,6 +845,14 @@ static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *
                int tmp = 0;
                int m;
 
+               m = RESET_SRST_GATES_JTAG;
+               tmp = 0;
+               if (strcmp(*args, "srst_gates_jtag") == 0)
+               {
+                       tmp = RESET_SRST_GATES_JTAG;
+                       goto next;
+               }
+
                /* signals */
                m = RESET_HAS_TRST | RESET_HAS_SRST;
                if (strcmp(*args, "none") == 0)
index 9f05d777e0f49595c65433738b912670ac8e6e38..e2eb0d5cd4e4fa1bac72e05b0789e336857aed84 100644 (file)
@@ -1021,6 +1021,17 @@ int arm7_9_assert_reset(target_t *target)
                return ERROR_FAIL;
        }
 
+       /* at this point trst has been asserted/deasserted once. We want to
+        * program embedded ice while SRST is asserted, but some CPUs gate
+        * the JTAG clock while SRST is asserted
+        */
+       bool srst_asserted = false;
+       if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) && ((jtag_reset_config & RESET_SRST_GATES_JTAG) == 0))
+       {
+               jtag_add_reset(0, 1);
+               srst_asserted = true;
+       }
+
        if (target->reset_halt)
        {
                /*
@@ -1053,7 +1064,7 @@ int arm7_9_assert_reset(target_t *target)
        if (jtag_reset_config & RESET_SRST_PULLS_TRST)
        {
                jtag_add_reset(1, 1);
-       } else
+       } else if (!srst_asserted)
        {
                jtag_add_reset(0, 1);
        }

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