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target/cortex_m: Implement maskisr steponly option 73/4673/9
authorChristopher Head <chead@zaber.com>
Wed, 1 Aug 2018 17:21:15 +0000 (10:21 -0700)
committerFreddie Chopin <freddie.chopin@gmail.com>
Wed, 10 Apr 2019 19:05:32 +0000 (20:05 +0100)
commita4ac56152d9fc13c3fa479397407d9b86ffb13d8
tree3b543d588e490ba2e6f960695380d35427508a6ctree | snapshot
parent5b263d7b0c71d2560af5dabbeec051b807d9e6a3commit | diff
target/cortex_m: Implement maskisr steponly option

`maskisr steponly` disables interrupts during single-stepping but
enables them during normal execution. This can be used as a partial
workaround for 702596 erratum in Cortex-M7 r0p1. See "Cortex-M7 (AT610)
and Cortex-M7 with FPU (AT611) Software Developer Errata Notice" from
ARM for further details.

Change-Id: I797a14e4d43f6dcb3706528ee4ab452846ebf133
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4673
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
doc/openocd.texi diff | blob | history
src/target/cortex_m.c diff | blob | history
src/target/cortex_m.h diff | blob | history
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