Support for Freescale LS102x SAP 96/3096/9
authorEsben Haabendal <esben@haabendal.dk>
Tue, 10 Nov 2015 10:44:29 +0000 (11:44 +0100)
committerPaul Fertser <fercerpav@gmail.com>
Thu, 23 Jun 2016 06:37:36 +0000 (07:37 +0100)
commitf906c65fed5f3f2df54c6aaf2ea28d9742d44db4
tree67f4b97645f2e43625e65880f9d736357e2b50fe
parent406f4d1c68330e3bf8d9db4e402fd8802a5c79e2
Support for Freescale LS102x SAP

The SAP in LS102x SoC's from Freescale is able to read and write to all
physical memory locations, independently of CPU cores and DAP.

This implementation is 100% based on reverse-engineering of JTAG
communication with an LS1021A SAP using a JTAG debugger with SAP support.

And as such, this code is for now "works-for-me", pending verification
by other OpenOCD users, or even better, actual information from Freescale
on the SAP interface.

Change-Id: Ibb30945e017894da5c402f9f633fc513bed4e68c
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3096
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
README
doc/openocd.texi
src/target/Makefile.am
src/target/ls1_sap.c [new file with mode: 0644]
src/target/target.c