review.openocd Code Review - openocd.git/commit

author	Karl Palsson <karlp@tweak.net.au>
	Fri, 21 Nov 2014 22:14:57 +0000 (22:14 +0000)
committer	Andreas Fritiofson <andreas.fritiofson@gmail.com>
	Wed, 3 Dec 2014 09:10:21 +0000 (09:10 +0000)
commit	c3ec1940b52e5d3f47c5c96bea2430b4444d83ea
tree	aa08235d4625bca1f87bd199e9d38d354e463e99	tree \| snapshot
parent	12b41a3409ad310c2e2c42f59bff836a1d498b12	commit \| diff

stm32l: split l0/l1 support no jtag, different HSI settings

L0 is cortex m0+, so different id codes, SWD only, different addresses
for the clock speedup. It has no endian options, no boundary scan.

Removed all L0 specific portions from L1 files, and renamed files to clarify
their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only
around for backwards compatibility with prior releases.

Tested on STM32L053 Discovery and STM32L151 Discovery.

Has _not_ been tested with jtag on L1.

Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>

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tcl/board/stm32l0discovery.cfg		diff \| blob \| history
tcl/board/stm32ldiscovery.cfg		diff \| blob \| history
tcl/target/stm32l0.cfg	[new file with mode: 0644]	blob
tcl/target/stm32l1.cfg	[moved from tcl/target/stm32l.cfg with 85% similarity]	diff \| blob \| history
tcl/target/stm32l1x_dual_bank.cfg	[moved from tcl/target/stm32lx_dual_bank.cfg with 69% similarity]	diff \| blob \| history
tcl/target/stm32lx_stlink.cfg		diff \| blob \| history