target: xscale make reset init work properly 58/1458/2
authorRobert Jarzmik <robert.jarzmik@free.fr>
Mon, 24 Jun 2013 02:52:51 +0000 (04:52 +0200)
committerSpencer Oliver <spen@spen-soft.co.uk>
Mon, 1 Jul 2013 08:49:11 +0000 (08:49 +0000)
commit9188a9bc680702a10ed5ccd4a748829816fe172d
treec1e6a52d38442174f276b50f320d03ee5aecc3eb
parent12e25f34ebc9a62ac327d51229c32deda009addc
target: xscale make reset init work properly

On XScale architecture, to write debug control register DCSR
and activate JTAG debug (ie. to choose Halt Mode), the
enabling can only be done while the board is held in reset
state (ie. PXAxx #RST line held low).

The current implementation writes to the register before
asserting the SRST line. Swap the order to activate the SRST
line before writing to DCSR.

Change-Id: I914b9d53d39bdeb5fe4ee5e11068cafafe0da4d2
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-on: http://openocd.zylin.com/1458
Tested-by: jenkins
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/xscale.c