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(parent: aba11ae) | patch
arm_dpm: flush both scratch registers (R0 and R1) 06/4506/2
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fri, 27 Apr 2018 17:59:56 +0000 (19:59 +0200)
committerMatthias Welwarsky <matthias@welwarsky.de>
Fri, 27 Apr 2018 19:00:51 +0000 (20:00 +0100)
commit7b94ae9e520877e7f2341b48b3bd0c0d1ca8a14b
tree6c265fdf57c8988fc77e0daadbee666f7b92f559tree | snapshot
parentaba11ae6e2b63129512473906816d2051becf285commit | diff
arm_dpm: flush both scratch registers (R0 and R1)

Neither the initial loop to clear dirty registers (which visits all
registers starting at R2 and counting upwards) nor the final explicit
flushes ensure a write-back in arm_dpm_write_dirty_registers.

This change makes sure that both our scratch registers (i.e. R0 and
R1) are written back to the target.

Change-Id: If65be4f371cd40af9a0cfa97f3730b070b92e981
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-on: http://openocd.zylin.com/4506
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
src/target/arm_dpm.c diff | blob | history
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