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(parent: 7658681) | patch
cpld/virtex2: allow JSTART to be disabled 60/2860/3
authorRobert Jordens <jordens@gmail.com>
Fri, 3 Jul 2015 05:15:53 +0000 (23:15 -0600)
committerSpencer Oliver <spen@spen-soft.co.uk>
Thu, 6 Aug 2015 12:14:01 +0000 (13:14 +0100)
commit2d99a0defa8fde13d4f421d54dbb6246b908303d
treec1d7fa13a10341bdfbb04de06ead846b0eb95946tree | snapshot
parent76586814a58106c43549feea7a1e4ba16eee9c27commit | diff
cpld/virtex2: allow JSTART to be disabled

This adds an option to disable the use of the JSTART instruction
when loading bitstreams to xilinx fpgas. JSTART apparently prevents
configuration if the startup clock is not set to the jtag clock in
the bitstream.

xc3sprog is omitting JSTART for all devices. Problems with loading a bitstream
that does not have StartupClk:JTAGClk are described here:
http://www.xilinx.com/support/answers/56151.html

Change-Id: I8137c0bae05a8c3c6f8e2611869f70a770d1651d
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2860
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
doc/openocd.texi diff | blob | history
src/pld/virtex2.c diff | blob | history
src/pld/virtex2.h diff | blob | history
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