flash/nor/lpcspifi.c: fix bug that prevented clean reset after flash write 59/2359/2
authorAnders <anders@openpuma.org>
Mon, 27 Oct 2014 19:55:50 +0000 (12:55 -0700)
committerSpencer Oliver <spen@spen-soft.co.uk>
Mon, 24 Nov 2014 22:14:38 +0000 (22:14 +0000)
commit1662c854e200949ca47f56e6c2080f246662ba75
treea652c4d62728eddb3f80efa8b62b5a78c071f6c6
parent2162ca72ef74a8bc74e7db7f1c05c8a3610b3482
flash/nor/lpcspifi.c: fix bug that prevented clean reset after flash write

After SPI flash was written by the assembly language stub,
the last SPI command was not terminated by raising CS.
This left the SPI device in a hung state that prevented the
flash from being read by the M4 SPIFI controller, even after
the M4 was fully reset. To access the flash via SPIFI, it was
necessary to completely power cycle the board.

This fix adds the missing instructions to raise CS and
terminate the SPI command after the last byte. This allows
the M4 to be resumed or reset cleanly after flashing. The
SPIFI memory is now immediately accessable at address
0x1400 0000 after flashing is complete.

Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2359
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
contrib/loaders/flash/lpcspifi_write.S
src/flash/nor/lpcspifi.c