xilinx_bscan_spi: port to new migen and clean-up 73/3173/5
authorRobert Jordens <jordens@gmail.com>
Mon, 21 Dec 2015 20:36:14 +0000 (13:36 -0700)
committerPaul Fertser <fercerpav@gmail.com>
Tue, 4 Oct 2016 11:06:33 +0000 (12:06 +0100)
commit12aee423db1aa1d315392dbaa60122c871054714
tree06fdf8ae6a29d3ccbea68dd141bda004d9ebcc7f
parent400dbedaeec230d9438d2c95a61ee63f2c15cc6d
xilinx_bscan_spi: port to new migen and clean-up

* port to new migen
* streamline package/part specification
* add pullup (Series3, Series6) and pullnone (Series7) for unused pins
  as xilinx impact/vivado do it.
* specify respective toolchains
* build Series7 with vivado (broader support, faster)
* point to prebuilt bitstreams at https://github.com/jordens/bscan_spi_bitstreams

Change-Id: Ibfef3d78f855b754425f3e6131e2e49fa111e09a
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/3173
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Robert J├Ârdens
Reviewed-by: William D. Jones
Reviewed-by: Tim "mithro" Ansell <mithro@mithis.com>
contrib/loaders/flash/fpga/xilinx_bscan_spi.py