X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstr912.cfg;h=7426276bfbd1f6be406aca1acfec503f4661359c;hp=776a8e6d35987bf3b9e7ac994c787e89f9891b7e;hb=HEAD;hpb=594abeb82bdcbd4bd079ec1a80c092076c55ccae diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg index 776a8e6d35..3167b407cc 100644 --- a/tcl/target/str912.cfg +++ b/tcl/target/str912.cfg @@ -1,94 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + # script for str9 -# For more information about the configuration files, take a look at: -# openocd.texi -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME str912 +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME str912 } -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little } # jtag speed. We need to stick to 16kHz until we've finished reset. -jtag_rclk 16 +adapter speed 16 -jtag_nsrst_delay 100 +adapter srst delay 100 jtag_ntrst_delay 100 #use combined on interfaces or targets that can't set TRST/SRST separately -#reset_config trst_and_srst +reset_config trst_and_srst -if { [info exists FLASHTAPID ] } { +if { [info exists FLASHTAPID] } { set _FLASHTAPID $FLASHTAPID } else { set _FLASHTAPID 0x04570041 } -jtag newtap $_CHIPNAME flash \ - -irlen 8 -ircapture 0x1 -irmask 0x1 \ - -expected-id $_FLASHTAPID +jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x25966041 } -jtag newtap $_CHIPNAME cpu \ - -irlen 4 -ircapture 0x1 -irmask 0xf \ - -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID -if { [info exists BSTAPID ] } { - set _BSTAPID1 $BSTAPID - set _BSTAPID2 $BSTAPID +if { [info exists BSTAPID] } { + set _BSTAPID $BSTAPID } else { - set _BSTAPID1 0x1457f041 - set _BSTAPID2 0x2457f041 + # possible values: 0x1457f041, 0x2457f041 + # we ignore version in check below + set _BSTAPID 0x1457f041 } -jtag newtap $_CHIPNAME bs \ - -irlen 5 -ircapture 0x1 -irmask 0x1 \ - -expected-id $_BSTAPID1 -expected-id $_BSTAPID2 +jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -ignore-version -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm966e \ - -endian $_ENDIAN \ - -chain-position $_TARGETNAME \ - -variant arm966e +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -$_TARGETNAME configure -event reset-start { jtag_rclk 16 } +$_TARGETNAME configure -event reset-start { adapter speed 16 } -proc str9x_config { } { - # -- Enable 96K RAM w/: - # PFQBC enabled / DTCM & AHB wait-states disabled - mww 0x5C002034 0x0191 - # PFQBC disabled / DTCM & AHB wait-states enabled - #mww 0x5C002034 0x0196 +$_TARGETNAME configure -event reset-init { + # We can increase speed now that we know the target is halted. + #adapter speed 3000 - # 256K/32k - str9x flash_config 0 3 2 0 0x40000 - # 512K/32K - #str9x flash_config 0 4 2 0 0x80000 -} + # -- Enable 96K RAM + # PFQBC enabled / DTCM & AHB wait-states disabled + mww 0x5C002034 0x0191 -proc str9x_init { } { - # enable RTCK - jtag_rclk 0 - str9x_config + str9x flash_config 0 4 2 0 0x80000 + flash protect 0 0 7 off } -$_TARGETNAME configure -event reset-init str9x_init - -$_TARGETNAME configure \ - -work-area-virt 0 \ - -work-area-phys 0x50000000 \ - -work-area-size 16384 \ - -work-area-backup 0 +$_TARGETNAME configure -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0 #flash bank str9x 0 0 -flash bank str9x 0x00000000 0x00040000 0 0 0 -flash bank str9x 0x00040000 0x00008000 0 0 0 - +set _FLASHNAME $_CHIPNAME.flash0 +flash bank $_FLASHNAME str9x 0x00000000 0x00080000 0 0 $_TARGETNAME +set _FLASHNAME $_CHIPNAME.flash1 +flash bank $_FLASHNAME str9x 0x00080000 0x00008000 0 0 $_TARGETNAME