X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstr912.cfg;h=7426276bfbd1f6be406aca1acfec503f4661359c;hp=599a254a043354ae55b2157066214c06301c1552;hb=HEAD;hpb=bbc193ef8d25243a8f7e861de3a8820206939e9c

diff --git a/tcl/target/str912.cfg b/tcl/target/str912.cfg
index 599a254a04..3167b407cc 100644
--- a/tcl/target/str912.cfg
+++ b/tcl/target/str912.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # script for str9
 
 if { [info exists CHIPNAME] } {
@@ -13,9 +15,9 @@ if { [info exists ENDIAN] } {
 }
 
 # jtag speed. We need to stick to 16kHz until we've finished reset.
-jtag_rclk 16
+adapter speed 16
 
-adapter_nsrst_delay 100
+adapter srst delay 100
 jtag_ntrst_delay 100
 
 #use combined on interfaces or targets that can't set TRST/SRST separately
@@ -46,13 +48,13 @@ if { [info exists BSTAPID] } {
 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -ignore-version
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
 
-$_TARGETNAME configure -event reset-start { jtag_rclk 16 }
+$_TARGETNAME configure -event reset-start { adapter speed 16 }
 
 $_TARGETNAME configure -event reset-init {
 	# We can increase speed now that we know the target is halted.
-	#jtag_rclk 3000
+	#adapter speed 3000
 
 	# -- Enable 96K RAM
 	# PFQBC enabled / DTCM & AHB wait-states disabled